This application claims priority under 35 U.S.C. §119 to Japanese Patent Application No. 2013-214936 filed on Oct. 15, 2013, the entire content of which is hereby incorporated by reference.
1. Field of the Invention
The present invention relates to a voltage regulator including a voltage divider circuit capable of reducing an influence of a leakage current flowing at high temperature to keep the accuracy of an output voltage of the voltage regulator.
2. Description of the Related Art
A related-art voltage regulator is now described.
A differential amplifier circuit 104 compares a reference voltage VREF output from a reference voltage circuit 103 and a feedback voltage VFB output from a voltage divider circuit 106, and controls a gate voltage of an output transistor 105 so that the reference voltage VREF and the feedback voltage VFB have the same value. When an output voltage of an output terminal 102 is represented by VOUT, the output voltage VOUT is obtained by the following expression.
VOUT=(RS+RF)/RS×VREF (1)
where RF represents the resistance value of a resistor 121 and RS represents the resistance value of a resistor 122.
The reference voltage circuit 103 includes an Nch depletion transistor 131 and an NMOS transistor 132, and is controlled to keep the accuracy of the output voltage VOUT with respect to temperature (for example, see Japanese Patent Application Laid-open No. Hei 9-326469).
When the voltage regulator enters such a high temperature state that the NMOS transistor 132 and the Nch depletion transistor 131 that form the reference voltage circuit 103 cause a junction leakage current and a channel leakage current to flow, the reference voltage VREF is decreased due to the influence of the leakage currents (see
The present invention has been made in view of the problem described above, and provides a voltage regulator capable of keeping the accuracy of an output voltage VOUT of the voltage regulator even when a reference voltage VREF is decreased due to the influence of a leakage current.
In order to solve the problem of the related art, a voltage regulator according to one embodiment of the present invention has the following configuration.
Specifically, there is provided a voltage regulator, including: a reference voltage circuit configured to output a reference voltage; an output transistor configured to output an output voltage; a voltage divider circuit configured to divide the output voltage to output a divided voltage; an error amplifier circuit configured to amplify a difference between the reference voltage and the divided voltage, and output the amplified difference to control a gate of the output transistor; a switching circuit configured to switch the divided voltage of the voltage divider circuit; and a temperature detection circuit configured to output a signal in accordance with temperature to control the switching circuit.
According to the voltage regulator including the voltage divider circuit of one embodiment of the present invention, even when the leakage current flows at high temperature to decrease the reference voltage, the resistance value of the voltage-dividing resistor connected to the output terminal can be changed to increase the output voltage VOUT. Thus, the accuracy of the output voltage VOUT can be kept within a certain range.
The differential amplifier circuit 104 has an inverting input terminal connected to an output terminal of the reference voltage circuit 103, a non-inverting input terminal connected to an output terminal of the voltage divider circuit 112, and an output terminal connected to a gate of the output transistor 105. The output transistor 105 has a source connected to the power supply terminal 101, and a drain connected to the output terminal 102. The voltage divider circuit 112 includes the resistor 121, the resistor 122, and the resistor 123 connected in series between the output terminal 102 and the ground terminal 100, and the NMOS transistor 124 connected in parallel to the resistor 122. The temperature detection circuit 111 has an output terminal connected to a gate of the NMOS transistor 124.
Next, the operation of the voltage regulator of the first embodiment is described.
An output voltage of the reference voltage circuit 103 at normal temperature is represented by VREF. At normal temperature, the temperature detection circuit 111 outputs a signal High to turn on the NMOS transistor 124. Accordingly, the resistors 121 and 123 form the voltage divider circuit 112.
At high temperature, the output voltage of the reference voltage circuit 103 decreases due to influences of the junction leakage current and the channel leakage current of the transistors. Then, the temperature detection circuit 111 outputs a signal Low to turn off the NMOS transistor 124. Accordingly, the resistors 121, 122, and 123 form the voltage divider circuit 112. At this time, an output voltage VOUT of the output terminal 102 is expressed by Expression (2).
VOUT=(RS+RF+RA)/RS×VREFH (2)
where RS represents the resistance value of the resistor 123, RF represents the resistance value of the resistor 121, RA represents the resistance value of the resistor 122, and VREFH represents the output voltage of the reference voltage circuit 103 at high temperature. The resistance value of the voltage divider circuit 112 increases by the resistance value RA corresponding to a decreased amount of the reference voltage VREF due to a leakage current flowing at high temperature, and hence the decrease in output voltage VOUT can be cancelled out. It is desired that the resistance value RA satisfy the following condition.
RA/RS×VREFH>(VREF−VREFH) (3)
The operation of the temperature detection circuit 111 is now described. A constant current of the constant current circuit 203 is independent of temperature similarly to a current of a band-gap reference circuit, for example. A voltage across both ends of the diode 204 has a negative temperature coefficient of about −2 mV. Thus, at high temperature, when a voltage of the anode of the diode 204 decreases to be equal to or smaller than an inversion voltage of the inverter 201, the inverter 201 outputs a signal High and the inverter 202 outputs a signal Low. That is, the temperature detection circuit 111 outputs a signal Low at high temperature.
Note that, the NMOS transistor 124 and the resistor 122 may be connected to each other between the output terminal 102 and the resistor 121. Further, if a signal to be input to the gate of the NMOS transistor 124 is inverted, a PMOS transistor may be used as the NMOS transistor 124. Further, the reference voltage circuit 103 and the temperature detection circuit 111 may have any configuration as long as the operation of the present invention is achieved.
As described above, according to the voltage regulator of the first embodiment, even when the leakage current flows at high temperature to decrease the reference voltage VREF, the resistance value of the voltage divider circuit 112 can be increased to keep the accuracy of the output voltage VOUT within a certain range.
The operation of the temperature detection circuit 111 is the same as that of
VOUT=(RA+RF)/RA×VREFH (6)
Therefore, a feedback voltage VFB decreases by a decreased amount of the reference voltage VREF of the reference voltage circuit 103 due to the influence of the leakage current so that the accuracy of the output voltage VOUT can be kept within a certain range.
A constant current of the constant current circuit 301 has a positive temperature coefficient similarly to, for example, a current of a circuit using a weak inversion region of a transistor or a PTAT circuit. The resistor 303 includes a resistor having a slightly negative temperature coefficient of, for example, about −100 ppm. With this configuration, a voltage across both ends of the resistor 303 can have a positive temperature coefficient. Further, with a configuration in which a resistor having a large negative temperature coefficient of, for example, about −4,000 ppm is used as the resistor 303, the voltage across both ends of the resistor 303 can have a negative temperature coefficient. The constant current of the constant current circuit 301 and the resistor 303 are set to be trimmable.
The temperature detection circuit 111 compares, by using the comparison circuit 302, the voltage across both ends of the resistor 303 having a positive temperature coefficient or a negative temperature coefficient and the output voltage of the reference voltage circuit 103. When the output voltage of the reference voltage circuit 103 falls below the voltage across both ends of the resistor 303, the output terminal of the comparison circuit 302 outputs a signal Low. Thus, by trimming the temperature coefficient of the voltage across both ends of the resistor 303, it is possible to directly detect not only the influence of the leakage current flowing at high temperature, but also temperature characteristics of the output terminal of the reference voltage circuit 103.
The operation of the voltage divider circuit 112 is the same as that of the first embodiment. Specifically, at high temperature, the temperature detection circuit 111 outputs a signal Low to turn off the NMOS transistor 124 and the resistor 123 is added to the resistor 121. In this way, the conditions of Expression (2) and Expression (3) are satisfied and the output voltage VOUT once increases so that the accuracy of the output voltage VOUT can be kept within a certain range. Further, at low temperature, when the output voltage of the reference voltage circuit 103 decreases, the temperature detection circuit 111 outputs a signal Low to turn off the NMOS transistor 124 and the resistor 123 is added to the resistor 121. In this way, the output voltage VOUT once increases so that the accuracy of the output voltage VOUT can be kept within a certain range. As shown in
Note that, the reference voltage circuit and the temperature detection circuit may have any configuration without limitation as long as the operation of the present invention is achieved.
As described above, according to the voltage regulator of the first embodiment, regardless of temperature, the resistance value of the voltage-dividing resistor connected to the output terminal can increase to increase the output voltage VOUT. Therefore, the accuracy of the output voltage VOUT can be kept within a certain range regardless of temperature.
For example, constant current circuits 403 and 203 have different current values, and diodes 406 and 204 have the same characteristics. Inverters 201, 202, 404, and 405 have the same characteristics. The difference between the current values of the constant current circuits 403 and 203 generates a difference between a voltage across both ends of the diode 406 and the voltage across both ends of the diode 204, to thereby generate a difference in temperature to be detected. Thus, the two outputs of the temperature detection circuit 111 each output a signal Low at different temperatures. Therefore, the NMOS transistor 124 and an NMOS transistor 402 of the voltage divider circuit 112 can be turned off at different temperatures, and hence the output voltage VOUT can be corrected step-by-step with respect to temperature. In this way, the conditions of Expression (2) and Expression (3) are satisfied, and a temperature change of the output voltage VOUT occurring at high temperature can be reduced as shown in
Note that, in
As described above, according to the voltage regulator of the second embodiment, at least two resistors are connected in parallel to the NMOS transistors of the voltage divider circuit 112, and the outputs of the temperature detection circuit 111 have a difference in detection temperature. In this manner, at high temperature, the resistance value of the voltage-dividing resistor connected to the output terminal 102 can increase step-by-step to increase the output voltage VOUT step-by-step. Thus, the accuracy of the output voltage VOUT can be kept within a certain range.
Because the temperature detection circuit 111 includes the two diodes connected in series, the voltage of the anode of the diode 204 has a negative temperature coefficient of about −4 mV. On the other hand, a voltage of the anode of the diode 504 has a negative temperature coefficient of about −2 mV. Thus, the detection temperatures can differ from each other due to the difference in temperature coefficients of the diodes. Therefore, an NMOS transistor 502 and the NMOS transistor 124 of the voltage divider circuit 112 can be turned off at different temperatures, and hence the output voltage VOUT can be corrected step-by-step with respect to temperature. In this way, Expression (2) and Expression (3) are satisfied, and the temperature change of the output voltage VOUT occurring at high temperature can be further reduced as shown in
Note that, in order to provide the difference in detection temperature, the difference in current values of the constant current circuits and the difference in temperature coefficients of the diodes are used. However, the inverters may have different thresholds instead. Further, the two resistors connected in parallel to the NMOS transistors of the voltage divider circuit 112 are used, but the number of the resistors is not limited to two and three or more resistors may be connected in series. Further, the reference voltage circuit and the temperature detection circuit may have any configuration without limitation as long as the operation of the present invention is achieved.
As described above, according to the voltage regulator of this embodiment, at least two resistors are connected in parallel to the NMOS transistors of the voltage divider circuit 112, and the outputs of the temperature detection circuit 111 have a difference in detection temperature. In this manner, at high temperature, the resistance value of the voltage-dividing resistor connected to the output terminal 102 can increase step-by-step to increase the output voltage VOUT step-by-step. Thus, the accuracy of the output voltage VOUT can be kept within a certain range.
The PMOS transistor 601 is used to cause a current to flow in such a direction that the current cancels out a junction leakage current flowing from the power supply terminal 101 via the substrate into the circuit, and a junction leakage current flowing from the inside of the NMOS transistor 502 to the ground terminal. Thus, the influence of the leakage current on the output voltage VOUT can be suppressed.
Note that, the reference voltage circuit 103 and the temperature detection circuit 111 may have any configuration without limitation as long as the operation of the present invention is achieved.
As described above, the NMOS transistor and the PMOS transistor are used as switches for the voltage divider circuit 112 for increasing the output voltage VOUT at high temperature, and it is therefore possible to cancel out leakage currents generated by the switching transistors, and increase the output voltage VOUT step-by-step with a higher accuracy. In addition, the temperature change of the output voltage VOUT occurring at high temperature can further be reduced.
As described above, the voltage regulator of the present invention includes the temperature detection circuit 111, and the voltage divider circuit 112 includes the switching transistor for inputting the output thereof. Then, the resistance value of the voltage divider circuit 112 is controlled depending on temperature. Thus, the accuracy of the output voltage VOUT can be kept within a certain range.
Note that, the circuit configuration of the present invention is not limited to the configurations of
Further, the reference voltage circuit and the temperature detection circuit may have any configuration without limitation as long as the operation of the present invention is achieved.
Number | Date | Country | Kind |
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2013-214936 | Oct 2013 | JP | national |
Number | Name | Date | Kind |
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20020057125 | Demizu | May 2002 | A1 |
20070216461 | Morino | Sep 2007 | A1 |
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Number | Date | Country |
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9-326469 | Dec 1997 | JP |
Number | Date | Country | |
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20150102789 A1 | Apr 2015 | US |