This invention relates to improvements in a container for the transportation of semiconductor wafers. More particularly, the present wafer container includes improvements in clamping sidewalls that prevent movement to the wafers, improved cover design to minimize rotation, a simplified top cover orientation mechanism and an improved bottom holding mechanism for automation.
In the processing of semiconductor wafers, they typically must be transported either between processes or to other facilities. The semiconductor wafers are fragile and damage to the surface of the wafers can make the wafer useless for the intended purpose. Because of the high potential for damage to the wafer the semiconductors must be packaged and transported to minimize harm. In transportation, multiple semiconductor wafers are stacked into a transportation container. There have been a number of containment products and patents, which have been sold and patented to minimize damage to these silicon wafers. Exemplary examples of patents covering these products are disclosed herein.
U.S. Patent Publication Number US2006/0042998 that was published on Mar. 2, 2006 to Cliffton C. Haggard et al., discloses using a cushion insert that is placed on top of the wafers. When the lid is closed on top of the cushion insert, the support portions push on the inside of the lid. This causes the cushioning member to conform around the wafer at contact points. While this reference minimizes movement of the wafers, the wafers are stored vertically and the cushioning is applied on the closing side of the enclosure. The closing of the carrier pushes down on the cushion instead of sliding on the cushion. Further, the cushion is not integrated with the enclosure and exists as a separate component.
U.S. Pat. No. 7,100,772 issued Sep. 5, 2006 to John Burns et al., discloses a containment device for retaining semiconductor wafers with several methods of pushing on the sides of a semiconductor wafer. In all of the embodiments, one half of the housing interacts with an arm located in the second half of the housing to press on the sides of the semiconductor wafer. In one embodiment, spring loaded pistons push on branch members. In another embodiment, an arm on a living hinge is pushed to make contact with the wafer. While this patent discloses a wafer carrier that reduces movement of the wafers, the wafers are stored vertically and the cushioning is applied on the closing side of the enclosure. The closing of the carrier pushes down on the cushion instead of sliding on the cushion. This patent uses multiple arms, one for each wafer. The top housing pushed down on the cushion instead of sliding on the arms to provide the cushion.
U.S. Pat. No. 6,988,620 issued Jan. 24, 2006 to Clifton C. Haggard et al., discloses a wafer container having a top housing with sidewall tab portions that have a chamfered edge that pushes against a corresponding chamfered edge in the bottom housing to push extensions against the wafers. In this patent the hinge bends from the bottom housing and can bow whereby making contact with some but not all of the wafers. The hinge does not swing from the sidewall of the wafer carrier and the contact point on the wafers is not distal from the hinge to evenly apply the force to the wafers.
U.S. Pat. No. 5,402,890 issued Apr. 4, 1995 to Toshitsugu Yajima et al., discloses a box container with a flexible liner box member that is placed between the top and bottom housings. There are wedge like ribs that slide on the inside sidewalls that push the liner box member against the sheet bodies placed within the enclosure. The interaction of closing the housing causes deformation of one part that makes contact with all of the sheet bodies within the housing. This patent requires a separate insert to provide the cushioning and the cushion is not integrated or hinged from either housing.
U.S. Pat. No. 5,024,329 issued on Jun. 18, 1991 to Peter Grohrock discloses a wafer shipper that uses a hinged movable sidewall. This sidewall has multiple living hinges that push a wafer securing means against the wafers when the bottom housing is secured into the top housing. The interaction of closing the housing causes deformation of one part that makes contact with all of the wafers within the housing. In this patent the wafers are stored vertically. This cushion pushes from only one side and pushes the wafers against an outside wall where they are susceptible to damage. The top housing pushes down on the cushion instead of sliding on the cushion.
U.S. Pat. No. 6,193,068 issued Feb. 27, 2001 to Lee Lewis et al., and U.S. Pat. No. 6,341,695 issued Jan. 29, 2002 to Lee Lewis et al., discloses a containment device for retaining semiconductor wafers. This patent discloses two concentric walls on the top and bottom housings that nest to protect the semiconductor wafers. Double walls were designed to protect the wafers from the direct transmission of forces that may contact the outer wall. While the nesting walls provide protection from side impacts they do not provide flexibility to absorb and cushion a side impact or drop. The combination of an outer wall and a gap provide the protection. Damage may also occur if the force is such that the outer wall flexes enough to interfere with the inner wall, thereby damaging the wafers. That can cause the semiconductor wafers to shift and scratch.
U.S. Patent Publication Number US2009/0095650 that was published on Apr. 16, 2009 to James D. Pylant et al., discloses a wafer container with staggered wall structure. In this published application the design is limited by the amount overlap of the inner and outer walls by the design of its staggered walls. The walls were limited to 5% overlap, with 95 percent of the outer wall not located in adjoining angular sectors. This and other top cover rotation locating mechanisms use either an inner surface of a feature on the top cover or an exterior surface of a feature on the top cover to secure the top cover in place and prevent rotation.
U.S. Pat. No. 6,550,619 issued Apr. 22, 2003 to Gregory W. Bores et al., discloses a shock resistant variable load tolerant wafer shipper. This patent uses four inner tapered walls with a variable amount of cushions placed between the semiconductor wafers to pack and cushion the semiconductor wafer. While this patent allows for a variable amount of semiconductor wafers to be packed within the shipper the cushioning relies on the variable amount of cushions placed between the semiconductor wafers to reduce damage.
U.S. Pat. No. 7,040,487 issued on May 9, 2006 to Michael Zabka et al., discloses a protective shipper with a corrugated inner containment lip. The corrugated inner lip provides multiple surfaces for the edges if the semiconductor wafers to make contact with, but because the edges are corrugated the tangential walls of the corrugation limit the flexing of the inner lips.
Some semiconductor wafer containers use a rotation locking design where the locating mechanism with an exclusive inner surface or exterior surface do not securely capture the wall that they are adjacent to in both directions of rotation. These features stop rotation in only one direction. The features must rely on a sister feature to stop rotation in the opposite direction that is generally located farther away and allows for more manufacturing tolerance to build up since it is located at a greater distance. These deficiencies result in larger gaps between the plus and minus rotational limiting surfaces, thereby leading to more rotational movement.
There are a number of prior designs that use top cover orientation features with differing wall engagement angles or large latches as opposed to small slots. The new feature in this proposed wafer container allows improved orientation that is not found in the prior art.
Prior art designs have left the latch exposed to accidental contact that can open one or more of the latches that holds the two halves of the enclosure together. The designs all fail to address placing the latch in a well to prevent accidental opening during handling and shipping. In this application, the locking tab is placed within a recessed pocket where the latches are protected and enclosed in a powered well.
There are a number of different holding and clamping features in wafer shipping containers. All of these prior designs rely on multiple parts to create a clamping lip. These designs have several drawbacks including but not limited to the parts not being rigid with respect to the bottom assembly because they must be sonic welded, bonded or snapped together and that secondary parts or assembly operations are more expensive to produce.
The engagement of latches that secure the top and bottom housings together have a number of limitations. Specifically, prior art latches provide a raised straight slope ramp. The raise straight sloped surface is susceptible to damage. Moreover, the straight slope does not provide an ideal self gripping to engage between the top and bottom housings. The top cover orientation features use differing wall engagement angles or large latches as opposed to small slots as presented in this pending application.
What is needed is a semiconductor wafer container with improvements in side protection to the wafers, improved cover design to minimize rotation, a simplified top cover orientation mechanism and an improved bottom holding mechanism for automation. Also, what is needed is a semiconductor wafer container with improvements in internal movement, side and top protection to the wafers, the improved wafer carrier having movable side walls that push against opposing sides of the wafer to eliminate movement of the wafer within the carrier. This pending application satisfies these requirements with novel improvements in the identified areas.
It is an object of the semiconductor wafer container to limit the amount of radial movement of the wafer within the container. Limiting radial movement is important because when shipping “bumped” wafers, that are stacked on spacer rings where the rings touch the periphery of the wafer, it will not shift radially into the areas containing the solder bumps. The improvements increase the wafer containment device's ability to protect semiconductor wafers and reduce radial wafer shift for both bumped and non-bumped wafers. This design can be used with or without spacer rings between the wafers in the vertical stack.
It is an object of the semiconductor wafer container to incorporate flexible wall segments. The flexible wall or wall segments moves radially inward to take up the excess space between the wafer and the main inner diameter of the container. The flexible walls reduce the movement of the wafers or can contain inserts that move with the walls to reduce the movement of the wafers. These wall segments create an interference fit between the top cover and panel or by use of a ramped engagement surfaces in either the Top Cover and/or the Bottom Member. The flexible wall segments can consist of individual components with flexible inserts, or can be integral to the base where they are molded as one part.
It is an object of the semiconductor wafer container to include flexible panels within a constraining wall. The flexible panel is contained within the main inner walls of the wafer container. The flexible wall segments can be simply a flexible portion of the wall or a distinct panel that reduces the radial gap between the wafer container and the wafer or wafer stack. This mechanism could also include the radial movement of resilient inserts imbedded into the side walls and are engaged by the top cover to move vertical features of the resilient insert radially inward.
It is another object of the semiconductor wafer container to include flexible inserts that are embedded onto or into the flexible wall. The insert is a flexible or resilient inserts, whether separate pieces or overmolded onto the walls, using a resilient materials. The wall may include holes or slots for insertion and retention of the insert.
It is still another object of the semiconductor wafer container to include ramped engagement surfaces. When the wall segments are pushed radially inward they are in a generally vertical direction. The use of ramped surfaces minimize the amount of force required to assemble the Top Cover and Bottom Member together when loaded with the wafer stack. The ramped surface is on the backside of the flexible wall or panel segment and has a corresponding ramp on the top cover, which engages the flexible wall ramp and drives the panel radially inward.
It is an object of the semiconductor wafer container that has an overlapping double wall. The wall structure comprises multiple outer walls and multiple inner walls. The overlapping double containment wall increases semiconductor wafer protection during impact or shipping. Each inner wall shares a minimal percentage of a common angular sector with each adjacent outer wall. The inner wall is generally very stiff and does not absorb and cushion the wafers if the container is dropped or subject to impact. On the bottom assembly, the inner walls and outer walls are positioned in an offset and overlapping configuration provides maximum protection to the semiconductor wafers.
It is an object of the semiconductor wafer container to improve alignment of the top cover with the base. The alignment system includes reference tabs that are received by the cover and a visual identifier for guiding an operator in the proper alignment of the two halves of the container. The top cover orientation features prevent improper installation of the top cover to the bottom member. The top cover orientation feature is incorporated into the top cover that mates with the features of the double locking location feature. This orientation feature prevents installation of the top cover in plus or minus 90 degree locations about the central axis.
It is an object of the semiconductor wafer container to provide an improved locking mechanism for securing the two halves of a wafer container together. The bottom half comprises a wall structure perpendicular to the base. The wall structure comprises segmented inner and outer walls, where each portion of the wall structure has a distinctive arc length. The arc length of each inner wall does not completely overlap with the arc length of any outer wall.
It is an object of the semiconductor wafer container to provide an improved engagement feature for the locking tabs. These improved tabs include a cover for a wafer container that engages to a base. The cover includes one or more notches, each having a ramp that easily receive latches from the base.
It is another object of the semiconductor wafer container to incorporate bi-directional rotation locking feature(s). These features improve orienting the top member on the bottom member that decreases the amount of top cover rotation and movement with respect to the bottom member. This feature creates a double locking location that securely locates and locks the top cover in place during top cover assembly. The bi-directional rotation locking feature is located on both sides of the perpendicular top cover surfaces of a single wall on both the interior and the exterior simultaneously. This improvement provides bi-directional locking of the captured surface, decreases the amount of top cover rotation and movement with respect to the bottom member, and increases the rigidity of the containment device when the members are assembled.
It is another object of the semiconductor wafer container to incorporate a protective latch well. The latch well is a recess that is incorporated into the top cover which protects the latch arm from being accidentally bumped or inadvertently opened. The tip of the latch is surrounded by a wall that protects the latch by lowering the tip of the latch below the planar surface of the Top Cover by at least 2 mm. This recess distance or greater is considered to be adequate to protect the latch from accidental opening.
It is still another object of the semiconductor wafer container to include an improved holding and clamping feature to allow for automated machinery to latch onto and hold the bottom member and secure it firmly to the machinery nesting locations. This mechanism is comprised of a single piece feature that is molded into the bottom member. The holding and clamping feature on the bottom member improves equipment interface where these containers are used. The feature is a holding mechanism to allow for automated machinery to latch onto and hold the bottom member and secure it firmly to the machinery nesting locations.
It is still another object of the semiconductor wafer container to include an improved curved latch recess for improved closure and retention of the containment device latches. In the improved latch and latch recess, the height of the latch is equal to or lower than the inner wall structure. This allows equipment to interface with the bottom member of the container without interference with the equipment and latch height. A curvature on the mating surface provides superior holding and self centering and gripping during handling and after impact. This recessed feature also protects the mating surface from damage when the top cover is disassembled from the bottom member. The latch recess and curved surface also provides increased latch retention and container integrity during impact or shipping. This includes a lowered latch equal to or less than the inner wall height.
Various objects, features, aspects, and advantages of the present invention will become more apparent from the following detailed description of preferred embodiments of the invention, along with the accompanying drawings in which like numerals represent like components.
In
In
The walls 122 and 123 will flex on the outer restrained portion of the rib 110 and bends into the center of the wafer carrier. Because there are eight flexible walls located around the wafer carrier the walls all will move inward in unison to push in on the wafer from all directions to clamp the wafer into the center of the wafer carrier. Moving all of the walls together further prevents damage to the wafers because they are not being pushed in only one direction and when the top housing is removed the wafer do not move back into a neutral position because the wafers are all being clamped and released from a plurality of outer directions.
The overlapping double wall provides maximum protection from shock or impact to the exterior of the containment device by positioning the inner and outer wall in an offset and overlapping configuration as to increase the protection of the semiconductor wafers from direct transmission forces by increasing the amount of flex movement allowed by the outer wall. Increasing the flex tolerance of the outer wall increases the overall shock absorbing ability of the containment device. This design also allows for a greater percentage of “wrap” around the semiconductor wafer and therefore minimize lateral shift into the gaps between inner wall segments. Segmenting the inner wall makes it more flexible and thus able to absorb and cushion the wafers if the container is dropped or subject to impact.
As shown in
A radial support for the wafer ring 129 is also shown to support the lowermost wafer ring.
A pair of securing ribs consisting of an outer locking rib 131 and an inner locking rib 132 on the bottom housing 100 are configured to engage onto the opposing sides of the inside face 53 and an outside face 52 of the “U” shaped rib when the “U” shaped rib is engaged into the locking cavity 130. Circular lock rib 133 is configured to fit within cavity 56 on the top housing 50 along with the inner lock rib 132. When the rib defined by items 52/53 is engaged into the locking cavity 130 these features improve orienting, the top housing 50 on the bottom housing 100 that decreases the amount of top cover 50 rotation and movement with respect to the bottom member 100. This feature creates a double locking location that securely locates and locks the top cover 50 in place during top cover assembly. The bi-directional rotation locking further increases the rigidity of the containment device when the members are assembled. The “U” shaped and is shown in an approximate orthogonal relationship to three sides of the bottom housing 100. While only one location of the bi-directional lock is shown and described in detail, the feature exists on all four sides of the top and bottom housings.
In
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The height of the latch is equal to or lower than the inner wall structure to allow equipment to interface with the bottom member of the container without interference with the equipment and recess pocket 80 and the latch surface 81. This recessed feature also protects the mating surface from damage when the top cover is disassembled from the bottom member. In
In
The top surface 74 of said latch 70 is located at a height 76 that is below the top surface of said at least one rib 141. The height 76 of the latch 70 is equal to or lower than the inner wall 141 structure. This allows equipment to interface with the bottom member of the container without interference with the equipment and latch height. This further reduces the possibility of damage to the latch 70 if the bottom housing 100 is dragged on a surface. In the preferred embodiment there are four latches 70 and four corresponding notches 75 located in each corner region of said top housing 50 or said bottom 100 housing, but as few as one or two are contemplate as well as four or more latches.
Thus, specific embodiments of a semiconductor wafer container have been disclosed. It should be apparent, however, to those skilled in the art that many more modifications besides those described are possible without departing from the inventive concepts herein. The inventive subject matter, therefore, is not to be restricted except in the spirit of the appended claims.
Thus, specific embodiments of a semiconductor wafer container have been disclosed. It should be apparent, however, to those skilled in the art that many more modifications besides those described are possible without departing from the inventive concepts herein. The inventive subject matter, therefore, is not to be restricted except in the spirit of the appended claims.
The present application is 1) a continuation-in-part of Ser. No. 12/749,448, filed on Mar. 29, 2010, now U.S. Pat. No. 8,556,079, issued Oct. 15, 2013; and 2) a continuation-in-part of Ser. No. 12/606,921, filed on Oct. 27, 2009; both of are continuations-in-part applications of Ser. No. 12/548,368, filed on Aug. 26, 2009, now U.S. Pat. No. 8,109,390, issued Feb. 7, 2012. The entire disclosure of all of the above applications is incorporated by reference herein, including all the drawings.
Number | Date | Country | |
---|---|---|---|
Parent | 12749448 | Mar 2010 | US |
Child | 14054336 | US | |
Parent | 12606921 | Oct 2009 | US |
Child | 12749448 | US | |
Parent | 12548368 | Aug 2009 | US |
Child | 12749448 | US | |
Parent | 12548368 | Aug 2009 | US |
Child | 12606921 | US |