Patent Application
20130283077
1. Technical Field
The present disclosure relates to electronic devices, particularly relates to an electronic device with a wake-up circuit.
2. Description of Related Art
Most electronic devices, such as portable computers, include a wake-up circuit for switching from a standby state to a working state by pressing a key. However, sometimes the wake-up key may be stuck in the standby state and the electronic device must be hard-booted to be restarted and the user may lose any temporary or unsaved files when the device is restarted.
Therefore, there is room for improvement in the art.
Many aspects of the embodiments can be better understood with references to the following drawings. The components in the drawings are not necessarily drawn to scale, the emphasis instead being placed upon clearly illustrating the principles of the embodiments. Moreover, in the drawings, like reference numerals designate corresponding parts throughout two views.
The disclosure is illustrated by way of example and not by way of limitation in the figures of the accompanying drawings in which like references indicate similar elements. It should be noted that references to “an” or “one” embodiment in this disclosure are not necessarily to the same embodiment, and such references mean “at least one”.
The power supply 10 provides a first voltage to the signal generating module 30 and the first control module 40, and provides a second voltage to the second control module 50.
The key module 20 connects to power supply 10 through the signal generating module 30 and generates a corresponding pressing signal in response to the operation of a user.
The signal generating module 30 is connected between the power supply 10 and the key module 20. The signal generating module 30 includes a control unit 31 (see
The switching module 32 is electrically connected to the power supply 10 and the first control module 40. The switching module 32 is turned on and generates a wake-up signal in response to the first control signal, and is turned off and stops generating the wake-up signal in response to the second control signal. In the embodiment, the wake-up signal is a logic high level signal.
The first control module 40 respectively connects with the power supply 10, the control unit 31 (see
The second control module 50 respectively connects with the power supply 10, the signal generating module 30, and the first control module 40. The second control module 50 is disabled and stops communicating with the first control module 40 when the electronic device 100 is in the standby state. The second control module 50 is being enabled and communicates with the first control module 40 for transmitting data. The second control module 50 further detects the key signal generated by the control unit 31 to control the load 60 to execute a corresponding function according to the key signal.
The load 60 connects with the second control module 50 and executes a corresponding function according to the pressing signal, such as a playing music function or a playing video function, for example.
Referring to
The key module 20 includes a first capacitor C1, a plurality of switches S1-Sn, and a plurality of pull-down resistors R1-Rn. The resistances of the pull-down resistors R1-Rn are different from each other. An end of the first capacitor C1 is electrically connected to the signal generating module 30, and the other end of the first capacitor C1 is grounded. The switches S1-Sn and the pull-down resistors R1-Rn are in a one-to-one relationship. An end of the each switch S1-Sn is grounded, and the other end of the each switches S1-Sn is electrically connected to the node N1 through the corresponding pull-down resistors R1-Rn.
The control unit 31 includes a first resistor Ra, a second resistor Rb, a first protecting resistor R1-1, a first node N1, and a second capacitor C2. An end of the first resistor Ra is electrically connected to the first power terminal V1, and the other end of the first resistor Rb is grounded through the first node N1 the second capacitor C2 in that order. An end of the second resistor Rb is electrically connected to the first node N1, and the other end of the second resistor Rb is electrically connected to the second control module 50. An end of the first protecting resistor R1-1 is electrically connected to the first node N1, and the other end of the first protecting resistor R1-1 is electrically connected to the first control module 40. In the embodiment, the resistance of the second resistor Rb is ten times larger than the resistance of the first resistor Ra and the resistance of any of the pull-down resistors R1-Rn; the resistance of the first protecting resistor R1-1 is equal to the second resistor Rb.
The switching module 32 includes a transistor Q1, a second protecting resistor R1-2, a third resistor Rc, and a second node N2. A base of the transistor Q1 is electrically connected to the third resistor Rc, a collector of the transistor Q1 is grounded through the second node N2 and the second protecting resistor R1-2, an emitter of the transistor Q1 is electrically connected to the first power terminal V1. In the embodiment, the transistor Q1 is a pnp type bipolar junction transistor.
The first control module 40 includes a first pin P1, a second pin P2, and a third pin P3. The first pin P1 is electrically connected to the first power terminal V1. The second pin P2 is electrically connected to the second node N2 through the second protecting resistor R1-2. The third pin P3 is electrically connected to the second control module 50. In the embodiment, the first control module 40 is a micro control unit (MCU, hereinafter).
The second control module 50 includes a fourth pin P4, a fifth pin P5, a sixth pin P6, and a seventh pin P7. The fourth pin P4 is electrically connected to the second power terminal V2. The fifth pin P5 is electrically connected to the third pin P3. The sixth pin P6 is electrically connected to the second resistor Rb. The seventh pin P7 is grounded. In the embodiment, the second control module 50 is a MUC.
When the electronic device 100 is in a standby state and none of the switches S1-Sn is pressed, the second control module 50 is disabled and stops detecting the voltage at the first node N1 and stop communicating with the first control module 40. The sixth pin P6 is in a logic low level by the diode D1 of the second control module 50 and is disabled to detect the voltage at the first node N1. The resistance of the second resistor Rb is ten times larger than the resistance of the second resistor Ra, thus the voltage at first node N1 is equal to the voltage of the first power terminal V1. The difference in voltage between the base and the emitter of the transistor Q1 is equal to or greater than 0V, the transistor Q1 turns off and the voltage at the second node N2 is almost 0V.
When the electronic device 100 is in a standby state and any of the switches S1-Sn is pressed, the voltage at first node N1 is pulled down and the difference in voltage between the base and the emitter of the transistor Q1 is smaller than 0V, the transistor Q1 turns on. The first resistor Ra, the first protecting resistor R1-1, the transistor Q1, and the third resistor Rc form a discharging path from the first terminal V1 to ground. The voltage at the second node N2 is pulled up and equal to the voltage across the third resistor Rc. The voltage at the second node N2 is detected by the second pin P2, and the first control module 40 controls the second control module 50 to be enabled through the third pin P3 and the fifth pin P5, thus the second control module 50 communicates with the first control module 40. The second control module 50 further detects the voltage at the first node N1 through the sixth pin P6 to control the load 60 to execute a corresponding function.
As described, the first MCU is able to control the second MCU to be enabled with the second control module 50 having an internal diode connected between the detecting pin and ground. Therefore, the electronic device 100 is unlikely to be stuck in the standby state.
It is to be understood, however, that even though information and advantages of the present embodiments have been set forth in the foregoing description, together with details of the structures and functions of the present embodiments, the disclosure is illustrative only; and that changes may be made in detail, especially in matters of shape, size, and arrangement of parts within the principles of the present embodiments to the full extent indicated by the broad general meaning of the terms in which the appended claims are expressed.
| Number | Date | Country | Kind |
|---|---|---|---|
| 201210117451.4 | Apr 2012 | CN | national |
