Claims
- 1. A waveform producing system comprising:
- a plurality of switches, each of said switches corresponding to a respective basic output frequency,
- a clock signal generator means having a plurality of outputs connected to said switches for generating a plurality of clock pulse trains, each of said clock pulse trains having a frequency which is a multiple of at least one of said basic output frequencies,
- means for memorizing the wave shape of a predetermined waveform, said memory means including a plurality of memory elements each of which stores a predetermined value of said waveform corresponding to the amplitude of the predetermined waveform at respective sampling intervals of said waveform,
- decoder means connected to said memory means for coupling addressing signals thereto, said decoder means including a plurality of outputs, one each connected to a respective memory element,
- means interconnecting said switches and said decoder means and responsive to said clock pulse trains for energising said decoder means in accordance with the switch closed and the frequency of the clock pulse train coupled thereto, wherein addressing signals are provided at the outputs of said decoder at the frequency of said connected clock pulse train, and wherein the total number of the addressing signals provided at the output terminals of said decoder decreases as the selected basic output frequency selected by the corresponding closed switch increases as different selected switches are closed to thereby maintain the frequency at which said memory elements are addressed within a predetermined small range, and
- means responsive to said addressed memory elements for reading out the waveform stored in said memory means, said read-out waveform having a basic output frequency corresponding to the closed switch.
- 2. A waveform producing system comprising:
- a plurality of switches, each of said switches corresponding to a respective basic output frequency,
- a clock signal generator means having a plurality of outputs connected to said switches for generating a plurality of clock pulse trains, each of said clock pulse trains having a frequency which is a multiple of at least one of said basic output frequencies,
- means for memorizing the wave shape of a predetermined waveform, said memory means including a plurality of memory elements each of which stores a predetermined value of said waveform corresponding to the amplitude of the predetermined waveform at respective sampling intervals of said waveform,
- decoder means connected to said memory means for coupling addressing signals thereto, said decoder means including a plurality of outputs, one each connected to a respective memory element,
- means interconnecting said switches and said decoder means and responsive to said clock pulse trains for energizing said decoder means in accordance with the switch closed and the frequency of the clock pulse train coupled thereto, wherein addressing signals are provided at the outputs of said decoder at the frequency of said connected clock pulse train, and wherein the number of output terminals of said decoder providing an address signal decreases by a constant factor as the basic output frequency selected by the corresponding closed switch increases by a constant factor as different selected switches are closed, and
- means responsive to said addressed memory elements for reading out the waveform stored in said memory means, said read-out waveform having a basic output frequency corresponding to the closed switch.
- 3. The waveform producing system of claim 2 wherein said memory means include a bank of resistor elements having predetermined resistance values corresponding to the desired waveform amplitude at each of a plurality of sampling intervals of said waveform; said waveform memory means including a common resistor connected in series with said bank of resistors, said common resistor and said bank of resistors jointly comprising a bank of voltage divider circuits, said waveform memory means further including memory switching means responsive to the respective addressing outputs of said decoder means for turning the respective voltage dividers on and off.
- 4. The waveform producing system of claim 2 wherein said means for energizing said decoder includes a plurality of serially connected frequency dividers, said frequency dividers each having an output connected to said decoder means, and said switches coupling pulse trains of selected frequency to said frequency dividers for energizing successively more dividers as the basic output frequency selected by the closed switch is increased by a constant factor.
- 5. A waveform producing system comprising:
- a clock signal generator means having a plurality of outputs for generating a plurality of clock pulse trains, one of said clock pulse trains being generated at each of said outputs, each of said clock pulse trains having a frequency different from the frequency of the other clock pulse trains, the range of frequencies of said clock pulse trains at the outputs of said generator means defining a discrete frequency interval,
- a plurality of switches, each switch being connected to one of said outputs of said generator means, the number of switches being a multiple n of the number of outputs of said generator means, each of said switches corresponding to a respective basic output frequency of said system,
- means for memorizing the wave shape of a predetermined waveform, said memory means including a plurality of memory elements, each of which stores a predetermined value of said waveform corresponding to the amplitude of the predetermined waveform at respective sampling intervals of said waveform,
- means for interconnecting said switches and said memory means for selectively addressing said memory elements in a predetermined sequence, said interconnecting means comprising means for addressing every 2.sup.i th memory element as the basic output frequency selected by a closed switch increases by the multiple i as different given switches connected to the same clock signal generator output are closed, and
- means responsive to said addressing means for reading out the waveform stored in said memory means, said read out waveform having a basic frequency corresponding to the closed switch.
- 6. The waveform producing system of claim 5 wherein said interconnecting means provides addressing signals at the outputs thereof at the frequency of the pulse train coupled to said interconnecting means and wherein every 2.sup.i th output terminal of said interconnecting means provides an address signal as the octave corresponding to the closed switch increases by the multiple i from the fundamental frequency octave.
- 7. The waveform producing system of claim 5 wherein said interconnecting means includes decoder means connected to said memory means for coupling addressing signals thereto, said decoder means including a plurality of outputs, one each connected to a respective memory element, means connected to said switches and responsive to said pulse trains for energizing said decoder means in accordance with the switch and frequency of the pulse train coupled thereto, wherein addressing signals are provided at the outputs of said decoder at the frequency of said coupled pulse train and wherein every 2.sup.i th output terminal of said decoder provides an address signal at the frequency selected by the closed switch increases past each of i discrete frequency levels.
- 8. The waveform producing system of claim 7 wherein said means for energizing said decoder includes a plurality of serially connected frequency dividers, said frequency dividers each having an output connected to said decoder means, and said switch coupling pulse trains of selected frequency to said frequency dividers for energizing successively more dividers as the frequency corresponding to the switch increases past each of i discrete frequency levels.
- 9. A waveform producing system comprising:
- a clock signal generator means having a plurality of outputs for generating a plurality of clock pulse trains, one of said clock pulse trains being generated at each of said outputs, each of said clock pulse trains having a frequency different from the frequency of the other clock pulse trains, the range of frequencies of said clock pulse trains at the outputs of said generator means defining a fundamental frequency octave,
- a plurality of switches, each switch being connected to one of said outputs of said generator means, the number of switches being a multiple n of the number of outputs of said generator, each of said switches corresponding to a respective fundamental output frequency of said system,
- means for memorizing the wave shape of a predetermined waveform, said memory means including a plurality of memory elements each of which stores a predetermined value of said waveform corresponding to the amplitude of the predetermined waveform at respective sampling intervals of said waveform, and means interconnecting said switches and said memory means for selectively addressing said memory elements in a predetermined sequence, said interconnecting means comprising means for addressing every 2.sup.i th memory element as the octave of the basic output frequency selected by a closed switch increases by the multiple i as different given switches connected to the same clock signal generator output are closed.
Priority Claims (4)
Number |
Date |
Country |
Kind |
46-57830 |
Jul 1971 |
JPX |
|
46-71245 |
Sep 1971 |
JPX |
|
46-57831 |
|
JPX |
|
46-73441 |
Sep 1971 |
JPX |
|
Parent Case Info
This is a continuation of application Ser. No. 276,103 filed July 28, 1972, now abandoned.
US Referenced Citations (10)
Continuations (1)
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Number |
Date |
Country |
Parent |
276103 |
Jul 1972 |
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