Claims
- 1. A motor controller for selectively controlling an AC motor by providing a controlled power waveform thereto of selected wave shape and frequency, said motor controller comprising:
- a waveform memory means divided into P addressable pages representing P available wave shapes with each page divided into S addressable segments, the segments of each page having binary switch control information stored therein, the pages and the segments of each page addressable through a memory address port to provide the so-addressed switch control information to switch control data lines;
- selectively gatable switch means connected between a DC power source means to at least one output power node for connection to the motor to be controlled and connected to said switch control data lines;
- stored-program control means connected to said waveform memory means for addressing a selected one of the pages available in said waveform memory means;
- presettable frequency divider means connecter to a source of input pulses having a selected repetition rate and connected to said waveform memory means for addressing the segments of the addressed page, said frequency divider means providing output pulses at a selected divide-down ratio for addressing the segments of the addressed page at a rate determined by said output pulses;
- said stored-program control means connected to said presettable frequency divider means for setting the divide ratio thereof, the frequency divider means addressing the segments of the addressed page at an addressing rate determined by the output pulses thereof to cause the gatable switch means to switch DC power to the output node to synthesize a waveform of selected wave shape in accordance with the stored binary switch control information of the addressed page and of selected frequency in accordance with the segment addressing rate; and
- analog-to-digital converter means connected to the DC power supply means and to said stored-program control means for providing a digital representation to said stored-program control means of a characteristic associated with the DC power.
- 2. A motor controller for selectively controlling a poly-phase AC motor having at least two power phases by providing a controlled poly-phase power waveform thereto of selected wave shape and frequency, said motor controller comprising:
- a waveform memory means divided into P addressable pages representing P available wave shapes with each page divided into S addressable segments, the segments of each page having binary switch control information stored therein, the pages and the segments of each page addressable through a memory address port to provide the so-addressed switch control information to switch control data lines;
- selectively gatable switch means connected between a DC power source means to at least two output power nodes for connection to the motor to be controlled and connected to said switch control data lines;
- stored-program control means connected to said waveform memory means for addressing a selected one of the pages available in said waveform memory means;
- presettable frequencey divider means connected to a source of input pulses having a selected repetition rate and connected to said waveform memory means for addressing the segments of the addressed page, said frequency divider means providing output pulses at a selected divide-down ratio for addressing the segments of the addressed page at a rate determined by said output pulses;
- said stored-program control means connected to said presettable frequency divider means for setting the divide ratio thereof, the frequency divider means addressing the segments of the addressed page at an addressing rate determined by the output pulses thereof to cause the gatable switch means to switch DC power to the at least two output nodes to synthesize a waveform of selected wave shape in accordance with the stored binary switch control information of the addressed page and of selected frequency in accordance with the segment addressing rate; and
- analog-to-digital converter means connected to the DC power supply means and to said stored-program control means for providing a digital representation to said stored-program control means of a characteristic associated with the DC power.
- 3. A motor controller for selectively controlling a poly-phase induction motor having at least two power phases by providing a controlled power waveform thereto of selected wave shape and frequency, said motor controller comprising:
- a waveform memory means divided into P addresable pages representing P available wave shapes with each page divided into S addressable segments, the segments of each page having binary switch control information stored therein, the pages and the segments of each page addressable through a memory address port to provide the so-addressed switch control information to switch control data lines;
- selectively gatable switch means connected between DC power souce means to at least two output power nodes for connection to the motor to be controlled and connected to said switch control data lines;
- a stored-program-controlled processor means having an address output port connected to said memory address port for providing a page select address and having an address rate control port for providing an addressing rate select signal;
- presettable frequency divider means connected to a source of input pulses having a selected repetition rate and connected to said waveform memory means for addressing the segments of the addressed page, said frequency divider means providing output pulses at a selected divide-down ratio for addressing the segments of the addressed page at a rate determined by said output pulses;
- said stored-program control means connected through said address rate control port to said presettable frequency divider means for setting the divide ratio thereof, the frequency divider means addressing the segments of the addressed page at an addressing rate determined by the output pulses thereof to cause the gatable switch means to switch DC power to the at least two output nodes to synthesize a waveform of selected wave shape in accordance with the stored binary switch control information of the addressed page and of selected frequency in accordance with the segment addressing rate; and
- analog-to-digital converter means connected to the DC power supply means and to said stored-program control means for providing a digital representation to said stored-program control means of a characteristic associated with the DC power.
- 4. The motor controller claimed in claims 1, 2, or 3, wherein said analog-to-digital converter means comprises a voltage-to-frequency converter.
- 5. The motor controller claimed in claims 1, 2, or 3 wherein said stored-program means include an input port means for receiving waveform-determining information from an external device.
- 6. The motor controller claimed in claim 5, wherein said external device comprises a key pad means.
- 7. The motor controller claimed in claim 5, wherein said external device comprises a trigger-switch means.
- 8. The motor controller claimed in claim 5, wherein said external device includes at least one condition responsive transducer.
- 9. The motor controller claimed in claim 5, wherein said external device includes an increment/decrement switch means.
- 10. The motor controller claimed in claims 1, 2, or 3, wherein each page of said memory contain binary switching information for synthesizing the first half of a waveform and further comprising means for complementing the binary switching information for synthesizing the second half of a waveform.
- 11. A waveform synthesizer for providing a waveform of selected frequency and wave shape for driving an AC waveform utilizing device, said waveform synthesizer comprising:
- a waveform memory means divided into P addressable pages representing P available wave shapes with each page divided into S addressable segments, the segments of each page having binary switch control information stored therein, the pages and the segments of each page addressable through a memory address port to provide the so-addressed switch control information to switch control data lines;
- selectively gatable switch means connected between a DC power source means to at least one output power node for connection to the waveform utilizing device to be controlled and connected to said switch control data lines; and
- stored-program control means connected to said waveform memory means for addressing a selected one of the pages available in said waveform memory means;
- presettable frequency divider means connected to a source of input pulses having a selected repetition rate and connected to said waveform memory means for addressing the segments of the addresed page, said frequency divider means providing output pulses at a selected divide-down ratio for addressing the segments of the addressed page at a rate determined by said output pulses;
- said stored-program control means connected to said presettable frequency divider means for setting the divide ratio thereof, the frequency divider means addressing the segments of the addressed page at an addressing rate determined by the output pulses thereof to cause the gatable switch means to switch DC power to the output node to synthesize a waveform of selected wave shape in accordance with the stored binary switch control information of the addressed page and of selected frequency in accordance with the segment addressing rate; and
- analog-to-digital converter means connected to the DC power supply means and to said stored-program control means for providing a digital representation to said stored-program control means of a characteristic associated with the DC power.
- 12. A waveform synthesizer for selectively controlling an AC machine by providing a controlled power waveform thereto of selected wave shape and frequency, said waveform synthesizer comprising:
- a waveform memory means divided into P addressable pages with each page divided into S addressable segments, the segments of each page having binary switch control information stored therein, the pages and the segments of each page addressable through a memory address port to provide the so-addressed switch control information to switch control data lines;
- selectively gatable switch means connected between a DC power source means to at least two output power nodes for connection to the AC machine to be controlled and connected to said switch control data lines; and
- stored-program control means connected to said waveform memory means for addressing a selected one of the pages available in said waveform memory means;
- presettable frequency divider means connected to a source of input pulses having a selected repetition rate and connected to said waveform memory means for addressing the segments of the addressed page, said frequency divider means providing output pulses at a selected divide-down ratio for addressing the segments of the addressed page at a rate determined by said output pulses;
- said stored-program control means connected to said presettable frequency divider means for setting the divide ratio thereof, the frequency divider means addressing the segments of the addressed page at an addressing rate determined by the output pulses thereof to cause the gatable switch means to switch DC power to the at least two output nodes to synthesize a waveform of selected wave shape in accordance with the stored binary switch control information of the addressed page and of selected frequency in accordance with the segment addressing rate; and
- analog-to-digital converter means connected to the DC power supply means and to said stored-program control means for providing a digital representation to said stored-program control means of a characteristic associated with the DC power.
- 13. A waveform synthesizer for selectively controlling an AC machine having at least two power phases by providing a controlled power waveform thereto of selected wave shape and frequency, said waveform synthesizer comprising:
- a waveform memory means divided into P addressable pages representing P available wave shapes with each page divided into S addressable segments, the segments of each page having binary switch control information stored therein, the pages and the segments of each page addressable through a memory address port to provide the so-addressed switch control information to switch control data lines;
- selectively gatable switch means connected between DC power source means to at least two output power nodes for connection to the AC machine to be controlled and connected to said switch control data lines;
- a stored-program-controlled processor means having an address output port connected to said memory address port for providing a page select address and having an address rate control port for providing an addressing rate select signal; and
- presettable frequency divider means connected to a source of input pulses having a selected repetition rate and connected to said waveform memory for addressing the segments of the addressed page, said frequency divider means providing output pulses at a selected divide-down ratio for addressing the segments of the addressed page at a rate determined by said output pulses;
- said stored-program control means connected to said presettable frequency divider means for setting the divide ratio thereof, the frequency divider means addressing the segments of the addressed page at an addressing rate determined by the output pulses thereof to cause the gatable switch means to switch DC power to the output node to synthesize a waveform of selected wave shape in accordance with the stored binary switch control information of the addressed page and of selected frequency in accordance with the segment addressing rate; and
- analog-to-digital converter means connected to the DC power supply means and to said stored-program control means for providing a digital representation to said stored-program control means of a characteristic associated with the DC power.
- 14. The waveform synthesizer claimed in claims 11 or 12, wherein said stored-program control means further comprises:
- a stored-program-controlled processor means having an address output port connected to said memory address port for providing a page select address and having an address rate control port for providing an addressing rate select signal; and
- a segment addressing means connected to said memory address port to sequentially address the segments of an addressed page at a selected addressing rate and connected to said address rate control port so as to provide a selected addressing rate in response to an addressing rate select signal provided from said processor means.
- 15. The waveform synthesizer claimed in claims 11, 12 or 13 wherein said stored-program control means includes an input port means for receiving waveform-determining information from an external device.
- 16. The waveform synthesizer claimed in claims 11, 12, or 13 wherein each page of said memory contains binary switching information for synthesizing the first half of a waveform and means for complementing the binary switching information for synthesizing the second half of a waveform.
- 17. The waveform synthesizer claimed in claims 11, 12, or 13, wherein said analog-to-digital converter means comprises a voltage-to-frequency converter.
CROSS-REFERENCE TO RELATED APPLICATION
This application is a continuation-in-part of U.S. patent application Ser. No. 348,319, Filed Feb. 12, 1982, now U.S. Pat. No. 4,447,786, by the inventors hereof and in common assignment herewith.
US Referenced Citations (12)
Non-Patent Literature Citations (3)
Entry |
Sen et al., "Induction Motor Drives with Microcomputer Control System", Conference: IAS Annual Meeting, 1980, Cincinnati, OH. Sep. 28-Oct. 3, 1980, pp. 653-662. |
Buja, "A Microcomputer-Based Quasi-Continous Output Controller for PWM Inverters", IEEE Industrial Electronics and Control Instrument" '80 Conference, Mar. 17-20, 1980. |
Mazur, T., "A ROM-Digital Approach to PWM-Type Speed Control of AC Motors", 9/75, pp. 1-11. |
Continuation in Parts (1)
|
Number |
Date |
Country |
Parent |
348319 |
Feb 1982 |
|