Patent Grant
10320339
This disclosure relates generally to radio frequency (RF) amplification devices and methods of operating the same.
Radio frequency (RF) filters are often used in RF amplification devices to filter undesired signal components (e.g., harmonics and noise) from RF signals. For example, an RF amplification device may include a closed-loop control system that stabilizes the performance of the RF amplification device. An RF signal may be received as feedback and reference signals by the closed-loop control system in order to linearize the performance of the RF amplification device. An RF filter, such as a harmonic filter, may be used to filter harmonics from the RF signal in order to maintain the operation of the closed-loop control system. However, typical RF filters offer a hard tradeoff between harmonic rejection, bandwidth, and filter order. This constitutes a hard barrier for the use of closed-loop control circuits with RF amplification devices since the down-converted harmonics may result in linearization error, thereby causing distortion. Furthermore, reference and feedback paths in the closed-loop control circuits may suffer from degradation due to broadband noise. For instance, the broadband noise may be down-converted and folded on top of signals in the reference and feedback paths, resulting in degraded signal-to-noise ratios (SNRs). RF filters with weak mutually magnetically coupled inductor coils improve performance and have higher quality (Q) factors. Unfortunately, traditional weakly mutually magnetically coupled inductor coils consume large amounts of area, since the inductor coils must be placed a large distance apart (e.g., a distance several times greater than a diameter of the inductor coils) in order to obtain weak mutual magnetic coupling. Thus, more compact weakly magnetically coupled inductor structures are needed for RF filters.
This disclosure relates generally to radio frequency (RF) amplification devices and methods of operating the same. More specifically, the RF amplification devices may include RF filters to filter undesired signal components (e.g., noise and harmonics) from RF signals. In one embodiment, an RF filter includes a first inductor coil having a first winding and a second inductor coil having a second winding and a third winding. Note that the first winding, the second winding, and the third winding may not be the only windings and the first inductor coil and the second inductor coil may also have any number of additional windings. With regard to the mutual magnetic coupling between the first inductor coil and the second inductor coil, the second winding of the second inductor coil is configured to have a first mutual magnetic coupling with the first winding of the first inductor coil. The third winding of the second inductor coil is configured to have a second mutual magnetic coupling with the first winding of the first inductor coil. However, the second winding is connected to the third winding such that the first mutual magnetic coupling and the second mutual magnetic coupling are in opposition. By having the first mutual magnetic coupling and the second mutual magnetic coupling in opposition, the first inductor coil and the second inductor coil may be provided in a compact arrangement while providing weak mutual magnetic coupling between the first inductor coil and the second inductor coil.
Those skilled in the art will appreciate the scope of the disclosure and realize additional aspects thereof after reading the following detailed description in association with the accompanying drawings.
The accompanying drawings incorporated in and forming a part of this specification illustrate several aspects of the disclosure, and together with the description serve to explain the principles of the disclosure.
The embodiments set forth below represent the necessary information to enable those skilled in the art to practice the disclosure and illustrate the best mode of practicing the disclosure. Upon reading the following description in light of the accompanying drawings, those skilled in the art will understand the concepts of the disclosure and will recognize applications of these concepts not particularly addressed herein. It should be understood that these concepts and applications fall within the scope of the disclosure and the accompanying claims.
It will be understood that, although the terms first, second, etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, a first element could be termed a second element, and, similarly, a second element could be termed a first element, without departing from the scope of the present disclosure. As used herein, the term “and/or” includes any and all combinations of one or more of the associated listed items.
Relative terms such as “below” or “above” or “upper” or “lower” or “horizontal” or “vertical” may be used herein to describe a relationship of one element, layer, or region to another element, layer, or region as illustrated in the Figures. It will be understood that these terms and those discussed above are intended to encompass different orientations of the device in addition to the orientation depicted in the Figures.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the disclosure. As used herein, the singular forms “a,” “an,” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms “comprises,” “comprising,” “includes,” and/or “including” when used herein specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
With regard to the term “terminus,” terminus refers to any conductive feature in an electronic component for receiving signals, transmitting signals, and/or establishing a connection to another electronic component. For instance, a terminus may be one or more nodes, ports, conductive pads, pins, solder bumps, terminals, leads, pins, and/or the like. To provide an example with regard to receiving and/or transmitting a single-ended signal, a terminus may be provided as a single terminal utilized to receive and/or transmit the single-ended signal. However, to be clear, this disclosure is not in any way limited to single-ended signals. Thus, to provide an example with regard to differential signals, a terminus may be provided as a pair of terminals for receiving and/or transmitting a positive and negative side of the differential signal.
With regard to the term “endogenous,” endogenous refers to a signal, parameter, or action being derived and/or originating internally within an electronic component. For example, a set point for a closed-loop circuit is established endogenously by the closed-loop circuit, if the set point is derived and/or originates internally within the closed-loop circuit. In contrast, with regard to the term “exogenous,” exogenous refers to a signal, parameter, or action being derived and/or originating externally from the electronic component. For example, the set point for a closed-loop circuit is established endogenously with respect to the closed-loop circuit, if the set point is derived and/or originates in external control circuitry outside of the closed-loop circuit.
Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this disclosure belongs. It will be further understood that terms used herein should be interpreted as having a meaning that is consistent with their meaning in the context of this specification and the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein.
This disclosure relates to (radio frequency) RF communication systems for transmitting and/or receiving RF signals. In particular, this disclosure relates to RF amplification devices and methods for amplifying RF signals. As such, embodiments of exemplary RF amplification devices are described herein to comprehensively explain various innovative concepts and techniques related to the disclosure. In order to help describe these innovative concepts and techniques, the exemplary RF amplification devices disclosed herein include examples of exemplary circuits and circuit elements. To further elucidate these innovative concepts and techniques, the exemplary RF amplification devices are sometimes described as being employed within certain types of RF communication systems. It should be noted that the scope of this disclosure is not limited to the exemplary RF amplification device, circuits, circuit components, and RF communication systems specifically described herein. Rather, the scope of this disclosure extends to any and all systems, devices, circuits, circuit components and methods (whether described explicitly or implicitly) in accord with the innovative concepts and techniques described in this disclosure.
The innovative concepts and techniques described in this disclosure described herein can be used to amplify an RF signal with high power efficiency and/or by introducing low distortion. While not required, the exemplary RF amplification devices may thus be used to amplify RF signals provided within various RF communication bands and/or formatted in accordance with various RF communication standards in order to allow for wide-band amplification operations. However, the exemplary RF amplification devices described may implement to operate with increased autonomy and thus provide wide-band amplification operations with less or no support from other components within the RF communication system. The exemplary RF amplification devices can thus be easily provided within the RF communication system without requiring major customization and/or coordination with other system devices.
In
As shown in
In the transmit chain(s), the RF amplification device 12 is configured to provide amplification prior to transmission by the RF communications system 10 from an antenna. As such, the RF amplification device 12 is configured to provide amplification to the RF signal 24 and generate an amplified RF signal 26. The amplified RF signal 26 is transmitted externally from a second package terminus 28 in the package interface 20 of the IC package 14 to the downstream RF system circuitry 18. A load of the RF amplification device 12 is thus provided by the downstream RF system circuitry 18, which presents a load impedance ZL at the second package terminus 28. Since this example presumes that the downstream RF system circuitry 18 is part of one or more transmit chains, the downstream RF system circuitry 18 includes the antenna of the RF communications system 10 along with an optional impedance tuner or antenna tuner. The downstream RF system circuitry 18 thus transmits the amplified RF signal 26 to the antenna, which emits the amplified RF signal 26.
The RF amplification device 12 shown in
Alternatively, other embodiments of the IC package 14 and the RF amplification device 12 may receive control outputs from the RF system control circuitry 30 depending on the particular application being implemented. Nevertheless, the features of the RF amplification device 12 shown in
The RF amplification device 12 shown in
The RF amplification circuit 36 is configured to amplify the RF signal 24 so as to generate the amplified RF signal 26. In other words, the RF amplification circuit 36 provides amplification to the RF signal 24 by transferring power from the source voltage VSOURCE to the RF signal 24 thereby generating the amplified RF signal 26. The RF amplification circuit 36 then outputs the amplified RF signal 26 after amplification from an output terminus 46 coupled to the second package terminus 28. In this manner, the amplified RF signal 26 is transmitted externally to the downstream RF system circuitry 18.
The RF amplification circuit 36 may be configured to amplify the RF signal 24 when the RF signal 24 is provided in any one of plurality of communication bands and/or is formatted in accordance with any one of a multitude of RF communication standards. Often, the RF amplification circuit 36 is divided into RF amplification stages, including one or more driver RF amplification stages and a final RF amplification stage. Alternatively, the RF amplification circuit 36 may be provided having a single amplification stage. Other circuitry may be provided in the RF amplification circuit 36 in order to provide matching and/or to provide filtering so that undesired signal components (e.g., noise, harmonics) are reduced. The RF amplification circuit 36 is configured to amplify the RF signal 24 so as to generate the amplified RF signal 26 in accordance to a transfer function of the RF amplification circuit 36. Since the transfer function of the RF amplification circuit 36 is defined from input to output, the transfer function of the RF amplification circuit 36 shown in
Accordingly, as shown in
With regard to the amplifier control circuit 38, the amplifier control circuit 38 is operably associated with the RF amplification circuit 36 and is configured to control the transfer function of the RF amplification circuit 36. To do this, the amplifier control circuit 38 is configured to generate a control output 48, which may include one or more control signals that may be utilized to control the transfer function of the RF amplification circuit 36. For example, the amplifier control circuit 38 may include biasing circuitry that generates one or more bias signals, RF power converters (i.e., Low-Drop Out Regulators, RF switching converters, charge pumps, the like, or any combination thereof) that generate one or more supply voltages from the source voltage VSOURCE to power the RF amplification circuit 36, phase shifting components, and/or control blocks that generate control signals to adjust characteristic values in the RF amplification circuit 36. As such, the control output 48 generated by the amplifier control circuit 38 may include one or more bias signals, one or more supply voltages, and/or one or more control signals from the control blocks.
As shown in
To regulate the transfer function of the RF amplification circuit 36, the closed-loop gain linearization circuit 50 and the closed-loop phase linearization circuit 52 are each configured to generate one or more control signals. These control signals may be part of the control output 48 provided by the amplifier control circuit 38 to the RF amplification circuit 36. Thus, the control signals generated by the closed-loop gain linearization circuit 50 and the closed-loop phase linearization circuit 52 may be used to directly regulate the transfer function of the RF amplification circuit 36. Additionally and/or alternatively, the control signals may be utilized as inputs to other circuitry within the amplifier control circuit 38. For example, the control signals may be used to regulate the biasing circuitry, the RF power converters, and/or may be utilized as inputs to the control blocks that generate control signals for adjusting the characteristic values in the RF amplification circuit 36. As such, the control signals generated by the closed-loop gain linearization circuit 50 and the closed-loop phase linearization circuit 52 may be used to indirectly regulate the transfer function of the RF amplification circuit 36.
The amplifier control circuit 38 is configured to receive a control input 54 from the RF amplification circuit 36. The control input 54 may include various control signals that indicate parameter values related to the performance of the RF amplification circuit 36. In this regard, the closed-loop gain linearization circuit 50 and the closed-loop phase linearization circuit 52 are closed loop because the control signals generated by the closed-loop gain linearization circuit 50 and the closed-loop phase linearization circuit 52 depend on an output (i.e., the amplified RF signal 26) of the RF amplification circuit 36 or an analog of the output. As such, the control input 54 includes at least one feedback signal 56 that depends on the amplified RF signal 26 or an analog of the amplified RF signal 26.
As mentioned above, the RF amplification device 12 can operate autonomously while still providing wide-band amplification operations. To do this, the closed-loop gain linearization circuit 50 and the closed-loop phase linearization circuit 52 each endogenously establish a set point of the amplified RF signal 26 using the RF signal 24. Accordingly, the RF amplification device 12 and the IC package 14 do not receive an external control signal from the RF communications system 10, such as a reference signal from the RF system control circuitry 30, in order to establish the set points of the closed-loop gain linearization circuit 50 and the closed-loop phase linearization circuit 52. Instead, the closed-loop gain linearization circuit 50 and the closed-loop phase linearization circuit 52 each are configured to establish their respective set points endogenously within the IC package 14. As such, the control input 54 includes at least one reference signal 58 that depends on the RF signal 24. The control input 54 may also include exogenous control signals (e.g., from other package termini) that are received by the closed-loop gain linearization circuit 50 and/or the closed-loop phase linearization circuit 52. For example, these exogenous control signals may indicate a communication band, an RF communication standard, an RF communication specification, and/or a signal frequency of the RF signal 24. These exogenous control signals may be used to change operational characteristics of the closed-loop gain linearization circuit 50 and/or the closed-loop phase linearization circuit 52, such as an operational bandwidth and/or harmonic filter frequencies of the closed-loop gain linearization circuit 50 and/or the closed-loop phase linearization circuit 52.
While the closed-loop gain linearization circuit 50 is activate, the transfer function of the RF amplification circuit 36 defines a closed-loop gain response, and while the closed-loop gain linearization circuit 50 is inactive, the transfer function of the RF amplification circuit 36 defines an open-loop gain response. The amplified RF signal 26 has a signal amplitude, which is related to a signal amplitude (i.e., signal envelope level) of the RF signal 24 by the gain of the RF amplification circuit 36. The set point endogenously established by the closed-loop gain linearization circuit 50 is a target reference amplitude of the signal amplitude of the amplified RF signal 26. The closed-loop gain linearization circuit 50 is configured to set the target reference amplitude according to a target gain magnitude of the gain of the RF amplification circuit 36. In other words, the target reference amplitude indicates what the signal amplitude of the amplified RF signal 26 should be in order to set a gain magnitude of the gain of the RF amplification circuit 36 to the target gain magnitude. As such, the set point of the closed-loop gain linearization circuit 50 is also the target gain magnitude.
Similarly, while the closed-loop phase linearization circuit 52 is activate, the transfer function of the RF amplification circuit 36 defines a closed-loop phase response and, while the closed-loop phase linearization circuit 52 is inactive, the transfer function of the RF amplification circuit 36 defines an open-loop phase response. The set point endogenously established by the closed-loop phase linearization circuit 52 is a target reference phase of the amplified RF signal 26. The amplified RF signal 26 has a signal phase, which is related to a signal phase of the RF signal 24 by a phase shift of the RF amplification circuit 36. The closed-loop gain linearization circuit 50 is configured to set the target reference phase based on the target phase magnitude of the phase shift provided by the RF amplification circuit 36. For example, if the target phase magnitude is approximately zero (0) degrees, then the target reference phase may be approximately equal to the signal phase of the RF signal 24. If the target phase magnitude is approximately one hundred eighty (180) degrees, then the target reference phase may be approximately equal to an inverse of the signal phase of the RF signal 24. By establishing the set points of the closed-loop gain linearization circuit 50 and the closed-loop phase linearization circuit 52 endogenously using the RF signal 24, the RF amplification device 12 can operate autonomously while increasing the linearity of the transfer function of the RF amplification circuit 36. In this manner, the RF amplification device 12 can provide high linearity amplification operations without requiring exogenous control signals from the RF communications system 10 that indicate the set points.
The embodiment of the amplifier control circuit 38 shown in
With regard to the semiconductor die 60 shown in
The semiconductor die 60 also includes a Back-End-of-Line (BEOL) 68, which may be formed from a non-conductive substrate and a plurality of metallic layers provided on or in the insulating substrate. The BEOL 68 is configured to couple the components on the semiconductor substrate 66 to one another. Termini may also be provided by the BEOL 68 to provide connections by external components to the IC. The BEOL 68 may also be used to form passive impedance elements.
A topology of the semiconductor die 60 formed by the semiconductor substrate 66 and the BEOL 68 that form the IC may be in accordance to any suitable semiconductor technology, such as Complementary Metal-On-Oxide Semiconductor technology (CMOS), Bipolar-Complementary Metal-On-Oxide Semiconductor technology (BiCMOS), Silicon-On-Insulator technology (SOI), and/or the like. In this embodiment, the topology of the semiconductor die 60 is provided in accordance with CMOS technology since it is inexpensive, allows the IC to be small, and allows for easy manufacturing. The closed-loop gain linearization circuit 50 (shown in
The semiconductor die 60 is mounted on the package board 62 within the IC package 14. The package board 62 may be formed by a plurality of board layers formed from a non-conductive material and metallic layers. The non-conductive material that forms the board layers may be a dielectric, a laminate, fibers, glass, ceramic, and/or the like. The dielectric may be a Silicon Oxide (SiOx), Silicon Nitride (SiNx), and/or the like. The laminate may be FR-1, FR-2, FR-3, FR-4, FR-5, FR-6, CEM-1, CEM-2, CEM-3, CEM-4, CEM-5, CX-5, CX-10, CX-20, CX-30, CX-40, CX-50, CX-60, CX-70, CX-80, CX-90, CX-100, and/or the like. The metallic layers of the package board may be used to form termini, passive impedance components, and connections. For instance, the metallic layers are used form connections between the semiconductor die 60 and the package interface 20. Also, although the RF amplification device 12 may be provided entirely by the IC formed by the semiconductor die 60, components of the RF amplification device 12 may also be formed using the metallic layers in the package board 62. The semiconductor die 60 shown in
Referring now to
Slanted lines are included between the gain calibration circuit 70 and the closed-loop gain linearization circuit 50 in order to indicate that the gain calibration circuit 70 and the closed-loop gain linearization circuit 50 may be partially integrated with one another (and thus share components) or may be independent (and thus not share components). As explained in further below, at small-signal power levels, the closed-loop gain linearization circuit 50 may be deactivated and thus the RF amplification circuit 36 may amplify the RF signal 24 in accordance with the open-loop gain response defined by the transfer function of the RF amplification circuit 36. At these small-signal power levels when the closed-loop gain linearization circuit 50 is inactive, the open-loop gain response may be substantially linear. As discussed above, while the closed-loop gain linearization circuit 50 is activate, the closed-loop gain response defined by the transfer function is also linear. However, without the gain calibration circuit 70, the gain of the RF amplification circuit 36 may be different during the closed-loop gain response and the open-loop gain response. The gain calibration circuit 70 is configured to reduce a difference between the closed-loop gain response and the open-loop gain response. For example, the gain calibration circuit 70 may be configured to substantially eliminate the difference between the closed-loop gain response and the open-loop gain response. Accordingly, the gain of the RF amplification circuit 36 may be substantially the same during the closed-loop gain response and the open-loop gain response.
With regard to the phase-calibration circuitry, slanted lines are included between the phase calibration circuit 72 and the closed-loop phase linearization circuit 52 in order to indicate that the phase calibration circuit 72 and the closed-loop phase linearization circuit 52 may be partially integrated with one another and thus share components) or may be independent (and thus not share components). As explained further below, at small-signal power levels, the closed-loop phase linearization circuit 52 may be inactive and thus the RF amplification circuit 36 may amplify the RF signal 24 in accordance with the open-loop phase response defined by the transfer function of the RF amplification circuit 36. At these small-signal power levels when the closed-loop phase linearization circuit 52 is inactive, the open-loop phase response may be substantially linear. As discussed above, while the closed-loop phase linearization circuit 52 is activate, the closed-loop phase response defined by the transfer function is also linear. However, without the phase calibration circuit 72, the phase shift of the RF amplification circuit 36 may be different during the closed-loop phase response and the open-loop phase response. The phase calibration circuit 72 is configured to reduce a difference of the closed-loop phase response and the open-loop phase response. For example, the phase calibration circuit 72 may be configured to substantially eliminate the difference between the closed-loop phase response and the open-loop phase response. Accordingly, the phase shift of the RF amplification circuit 36 may be substantially the same during the closed-loop phase response and the open-loop phase response.
The RF amplification circuit 36(1) shown in
In this embodiment, an input matching filter 74 is configured to initially receive the RF signal 24 from the input terminus 40. The input matching filter 74 is configured to substantially match an input impedance of the RF amplification circuit 36(1) to the source impedance ZS (shown in
The intermediate RF amplifier stage 36B is configured to amplify the first interstage RF signal 76 so as to generate a second interstage RF signal 80 in accordance with an amplifier gain Gintermediate. A second interstage filter 82 is coupled between the intermediate RF amplifier stage 36B and the final RF amplifier stage 36C. The second interstage filter 82 is configured to filter undesired harmonics from the second interstage RF signal 80 after amplification by the intermediate RF amplifier stage 36B. Once the first interstage RF signal 76 is amplified by the intermediate RF amplifier stage 36B and the second interstage RF signal 80 has been filtered by the second interstage filter 82, the final RF amplifier stage 36C receives the second interstage filter 82. The final RF amplifier stage 36C is configured to amplify the RF signal 24 so as to generate the amplified RF signal 26 in accordance to an amplifier gain Gfinal. As such, the gain of the RF amplification circuit 36(1) may be described as Ginitial*Gintermediate*Gfinal. An output matching filter 84 is coupled to the final RF amplifier stage 36C so as to receive the amplified RF signal 26. The output matching filter 84 is configured to substantially match an output impedance of the RF amplification circuit 36(1) to the load impedance ZL (shown in
The amplifier gain Ginitial, the amplifier gain Gintermediate, and the amplifier gain Gfinal may each be any type of amplifier gain (e.g., a voltage gain, a transconductance gain, a transresistance gain, a current gain) depending on the topology of each of the corresponding RF amplifier stages 36A, 36B, 36C. For example, the amplifier gain Ginitial, the amplifier gain Gintermediate, and the amplifier gain Gfinal may each be the same type of amplifier gain or each may be a different types of amplifier gain. As such, the gain of the RF amplification circuit 36(1) may be any type of amplifier gain depending on a combination of the types amplifier gain Ginitial, the amplifier gain Gintermediate, and the amplifier gain Gfinal provided by each of the RF amplifier stages 36A, 36B, 36C.
Note that as amplification progresses through the sequence of the RF amplifier stages 36A, 36B, 36C, each of the RF amplifier stages 36A, 36B, 36C, handles an increasing amount of power. Therefore, the initial RF amplifier stage 36A handles the least amount of power, since it receives the RF signal 24 prior to amplification and transmits the first interstage RF signal 76 amplified only in accordance with the amplifier gain Ginitial. In one embodiment, the amplifier gain Ginitial is a voltage gain. Thus, the initial RF amplifier stage 36A amplifies the RF signal 24 such that the amplifier gain Ginitial approximately describes a proportion between a voltage level of the first interstage RF signal 76 and a voltage level of the RF signal 24.
When the intermediate RF amplifier stage 36B receives the first interstage RF signal 76, the first interstage RF signal 76 has already been amplified by the amplifier gain Ginitial. The intermediate RF amplifier stage 36B further amplifies the first interstage RF signal 76 and generates the second interstage RF signal 80. Thus, the intermediate RF amplifier stage 36B transmits the second interstage RF signal 80 amplified in accordance with the amplifier gain Ginitial Gintermediate. As a result, the intermediate RF amplifier stage 36B handles an intermediate amount of power. In one embodiment, the amplifier gain Gintermediate is a transconductance gain. Thus, the intermediate RF amplifier stage 36B amplifies the first interstage RF signal 76 such that the amplifier gain Gintermediate approximately describes a proportion between a current level of the second interstage RF signal 80 and the voltage level of the first interstage RF signal 76.
With regard to the final RF amplifier stage 36C, the final RF amplifier stage 36C receives the second interstage RF signal 80 amplified in accordance with the aggregate amplifier gain Ginitial Gintermediate. As such, when the final RF amplifier stage 36C further amplifies the second interstage RF signal 80 so as to generate the amplified RF signal 26. In one embodiment, the amplifier gain Gfinal is a current gain. Thus, the final RF amplifier stage 36C amplifies the second interstage RF signal 80 such that the amplifier gain Gfinal approximately describes a proportion between a current level of the amplified RF signal 26 and the current level of the second interstage RF signal 80. The final RF amplifier stage 36C thus transmits the amplified RF signal 26 amplified in accordance with the (total) gain (Ginitial Gintermediate Gfinal) of the RF amplification circuit 36(1). As such, the final RF amplifier stage 36C handles the most power. Furthermore the (total) gain of the RF amplification circuit 36(1) is a transconductance gain.
Alternatively, the amplifier gain Gfinal of the final RF amplifier stage 36C may be a transconductance gain. In this of embodiment, the output matching filter 84 may be configured to present an input impedance that converts a current level of the amplified RF signal 26 provided by the final RF amplifier stage 36C into a voltage level. Additionally, in another alternative embodiment, the amplifier gain Gintermediate of the intermediate RF amplifier stage 36B is a transconductance gain, and a load impedance of the second interstage filter 82 converts a current level of the second interstage RF signal 80 into a voltage level.
The TRP VSWR circuit 86 is a closed-loop feedback control circuit configured to make a VSWR measurement and adjust a feedback gain of the closed-loop gain linearization circuit 50 in accordance with the VSWR measurement. For example, the TRP VSWR circuit 86 may be configured to adjust the feedback gain of the closed-loop gain linearization circuit 50 in accordance with the VSWR measurement so as to maintain an output power level of the amplified RF signal 26 substantially constant over a range of the load impedance ZL(shown in
In this embodiment, the closed-loop gain linearization circuit 50 and the gain calibration circuit 70 are partially amalgamated since the closed-loop gain linearization circuit 50 and the gain calibration circuit 70 share the gain error detection circuit 88. Alternatively, the closed-loop gain linearization circuit 50 and the gain calibration circuit 70 may each have independent error detection circuits (like the gain error detection circuit 88) and may thus be independent of one another. In this embodiment, the gain error detection circuit 88 is configured to receive the first feedback signal 106 and a first reference signal 110 having a reference signal level that is indicative of a power level of the RF signal 24. Using the first reference signal 110, the gain error detection circuit 88 is configured to set the set point of the closed-loop gain linearization circuit, which is indicative of the target reference amplitude of the amplified RF signal 26. The set point therefore further indicates the target gain magnitude, and is established based on the reference signal level of the first reference signal 110. By having the TRP VSWR circuit 86 adjust the feedback gain based on the VSWR measurement and using the first feedback signal 106, the gain error detection circuit 88 is configured to provide feedback indicative of a signal power level of the amplified RF signal 26. The gain error detection circuit 88 is configured to compare the feedback and the set point to generate a gain error signal 114 having an error signal level indicative of a power level error between the feedback and the set point. For example, the reference signal level may indicate a current level of the amplified RF signal 26. Given an impedance value of the load impedance ZL (shown in
The gain error signal 114 is provided to the closed-loop gain linearization circuit 50(1) and the gain calibration circuit 70(1). With regard to the gain calibration circuit 70(1), the gain calibration circuit 70(1) is configured to use the gain error signal 114 to determine calibration points as explained in further detail below. In this embodiment, the gain calibration circuit 70(1) is operably associated with the driver stage gain control block 90A and the final stage gain control block 90C. As shown in the following description, two or more gain control blocks 90A, 90C can be provided to operate with more than one of the RF amplifier stages 36A, 36B, 36C. In this embodiment, the gain calibration circuit 70(1) is configured to generate a first gain calibration signal 116 which is received by the driver stage gain control block 90A and a second gain calibration signal 118 which is received by the final stage gain control block 90C. The driver stage gain control block 90A is configured to generate a control signal C1 that sets the gain of the intermediate RF amplifier stage 36B while the final stage gain control block 90C is configured to generate a control signal C2 that sets the gain of the final RF amplifier stage 36C. With the first gain calibration signal 116 and the second gain calibration signal 118, the gain calibration circuit 70(1) is configured to control the driver stage gain control block 90A and the final stage gain control block 90C and thereby control the gain of the RF amplification circuit 36(1). As explained in further detail below, the gain calibration circuit 70(1) controls the gain of the RF amplification circuit 36(1) in order to reduce the difference between the open-loop gain response and closed-loop gain response of the RF amplification circuit 36(1). In one exemplary embodiment, the driver stage gain control block 90A is an impedance control and the control signal C1 is an impedance control signal that sets an internal impedance level of the intermediate RF amplifier stage 36B. Additionally, the final stage gain control block 90C is a final stage biasing circuit and the control signal C2 is a bias signal that sets a quiescent operating level of the final RF amplifier stage 36C. In alternative embodiments, the gain control blocks 90A, 90C may be configured to control other operational characteristics such as biasing, impedance, and the like.
With regard to the closed-loop gain linearization circuit 50(1), the closed-loop gain linearization circuit 50(1) is configured to adjust the gain of the RF amplification circuit 36(1) in accordance to the gain error signal 114 while activated so as to maintain the gain of the RF amplification circuit 36(1) relatively constant. In this embodiment, the closed-loop gain linearization circuit 50(1) is operably associated with the driver stage gain control block 90B and the final stage gain control block 90D. The closed-loop gain linearization circuit 50(1) is configured to generate a first gain control signal 120 which is received by the driver stage gain control block 90B and a second gain control signal 122 which is received by the final stage gain control block 90D. The driver stage gain control block 90B is configured to generate a control signal C3 that sets the gain of the intermediate RF amplifier stage 36B while the final stage gain control block 90D 90CF is configured to generate a control signal C4 that sets the gain of the final RF amplifier stage 36C. With the first gain control signal 120 and the second gain control signal 122, the closed-loop gain linearization circuit 50(1) is configured to control the driver stage gain control block 90B and the final stage gain control block 90D and thereby control the gain of the RF amplification circuit 36(1). As explained in further detail below, the closed-loop gain linearization circuit 50(1) regulates the gain of the RF amplification circuit 36(1) in order to maintain the closed-loop gain response of the RF amplification circuit 36(1) substantially constant. In one exemplary embodiment, the driver stage gain control block 90B is an impedance control block with a low pass filter and the control signal C3 is an impedance control signal that sets an internal impedance level of the intermediate RF amplifier stage 36B. Additionally, the final stage gain control block 90D is a biasing circuit with a low pass filter and the control signal C4 is a bias signal that sets the quiescent operating level of the final RF amplifier stage 36C.
With regard to phase control, the closed-loop phase linearization circuit 52(1) and the phase calibration circuit 72(1) are partially amalgamated since the closed-loop phase linearization circuit 52(1) and the phase calibration circuit 72(1) share a phase error detection circuit 100. Alternatively, the closed-loop phase linearization circuit 52(1) and the phase calibration circuit 72(1) may each have independent error detection circuits (like the phase error detection circuit 100) and may thus be independent of one another. In this embodiment, the phase error detection circuit 100 is configured to receive a third feedback signal 124 having a third feedback signal level that indicates a phase of the amplified RF signal 26 and a second reference signal 126 having a second reference signal level that is indicative of a phase of the RF signal 24. Using the second reference signal 126, the phase error detection circuit 100 is configured to set the set point of the closed-loop phase linearization circuit 52(1), which is indicative of a target phase shift of the RF amplification circuit 36(1). The phase error detection circuit 100 is also configured to compare measure the phase shift of the RF amplification circuit 36(1) using the third feedback signal 124 and the second reference signal 126 as feedback. The phase error detection circuit 100 generates an phase error signal 115 having an error signal level indicative of a phase shift error between the feedback and the set point (reference).
The phase error signal 115 is provided to the closed-loop phase linearization circuit 52(1) and the phase calibration circuit 72(1). With regard to the phase calibration circuit 72(1), the phase calibration circuit 72(1) is configured to use the phase error signal 115 to determine calibration points as explained in further detail below. In this embodiment, the phase calibration circuit 72(1) is operably associated with the driver stage phase control block 90E and the final stage phase control block 90G. The phase calibration circuit 72(1) is configured to generate a first phase calibration signal 128 which is received by the driver stage phase control block 90E and a second phase calibration signal 130 which is received by the final stage phase control block 90G. The driver stage phase control block 90E is configured to generate a control output C5 that sets a phase shift of the intermediate RF amplifier stage 36B while the final stage phase control block 90G is configured to generate a control output C6 that sets a phase shift of the final RF amplifier stage 36C. With the first phase calibration signal 128 and the second phase calibration signal 130, the phase calibration circuit 72(1) is configured to control the driver stage phase control block 90E and the final stage phase control block 90G and thereby regulate the phase shift of the RF amplification circuit 36. As explained in further detail below, the phase calibration circuit 72(1) controls the phase shift of the RF amplification circuit 36 in order to reduce the difference between the open-loop phase response and closed-loop phase response of the RF amplification circuit 36. In one exemplary embodiment, the driver stage phase control block 90E is an impedance control circuit and the control output C5 is a control word that sets a capacitance of a capacitor bank in the first interstage filter 78. Additionally, the final stage phase control block 90G is an impedance control circuit and the control output C6 is a control word that sets a capacitance of a capacitor bank in the second interstage filter 82.
With regard to the closed-loop phase linearization circuit 52(1), the closed-loop phase linearization circuit 52(1) is configured to adjust the phase shift of the RF amplification circuit 36 in accordance to the phase error signal 115 while activated so as to maintain the phase shift of the RF amplification circuit 36 relatively constant. In this embodiment, the closed-loop phase linearization circuit 52(1) is operably associated with the driver stage phase control block 90F and the final stage phase control block 901. The closed-loop phase linearization circuit 52(1) is configured to generate a first phase control signal 132 which is received by the driver stage phase control block 90F and a second phase control signal 134 which is received by the final stage phase control block 901. The driver stage phase control block 90F is configured to set the phase shift of the first interstage filter 78 and/or the intermediate RF amplifier stage 36B using the first phase control signal 132, while the final stage phase control block 901 is configured to set the phase shift of the second interstage filter 82 and/or the final RF amplifier stage 36C using the second phase control signal 134. In this manner, the closed-loop phase linearization circuit 52(1) is configured to control the phase shift of the RF amplification circuit 36(1). In one exemplary embodiment, the driver stage phase control block 90F is a varactor and the first phase control signal 132 is used to set a variable capacitance of the varactor. Additionally, the final stage phase control block 901 may also be a varactor and the second phase control signal 134 is used to set a variable capacitance of the varactor.
To avoid the use of bulky couplers for power detection, a first final stage replica amplifier 92 is configured to generate the first feedback signal 106. As mentioned above, the first feedback signal level of the first feedback signal 106 is indicative of the current level of the amplified RF signal 26. However, in this embodiment, the first feedback signal 106 is not generated as direct feedback resulting from the amplified RF signal 26. Instead, the first final stage replica amplifier 92 is configured to generate the first feedback signal 106 as an analog of the amplified RF signal 26. The first final stage replica amplifier 92 is a scaled-down version of the final RF amplifier stage 36C and is coupled to receive the second interstage RF signal 80 just like the final RF amplifier stage 36C. The first final stage replica amplifier 92 is configured to generate the first feedback signal 106 such that the first feedback signal level is a scaled down replication of the current level of the amplified RF signal 26. Since the first feedback signal 106 is not filtered by the output matching filter 84, the first harmonic filter 96 is configured to filter high-frequency harmonics from the first feedback signal 106 and increase the performance of the gain error detection circuit 88. Furthermore, it should be noted that the TRP VSWR circuit 86 is coupled to receive the second feedback signal 108 before the amplified RF signal 26 is filtered by the output matching filter 84. This avoids a propagation delay of the output matching filter 84, which can be detrimental to the operations of the TRP VSWR circuit 86.
The second final stage replica amplifier 94 shown in
With regard to reference paths, the third harmonic filter 102 is configured to filter signal components (e.g., noise, harmonics) from the first reference signal 110 and increase the performance of the gain error detection circuit 88. In this manner, the input matching filter 74 can provide impedance matching with the source impedance ZS (shown in
Referring again to
With respect to the third harmonic filter 102 shown in
As shown in
As shown in
The mutual magnetic couplings of the windings 212 of the second inductor coil 208 with the windings 210 of the first inductor coil 206 aggregate to provide a mutual magnetic coupling K1 between the first inductor coil 206 and the windings 212 of the second inductor coil 208. The mutual magnetic couplings of the windings 214 of the second inductor coil 208 with the windings 210 of the first inductor coil 206 aggregate to provide a mutual magnetic coupling K2 between the first inductor coil 206 and the windings 214 of the second inductor coil 208. The mutual magnetic coupling K1 and the mutual magnetic coupling K2 are in opposition so as to provide an aggregate mutual magnetic coupling Keq (i.e., K1-K2) between the first inductor coil 206 and the second inductor coil 208. In this embodiment, the mutual magnetic coupling K1 and the mutual magnetic coupling K2 are not equal (i.e., K1≠K2). Therefore, the mutual magnetic coupling K1 and the mutual magnetic coupling K2 do not cancel and the RF signal 200 is transferred from the first inductor coil 206 to the second inductor coil 208 by a magnetic flux generated by the first inductor coil 206 in response to the RF signal 200.
To provide the mutual magnetic couplings of the windings 212 with the windings 210 and the mutual magnetic couplings of the windings 214 with the windings 210 in opposition, the windings 212 may be connected to the windings 214 such that the RF signal 202 propagates in substantially opposite rotational directions along the windings 212 and the windings 214. In some embodiments, the aggregate mutual magnetic coupling Keq between the first inductor coil 206 and the second inductor coil 208 is simply reduced. Thus, with regard to the weak magnetically coupled inductor structure 204 shown in
In the embodiment shown in
With respect to the RF filter 200 shown in
As shown in
The winding 212(1) has a first mutual magnetic coupling with the winding 210(1), and the winding 214(1) has a second mutual magnetic coupling with the winding 214(1). To provide weak mutual magnetic coupling, the winding 212(1) and the winding 214(1) are connected so as to be wound in opposite rotational directions. More specifically, the winding 212(1) is wound in a counterclockwise direction (CCW) so that the RF signal 202 propagates in the counterclockwise direction CCW along the winding 212(1). The winding 214(1) is wound in a clockwise direction (CW) so that the RF signal 202 propagates in the clockwise direction CW along the winding 214(1). In this manner, the winding 212(1) and the winding 214(1) of the second inductor coil 208 are connected such that the first mutual magnetic coupling and the second mutual magnetic coupling with the winding 210(1) of the first inductor coil 206 are in opposition. The area and/or perimeter of the winding 212(1) and the winding 214(1) may be different such that the mutual magnetic couplings with the winding 210(1) do not cancel. As such, the first inductor coil 206 and the second inductor coil 208 have weak mutual magnetic coupling, which results in net electric coupling in a given direction.
In some embodiments, the winding 212(1) and the winding 214(1) of the second inductor coil 208 are connected such that the first mutual magnetic coupling and the second mutual magnetic coupling are in opposition and substantially cancel the mutual magnetic coupling between the first inductor coil 206 and the second inductor coil 208. For example, an area enclosed by the winding 212(1) may be substantially equal to an area enclosed by the winding 214(1). As such, the winding 212(1) and the winding 214(1) may each have mutual electric coupling with the winding 210(1) to transfer the RF signal 202 from the first inductor coil 206 to the second inductor coil 208. In this case, the winding 212(1) may be configured so that a mutual electric coupling between the winding 212(1) and the winding 210(1) is symmetric with the mutual electric coupling between the winding 214(1) and the winding 210(1), which results in net electric coupling in a given direction.
In other embodiments, the winding 212(1) and the winding 214(1) of the second inductor coil 208 are connected such that the first mutual magnetic coupling and the second mutual magnetic coupling are in opposition, but do not substantially cancel the mutual magnetic coupling between the first inductor coil 206 and the second inductor coil 208. For example, the area enclosed by the winding 212(1) may be larger or smaller than the area enclosed by the winding 214(1). As such, the first mutual magnetic coupling and the second mutual magnetic coupling may transfer the RF signal 202 (or part of the RF signal 202). Additionally, the winding 212(1) and the winding 214(1) may each have mutual electric coupling with the winding 210(1) to also transfer the RF signal 202 (or a part of the RF signal 202) from the first inductor coil 206 to the second inductor coil 208. In this case, the winding 212(1) may be configured so that the mutual electric coupling between the winding 212(1) and the winding 210(1) is asymmetric with the mutual electric coupling between the winding 214(1) and the winding 210(1). This can be used to provide very small but controlled mutual coupling factors.
Note that the winding 212(1) and the winding 214(1) are wound around separate axes 232, 234, respectively, and thus are not coaxial. Also, the second inductor coil 208 is wound in the counterclockwise direction CCW so that the RF signal 202 propagates along a section S1 of the winding 212(1) in the counterclockwise direction CCW from the output terminal 224 to a locale R. At the locale R, the second inductor coil 208 is wound in the clockwise direction CW to form the winding 214(1), where the RF signal 202 propagates around the winding 214(1) in the clockwise direction CW back to the locale R. At the locale R, the second inductor coil 208 again is wound in the counterclockwise direction CCW to form a section S2 of the winding 212(1) from the locale R to the output terminal 222. As such, the RF signal 202 propagates along the section S2 from the locale R to the output terminal 222.
The winding 212(2) has a first mutual magnetic coupling with the winding 210(1), the winding 212(3) has a second mutual magnetic coupling with the winding 210(1), the winding 214(2) has a third mutual magnetic coupling with the winding 210(1), and the winding 214(3) has a fourth mutual magnetic coupling with the winding 210(1). To provide weak mutual magnetic coupling, the windings 212(2), 212(3) are each connected to the windings 214(2), 214(3) so as to be wound in opposite rotational directions. More specifically, the windings 212(2), 212(3) are each wound in the counterclockwise direction CCW so that the RF signal 202 propagates in the counterclockwise direction CCW along each of the windings 212(2), 212(3). The windings 214(2), 214(3) are wound in the clockwise direction CW so that the RF signal 202 propagates in the clockwise direction CW along each of the windings 214(2), 214(3). In this manner, the windings 212(2), 212(3) and the windings 214(2), 214(3) of the second inductor coil 208 are connected such that the first mutual magnetic coupling and the second mutual magnetic coupling with the winding 210(1) of the first inductor coil 206 are in opposition to the third mutual magnetic coupling and the fourth mutual magnetic coupling with the winding 210(1) of the first inductor coil 206. As such, the first inductor coil 206 and the second inductor coil 208 have weak mutual magnetic coupling.
In some embodiments, the windings 212(2), 212(3) each enclose an area of the same size, and the windings 214(2), 214(3) also each enclose an area of the same size. However, the area enclosed by each of the windings 212(2), 212(3) is somewhat larger than the area enclosed by each of the windings 214(2), 214(3). As such, the mutual magnetic coupling between the first inductor coil 206 and the second inductor coil 208, although weak, may be used to transfer the RF signal 202 (or part of the RF signal 202). Additionally, the windings 212(2), 212(3), 214(2), 214(3) may each have mutual electric coupling with the winding 210(1) to also transfer the RF signal 202 from the first inductor coil 206 to the second inductor coil 208. In this case, each of the mutual electric couplings between the windings 212(2), 212(3) and the winding 210(1) is asymmetric with respect to each of the mutual electric couplings between the windings 214(2), 214(3) and the winding 210(1).
Note that the windings 212(2), 212(3), 214(2), 214(3) are wound around separate axes 238, 240, 242, 244 respectively, and thus are not coaxial. Also, the second inductor coil 208 is wound in the counterclockwise direction CCW so that the RF signal 202 propagates along a section S3 of the winding 212(2) in the counterclockwise direction CCW from the output terminal 224 to the locale R. At the locale R, the second inductor coil 208 is wound in the clockwise direction CW to form the winding 214(2), where the RF signal 202 propagates around the winding 214(2) in the clockwise direction CW back to the locale R. At the locale R, the second inductor coil 208 is wound in the counterclockwise direction CCW to form the winding 212(3), where the RF signal 202 propagates around the winding 212(3) in the counterclockwise direction CCW back to the locale R. At the locale R, the second inductor coil 208 is wound in the clockwise direction CW to form the winding 214(3), where the RF signal 202 propagates around the winding 214(3) in the clockwise direction CW back to the locale R. At the locale R, the RF signal 202 again is wound in the counterclockwise direction CCW to form a section S4 of the winding 212(2) from the locale R to the output terminal 222. As such, the RF signal 202 propagates along the section S2 from the locale R to the output terminal 222.
Also, the first inductor coil 206 is wound in the clockwise direction CW so that the RF signal 202 propagates along a section S5 of the winding 210(2) in the clockwise direction CW from the input terminal 218 to a locale G. At the locale G, the first inductor coil 206 continues to be wound in the clockwise direction CW but is displaced from the perimeter 246 to the perimeter 248 to form the winding 210(3), where the RF signal 202 propagates around the winding 210(3) in the clockwise direction CW back to the locale G. At the locale G, the first inductor coil 206 continues to be wound in the clockwise direction CW but is displaced from the perimeter 248 back to perimeter 246 to form the section S6 of the winding 210(2), where the RF signal 202 propagates along the section S6 to the input terminal 220.
With respect to the second inductor coil 208, the second inductor coil 208 includes the winding 212(1) and the winding 214(1) described above with respect to
To provide for weak mutual magnetic coupling between the first inductor coil 206 and the second inductor coil 208, the winding 212(1) of the second inductor coil 208 has a first mutual magnetic coupling with the winding 210(2) and a second mutual magnetic coupling with the winding 210(3) of the first inductor coil 206, while the winding 214(1) of the second inductor coil 208 has a third mutual magnetic coupling with the winding 210(2) and a fourth mutual magnetic coupling with the winding 210(3) of the first inductor coil 206. The winding 212(1) is connected to the winding 214(1) by the second inductor coil 208 such that the winding 212(1) and the winding 214(1) are wound in opposite rotational directions. In this manner, the first mutual magnetic coupling and the second mutual magnetic coupling are in opposition to the third mutual magnetic coupling and the fourth mutual magnetic coupling. As such, the first inductor coil 206 and the second inductor coil 208 have weak mutual magnetic coupling. A size of the area enclosed by the winding 212(1) with respect to a size of the area enclosed by the winding 214(1) determines how much mutual magnetic coupling there is between the first inductor coil 206 and the second inductor coil 208, as described above with respect to
With regard to the embodiment of the second inductor coil 208 shown in
The winding 212(4) has a first mutual magnetic coupling with the winding 210(4), the winding 212(5) has a second mutual magnetic coupling with the winding 210(4), the winding 212(4) has a third mutual magnetic coupling with the winding 210(5), the winding 212(5) has a fourth mutual magnetic coupling with the winding 210(5), the winding 214(4) has a fifth mutual magnetic coupling with the winding 210(4), the winding 214(5) has a sixth mutual magnetic coupling with the winding 210(4), the winding 214(4) has a seventh mutual magnetic coupling with the winding 210(5), and the winding 214(5) has an eighth mutual magnetic coupling with the winding 210(5). To provide weak mutual magnetic coupling, the windings 212(4), 212(5) are connected to the windings 214(4), 214(5) so as to be wound in opposite rotational directions. In this manner, the windings 212(2), 212(3) and the windings 214(4), 214(5) of the second inductor coil 208 are connected such that the first mutual magnetic coupling, the second mutual magnetic coupling, the third mutual magnetic coupling, and the fourth mutual magnetic coupling are in opposition to the fifth mutual magnetic coupling, the sixth mutual magnetic coupling, the seventh mutual magnetic coupling, and the eighth mutual magnetic coupling. As such, the first inductor coil 206 and the second inductor coil 208 have weak mutual magnetic coupling. A size of an area and/or perimeter enclosed by each of the windings 212(4), 212(5) with respect to a size of an area and/or perimeter enclosed by each of the windings 214(4), 214(5) determines how much mutual magnetic coupling there is between the first inductor coil 206 and the second inductor coil 208. Also, similar to the embodiment described above with regard to
With regard to the embodiment of the second inductor coil 208 shown in
As mentioned above, the N number of the windings 210A-210N, the M number of the windings 212A-212M, and the 0 number of the windings 214A-214O may each be arbitrary numbers. An order of the windings 212A-212M and of the windings 214A-214O can also be arbitrary. In
Realizing the first inductor coil 206 and the second inductor coil 208 in the same plane P (e.g., using the same metallic layer 254) is inexpensive since it reduces the number of metallic layers (such as the metallic layer 254) required to build the weak magnetically coupled inductor structure 204(3). In some embodiments, the metallic layer 254 used to form the first inductor coil 206 and the second inductor coil 208 may be thicker than other typical metallic layers in the substrate 256. Although this may increase cost, having the windings 210(2), 210(3), 212(1), 214(1) in the same plane P allows for the winding 212(1) and the winding 214(1) to enclose a smaller area. In some embodiments, this may result in larger losses and a lower quality factor, which may translate into potentially out-of-band attenuation.
In this embodiment, the weak magnetically coupled inductor structure 204(6) is also formed with the substrate 256. However, while the windings 210(2), 210(3), 210(6) of the first inductor coil 206 are formed by the metallic layer 254 on the surface 258 of the substrate 256, the windings 212(1), 214(1) of the second inductor coil 208 are formed by a metallic layer 262, not the metallic layer 254. The windings 212(1), 214(1) are thus in a plane P1 that is substantially parallel to but below the plane P. The projection of the winding 212(1) and the projection of the winding 214(1) onto the plane P defined by the windings 210(2), 210(3), 210(6) of the first inductor coil 206 are enclosed in the perimeter 246 of the winding 210(2). Therefore, the winding 212(1) and the winding 214(1) are provided in a compact arrangement. However, since the windings 212(1) and 214(1) are wound in opposite rotational directions (as explained above with respect to
With regard to the IC package 14 illustrated in
In alternative embodiments, more than two metallic layers can be used. For example, one of the inductor coils 206, 208 can be formed using more than two metallic layers. The inductor coils 206, 208 can also be implemented using separate groups of metallic layers, or they can be intermingled. The multiple metallic layers can all be realized in the same processing flow (e.g., semiconductor IC, laminate, integrated passive die (IPD), etc.), or they may be realized in different processing flows and the weakly coupled inductor structures formed through assembly. For example, one of the inductor coils 206, 208 may be realized on a silicon (Si) die and the other one of the inductor coils 206, 208 may be realized on a laminate or IPD.
Those skilled in the art will recognize improvements and modifications to the embodiments of the present disclosure. All such improvements and modifications are considered within the scope of the concepts disclosed herein and the claims that follow.
The present application is a Divisional of U.S. utility patent application Ser. No. 14/215,800, filed Mar. 17, 2014, now U.S. Pat. No. 9,966,905, which claims the benefit of and priority to U.S. Provisional Patent Application No. 61/793,583, filed Mar. 15, 2013; U.S. Provisional Patent Application No. 61/789,508, filed Mar. 15, 2013; U.S. Provisional Patent Application No. 61/800,772, filed Mar. 15, 2013; U.S. Provisional Patent Application No. 61/800,991, filed Mar. 15, 2013; U.S. Provisional Patent Application No. 61/801,038, filed Mar. 15, 2013; U.S. Provisional Patent Application No. 61/946,270, filed Feb. 28, 2014; and U.S. Provisional Patent Application No. 61/946,927, filed Mar. 3, 2014. The present application is related to U.S. Pat. No. 9,294,045, entitled “GAIN AND PHASE CALIBRATION FOR CLOSED LOOP FEEDBACK LINEARIZED AMPLIFIERS”; U.S. Pat. No. 9,742,359, entitled “POWER AMPLIFIER WITH WIDE DYNAMIC RANGE AM FEEDBACK LINEARIZATION SCHEME”; U.S. Pat. No. 9,294,046, entitled “RF POWER AMPLIFIER WITH PM FEEDBACK LINEARIZATION”; U.S. Pat. No. 9,444,411, entitled “RF POWER AMPLIFIER WITH TOTAL RADIATED POWER STABILIZATION”; U.S. Pat. No. 9,391,565, entitled “AMPLIFIER PHASE DISTORTION CORRECTION BASED ON AMPLITUDE DISTORTION MEASUREMENT”; and U.S. Pat. No. 9,748,905, entitled “RF REPLICATOR FOR ACCURATE MODULATED AMPLITUDE AND PHASE MEASUREMENT.” All of the patents and applications listed above are incorporated herein by reference in their entireties.
| Number | Name | Date | Kind |
|---|---|---|---|
| 2014524 | Franz | Sep 1935 | A |
| 2874360 | Eisler | Feb 1959 | A |
| 3465431 | Henning | Sep 1969 | A |
| 3491318 | Henning et al. | Jan 1970 | A |
| 3597709 | Rhodes | Aug 1971 | A |
| 3718874 | Cooper, Jr. | Feb 1973 | A |
| 3794941 | Templin | Feb 1974 | A |
| 4296440 | Rosenheck | Oct 1981 | A |
| 4361894 | Kurihara et al. | Nov 1982 | A |
| 4484345 | Stearns | Nov 1984 | A |
| 4816784 | Rabjohn | Mar 1989 | A |
| 4894566 | Rush | Jan 1990 | A |
| 5150901 | Stawicki | Sep 1992 | A |
| 5296831 | Suzuki | Mar 1994 | A |
| 5339017 | Yang | Aug 1994 | A |
| 5517083 | Whitlock | May 1996 | A |
| 5608363 | Cameron et al. | Mar 1997 | A |
| 5661414 | Shigehara et al. | Aug 1997 | A |
| 5689144 | Williams | Nov 1997 | A |
| 5757247 | Koukkari et al. | May 1998 | A |
| 5841330 | Wenzel et al. | Nov 1998 | A |
| 5880620 | Gitlin et al. | Mar 1999 | A |
| 5896073 | Miyazaki et al. | Apr 1999 | A |
| 5963557 | Eng | Oct 1999 | A |
| 6215374 | Petrovic | Apr 2001 | B1 |
| 6233438 | Wynn | May 2001 | B1 |
| 6239673 | Wenzel et al. | May 2001 | B1 |
| 6529750 | Zhang et al. | Mar 2003 | B1 |
| 6664873 | Tiihonen | Dec 2003 | B2 |
| 6801102 | Shamsaifar et al. | Oct 2004 | B2 |
| 7015870 | Guitton et al. | Mar 2006 | B2 |
| 7116186 | Chen | Oct 2006 | B2 |
| 7164339 | Huang | Jan 2007 | B2 |
| 7262680 | Wang | Aug 2007 | B2 |
| 7336939 | Gomez | Feb 2008 | B2 |
| 7573350 | Frank | Aug 2009 | B2 |
| 7652532 | Li et al. | Jan 2010 | B2 |
| 7733207 | Yun et al. | Jun 2010 | B2 |
| 7741943 | Fouquet et al. | Jun 2010 | B2 |
| 7795995 | White et al. | Sep 2010 | B2 |
| 7809349 | Granger-Jones et al. | Oct 2010 | B1 |
| 7825751 | Kawaguchi et al. | Nov 2010 | B2 |
| 7852186 | Fouquet et al. | Dec 2010 | B2 |
| 7917106 | Drogi et al. | Mar 2011 | B2 |
| 7970360 | Pei | Jun 2011 | B2 |
| 7973633 | Noma et al. | Jul 2011 | B2 |
| 8013674 | Drogi et al. | Sep 2011 | B2 |
| 8103233 | Im et al. | Jan 2012 | B2 |
| 8126409 | Osman et al. | Feb 2012 | B2 |
| 8175551 | Akaiwa | May 2012 | B2 |
| 8193781 | Lin et al. | Jun 2012 | B2 |
| 8204446 | Scheer et al. | Jun 2012 | B2 |
| 8258911 | Fouquet | Sep 2012 | B2 |
| 8269575 | Frye | Sep 2012 | B2 |
| 8314653 | Granger-Jones et al. | Nov 2012 | B1 |
| 8344806 | Franck et al. | Jan 2013 | B1 |
| 8346179 | Brunn et al. | Jan 2013 | B2 |
| 8369250 | Khlat | Feb 2013 | B1 |
| 8400232 | Leong | Mar 2013 | B2 |
| 8410846 | Zare-Hoseini | Apr 2013 | B2 |
| 8620233 | Brobston | Dec 2013 | B2 |
| 8624678 | Scott et al. | Jan 2014 | B2 |
| 8626083 | Greene et al. | Jan 2014 | B2 |
| 8653888 | Watanabe | Feb 2014 | B2 |
| 8653890 | Ahmed et al. | Feb 2014 | B1 |
| 8736511 | Morris, III | May 2014 | B2 |
| 8742871 | Jin et al. | Jun 2014 | B2 |
| 8749310 | Hayes | Jun 2014 | B2 |
| 8751993 | Fenzi et al. | Jun 2014 | B1 |
| 8791769 | Leong et al. | Jul 2014 | B2 |
| 8803632 | Takeuchi | Aug 2014 | B2 |
| 8803634 | Hanaoka | Aug 2014 | B2 |
| 8829995 | Cohen | Sep 2014 | B2 |
| 8841983 | Newton et al. | Sep 2014 | B2 |
| 8862089 | Wang et al. | Oct 2014 | B2 |
| 8884714 | Carey et al. | Nov 2014 | B2 |
| 8977216 | Weissman et al. | Mar 2015 | B2 |
| 9002309 | Sahota et al. | Apr 2015 | B2 |
| 9054648 | Xu | Jun 2015 | B1 |
| 9094104 | Din et al. | Jul 2015 | B2 |
| 9124355 | Black et al. | Sep 2015 | B2 |
| 9196406 | Leipold et al. | Nov 2015 | B2 |
| 9203455 | Yang et al. | Dec 2015 | B2 |
| 9369162 | Lo et al. | Jun 2016 | B2 |
| 9391650 | Kparin | Jul 2016 | B2 |
| 9444417 | Maxim et al. | Sep 2016 | B2 |
| 9608595 | Raihn et al. | Mar 2017 | B1 |
| 9628045 | Leipold et al. | Apr 2017 | B2 |
| 9698751 | Leipold et al. | Jul 2017 | B2 |
| 20010020877 | Hasegawa et al. | Sep 2001 | A1 |
| 20020057139 | Matsumura et al. | May 2002 | A1 |
| 20020095778 | Ahn et al. | Jul 2002 | A1 |
| 20020186378 | Tazartes et al. | Dec 2002 | A1 |
| 20020190795 | Hoang | Dec 2002 | A1 |
| 20030008577 | Quigley et al. | Jan 2003 | A1 |
| 20030008628 | Lindell et al. | Jan 2003 | A1 |
| 20030128084 | Chang et al. | Jul 2003 | A1 |
| 20030151409 | Marek | Aug 2003 | A1 |
| 20030155988 | Douziech et al. | Aug 2003 | A1 |
| 20030222732 | Matthaei | Dec 2003 | A1 |
| 20040121741 | Rashev et al. | Jun 2004 | A1 |
| 20040127178 | Kuffner | Jul 2004 | A1 |
| 20040130414 | Marquardt et al. | Jul 2004 | A1 |
| 20040162042 | Chen et al. | Aug 2004 | A1 |
| 20040182602 | Satoh | Sep 2004 | A1 |
| 20040196085 | Shen | Oct 2004 | A1 |
| 20040222868 | Rattigeber et al. | Nov 2004 | A1 |
| 20040227578 | Hamalainen | Nov 2004 | A1 |
| 20040266378 | Fukamachi et al. | Dec 2004 | A1 |
| 20050123064 | Ben-Ayun et al. | Jun 2005 | A1 |
| 20050150106 | Long et al. | Jul 2005 | A1 |
| 20050195063 | Mattsson | Sep 2005 | A1 |
| 20050237144 | Einzinger et al. | Oct 2005 | A1 |
| 20060033602 | Mattsson | Feb 2006 | A1 |
| 20060035600 | Lee et al. | Feb 2006 | A1 |
| 20060038635 | Richiuso et al. | Feb 2006 | A1 |
| 20060058629 | Warntjes et al. | Mar 2006 | A1 |
| 20060109064 | Toncich et al. | May 2006 | A1 |
| 20060125465 | Xiang et al. | Jun 2006 | A1 |
| 20060176135 | Winter et al. | Aug 2006 | A1 |
| 20060220727 | Yen | Oct 2006 | A1 |
| 20060226943 | Marques | Oct 2006 | A1 |
| 20060261890 | Floyd et al. | Nov 2006 | A1 |
| 20060281431 | Isaac et al. | Dec 2006 | A1 |
| 20070085648 | Lee et al. | Apr 2007 | A1 |
| 20070091006 | Thober et al. | Apr 2007 | A1 |
| 20070161361 | Vaisanen et al. | Jul 2007 | A1 |
| 20070182520 | Kawakubo et al. | Aug 2007 | A1 |
| 20070194859 | Brobston et al. | Aug 2007 | A1 |
| 20070241839 | Taniguchi | Oct 2007 | A1 |
| 20070290767 | Ali-Ahmad et al. | Dec 2007 | A1 |
| 20080002380 | Hazucha et al. | Jan 2008 | A1 |
| 20080096516 | Mun et al. | Apr 2008 | A1 |
| 20080099884 | Inohara | May 2008 | A1 |
| 20080122560 | Liu | May 2008 | A1 |
| 20080164967 | Mashing | Jul 2008 | A1 |
| 20080220735 | Kim et al. | Sep 2008 | A1 |
| 20080297299 | Yun et al. | Dec 2008 | A1 |
| 20080303623 | Hsu et al. | Dec 2008 | A1 |
| 20090058589 | Chen et al. | Mar 2009 | A1 |
| 20090088110 | Schuur et al. | Apr 2009 | A1 |
| 20090134947 | Tarng | May 2009 | A1 |
| 20090134953 | Hunt et al. | May 2009 | A1 |
| 20090261936 | Widjaja et al. | Oct 2009 | A1 |
| 20090289721 | Rajendran et al. | Nov 2009 | A1 |
| 20090309661 | Chang et al. | Dec 2009 | A1 |
| 20100013562 | Stockinger et al. | Jan 2010 | A1 |
| 20100060354 | Maeda | Mar 2010 | A1 |
| 20100144305 | Cook et al. | Jun 2010 | A1 |
| 20100188171 | Mohajer-Iravani et al. | Jul 2010 | A1 |
| 20100283557 | Taniguchi | Nov 2010 | A1 |
| 20110010749 | Alkan | Jan 2011 | A1 |
| 20110103494 | Ahmadi | May 2011 | A1 |
| 20110156835 | Nagai | Jun 2011 | A1 |
| 20110159834 | Salvi | Jun 2011 | A1 |
| 20110163824 | Kawano | Jul 2011 | A1 |
| 20110169589 | Franzon et al. | Jul 2011 | A1 |
| 20110210787 | Lee et al. | Sep 2011 | A1 |
| 20110241163 | Liu et al. | Oct 2011 | A1 |
| 20120051409 | Brobston et al. | Mar 2012 | A1 |
| 20120081192 | Hanaoka | Apr 2012 | A1 |
| 20120230227 | Weiss | Sep 2012 | A1 |
| 20120249266 | Lim et al. | Oct 2012 | A1 |
| 20120262252 | Tseng et al. | Oct 2012 | A1 |
| 20120268229 | Yen et al. | Oct 2012 | A1 |
| 20120286900 | Kadota et al. | Nov 2012 | A1 |
| 20130049902 | Hendry et al. | Feb 2013 | A1 |
| 20130143381 | Kikukawa | Jun 2013 | A1 |
| 20130244591 | Weissman et al. | Sep 2013 | A1 |
| 20130257564 | Huang et al. | Oct 2013 | A1 |
| 20130281031 | Gingrich et al. | Oct 2013 | A1 |
| 20130295863 | Shanan | Nov 2013 | A1 |
| 20140015603 | Scott et al. | Jan 2014 | A1 |
| 20140035358 | Ichikawa | Feb 2014 | A1 |
| 20140106698 | Mi et al. | Apr 2014 | A1 |
| 20140113573 | Khatri et al. | Apr 2014 | A1 |
| 20140133189 | Worek | May 2014 | A1 |
| 20140141738 | Janesch | May 2014 | A1 |
| 20140146737 | Ohshima et al. | May 2014 | A1 |
| 20140162712 | Feld et al. | Jun 2014 | A1 |
| 20140167877 | Shimizu et al. | Jun 2014 | A1 |
| 20140192845 | Szini et al. | Jul 2014 | A1 |
| 20140225680 | Fujiwara et al. | Aug 2014 | A1 |
| 20140232467 | Mukai et al. | Aug 2014 | A1 |
| 20140266432 | Scott et al. | Sep 2014 | A1 |
| 20140266451 | Scott et al. | Sep 2014 | A1 |
| 20140266452 | Scott et al. | Sep 2014 | A1 |
| 20140266457 | Scott et al. | Sep 2014 | A1 |
| 20140266458 | Scott et al. | Sep 2014 | A1 |
| 20140266459 | Scott et al. | Sep 2014 | A1 |
| 20140266531 | Leipold et al. | Sep 2014 | A1 |
| 20140266544 | Leipold et al. | Sep 2014 | A1 |
| 20140285286 | Bojer | Sep 2014 | A1 |
| 20140323046 | Asai et al. | Oct 2014 | A1 |
| 20140323071 | Liao | Oct 2014 | A1 |
| 20140328220 | Khlat et al. | Nov 2014 | A1 |
| 20140361848 | Leipold et al. | Dec 2014 | A1 |
| 20140361849 | Maxim et al. | Dec 2014 | A1 |
| 20140361852 | Leipold et al. | Dec 2014 | A1 |
| 20140364077 | Maxim et al. | Dec 2014 | A1 |
| 20150001708 | Lin | Jan 2015 | A1 |
| 20150002240 | Reiha | Jan 2015 | A1 |
| 20150035612 | Maxim et al. | Feb 2015 | A1 |
| 20150035617 | Leipold et al. | Feb 2015 | A1 |
| 20150035622 | Maxim et al. | Feb 2015 | A1 |
| 20150035637 | Maxim et al. | Feb 2015 | A1 |
| 20150038094 | Maxim et al. | Feb 2015 | A1 |
| 20150038101 | Maxim et al. | Feb 2015 | A1 |
| 20150042399 | Imbornone et al. | Feb 2015 | A1 |
| 20150054582 | Goss | Feb 2015 | A1 |
| 20150056939 | Ong et al. | Feb 2015 | A1 |
| 20150061680 | Leskowitz | Mar 2015 | A1 |
| 20150065070 | Maxim et al. | Mar 2015 | A1 |
| 20150084699 | Maxim et al. | Mar 2015 | A1 |
| 20150084713 | Maxim et al. | Mar 2015 | A1 |
| 20150084718 | Maxim et al. | Mar 2015 | A1 |
| 20150092625 | Leipold et al. | Apr 2015 | A1 |
| 20150094008 | Maxim et al. | Apr 2015 | A1 |
| 20150102887 | Park | Apr 2015 | A1 |
| 20150116950 | Yoo et al. | Apr 2015 | A1 |
| 20150117280 | Khlat et al. | Apr 2015 | A1 |
| 20150117281 | Khlat et al. | Apr 2015 | A1 |
| 20150226950 | Booth et al. | Aug 2015 | A1 |
| 20160126613 | Leipold et al. | May 2016 | A1 |
| 20160126623 | Maxim et al. | May 2016 | A1 |
| 20160359510 | Scott et al. | Dec 2016 | A1 |
| 20160359511 | Maxim et al. | Dec 2016 | A1 |
| 20170062119 | Zybura et al. | Mar 2017 | A1 |
| 20170084991 | Mayo | Mar 2017 | A1 |
| 20170134058 | Leipold et al. | May 2017 | A1 |
| Number | Date | Country |
|---|---|---|
| 0957368 | Nov 1999 | EP |
| 1184977 | Mar 2002 | EP |
| 06082539 | Mar 1994 | JP |
| 07015253 | Jan 1995 | JP |
| 2010141827 | Jun 2010 | JP |
| 100812098 | Mar 2008 | KR |
| 20110114238 | Oct 2011 | KR |
| 0146971 | Jun 2001 | WO |
| 2005117255 | Dec 2005 | WO |
| Entry |
|---|
| Non-Final Office Action for U.S. Appl. No. 15/961,299, dated Sep. 5, 2018, 10 pages. |
| Non-Final Office Action for U.S. Appl. No. 15/208,780, dated Oct. 22, 2018, 7 pages. |
| Idris, D., et al., “Design and Implementation of Self-Calibration for Digital Predistortion of Power Amplifiers,” WSEAS Transactions on Circuits and Systems, vol. 7, No. 2, Feb. 2008, pp. 75-84. |
| Keerti, Arvind, et al., “RF Characterization of SiGe HBT Power Amplifiers under Load Mismatch,” IEEE Transactions on Microwave Theory and Techniques, vol. 55, No. 2, Feb. 2007, pp. 207-214. |
| Kim, Jangheon et al., “Analysis of Adaptive Digital Feedback Linearization Techniques,” IEEE Transactions on Circuits and Systems—1: Regular Papers, vol. 57, No. 2, Feb. 2010, pp. 345-354. |
| Ko, Sangwon, et al., “A Linearized Cascode CMOS Power Amplifier,” IEEE Annual Wireless and Microwave Technology Conference, WAMICON '06, Dec. 4-6, 2006, Clearwater Beach, Florida, 4 pages. |
| Liu, Jenny Yi-Chun, et al., “Millimeter-Wave Self-Healing Power Amplifier with Adaptive Amplitude and Phase Linearization in 65-nm CMOS,” IEEE Transactions on Microwave Theory and Techniques, vol. 60, No. 5, May 2012, pp. 1342-1352. |
| Mu, Xiaofang, et al., “Analysis of Output Power Variation under Mismatched Load in Power Amplifier FEM with Directional Coupler,” IEEE MTT-S International Microwave Symposium Digest, Jun. 7-12, 2009, Boston, Mass., pp. 549-552. |
| Nakayama, Masatoshi, et al., “A Novel Amplitude and Phase Linearizing Technique for Microwave Power Amplifiers,” IEEE MTT-S International Microwave Symposium Digest, vol. 3, May 16-20, 1995, Orlando, Fla., pp. 1451-1454. |
| Peng, Zhan, et al., “RF Power Amplifier Linearization Method Based on Quadrature Nonlinear Model,” 1st International Conference on Information Science and Engineering, Dec. 26-28, 2009, Nanjing, China, pp. 2711-2713. |
| Rachakonda, Anil, et al., “Log Amps and Directional Couplers Enable VSWR Detection,” RF Design Magazine, Jan. 2007, pp. 28-34. |
| Scuderi, Antonino, et al., “A VSWR-Rugged Silicon Bipolar RF Power Amplifier,” Proceedings of the Bipolar/BiCMOS Circuits and Technology Meeting, Oct. 9-11, 2005, pp. 116-119. |
| So, Jinhyun, et al., “Digital Predistortion Based on Envelope Feedback,” IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP), Mar. 25-30, 2012, Kyoto, Japan, pp. 3169-3172. |
| Woo, Wangmyong, et al., “A New Envelope Predistortion Linearization Architecture for Handset Power Amplifiers,” IEEE Radio and Wireless Conference, Sep. 19-22, 2004, pp. 175-178. |
| Zhang, X., et al., “Gain/Phase Imbalance-Minimization Techniques for LINC Transmitters,” IEEE Transactions on Microwave Theory and Techniques, vol. 49, No. 12, Dec. 2001, pp. 2507-2516. |
| Non-Final Office Action for U.S. Appl. No. 14/215,815, dated May 4, 2015, 13 pages. |
| Notice of Allowance for U.S. Appl. No. 14/215,815, dated Oct. 1, 2015, 7 pages. |
| Non-Final Office Action for U.S. Appl. No. 14/216,376, dated May 7, 2015, 8 pages. |
| Notice of Allowance for U.S. Appl. No. 14/216,376, dated Feb. 22, 2016, 10 pages. |
| Non-Final Office Action for U.S. Appl. No. 14/216,794, dated Jun. 30, 2015, 5 pages. |
| Notice of Allowance for U.S. Appl. No. 14/216,794, dated Nov. 24, 2015, 7 pages. |
| Non-Final Office Action for U.S. Appl. No. 14/217,199, dated Jul. 2, 2015, 6 pages. |
| Final Office Action for U.S. Appl. No. 14/217,199, dated Oct. 19, 2015, 5 pages. |
| Non-Final Office Action for U.S. Appl. No. 14/217,199, dated Feb. 4, 2016, 5 pages. |
| Final Office Action for U.S. Appl. No. 14/217,199, dated Jul. 7, 2016, 5 pages. |
| Advisory Action for U.S. Appl. No. 14/217,199, dated Oct. 17, 2016, 2 pages. |
| Non-Final Office Action for U.S. Appl. No. 14/217,199, dated Nov. 23, 2016, 6 pages. |
| Notice of Allowance for U.S. Appl. No. 14/217,199, dated Apr. 4, 2017, 6 pages. |
| Non-Final Office Action for U.S. Appl. No. 14/216,560, dated Jul. 16, 2015, 9 pages. |
| Non-Final Office Action for U.S. Appl. No. 14/216,560, dated Feb. 2, 2016, 9 pages. |
| Non-Final Office Action for U.S. Appl. No. 14/216,560, dated Aug. 16, 2016, 8 pages. |
| Notice of Allowance for U.S. Appl. No. 14/216,560, dated Apr. 20, 2017, 9 pages. |
| Non-Final Office Action for U.S. Appl. No. 14/218,953, dated Jul. 24, 2015, 10 pages. |
| Final Office Action for U.S. Appl. No. 14/218,953, dated Jan. 4, 2016, 11 pages. |
| Notice of Allowance for U.S. Appl. No. 14/218,953, dated May 2, 2016, 5 pages. |
| Non-Final Office Action for U.S. Appl. No. 14/450,204, dated Feb. 1, 2017, 9 pages. |
| Notice of Allowance and Examiner-Initiated Interview Summary for U.S. Appl. No. 14/450,200, dated Feb. 10, 2017, 8 pages. |
| Non-Final Office Action for U.S. Appl. No. 14/555,557, dated Feb. 13, 2017, 21 pages. |
| Non-Final Office Action for U.S. Appl. No. 14/554,975, dated Feb. 16, 2017, 9 pages. |
| Notice of Allowance for U.S. Appl. No. 15/223,416, dated Feb. 28, 2017, 8 pages. |
| Non-Final Office Action for U.S. Appl. No. 15/240,420, dated Jan. 26, 2017, 7 pages. |
| Non-Final Office Action for U.S. Appl. No. 15/241,823, dated Jan. 17, 2017, 6 pages. |
| Final Office Action for U.S. Appl. No. 14/449,764, dated Mar. 2, 2017, 10 pages. |
| Corrected Notice of Allowability for U.S. Appl. No. 14/450,200, dated Mar. 1, 2017, 3 pages. |
| Advisory Action for U.S. Appl. No. 14/215,800, dated Apr. 20, 2017, 2 pages. |
| Notice of Allowance for U.S. Appl. No. 14/298,863, dated May 31, 2017, 6 pages. |
| Final Office Action for U.S. Appl. No. 14/450,156, dated Apr. 27, 2017, 12 pages. |
| Notice of Allowance for U.S. Appl. No. 14/450,028, dated May 3, 2017, 5 pages. |
| Notice of Allowance and Examiner-Initiated Interview Summary for U.S. Appl. No. 14/449,764, dated May 19, 2017, 8 pages. |
| Notice of Allowance for U.S. Appl. No. 14/450,204, dated Jun. 28, 2017, 8 pages. |
| Notice of Allowance for U.S. Appl. No. 14/555,371, dated Mar. 31, 2017, 8 pages. |
| Notice of Allowance and Examiner-Initiated Inteview Summary for U.S. Appl. No. 14/554,975, dated Jul. 17, 2017, 9 pages. |
| Notice of Allowance for U.S. Appl. No. 15/240,420, dated May 10, 2017, 8 pages. |
| Notice of Allowance for U.S. Appl. No. 15/241,823, dated May 9, 2017, 7 pages. |
| Non-Final Office Action for U.S. Appl. No. 15/587,581, dated Jun. 30, 2017, 6 pages. |
| Non-Final Office Action for U.S. Appl. No. 15/415,538, dated Jul. 17, 2017, 18 pages. |
| Non-Final Office Action for U.S. Appl. No. 14/215,800, dated Aug. 15, 2017, 6 pages. |
| Notice of Allowance for U.S. Appl. No. 14/450,156, dated Oct. 11, 2017, 10 pages. |
| Supplemental Notice of Allowability for U.S. Appl. No. 14/450,204, dated Aug. 28, 2017, 5 pages. |
| Notice of Allowance for U.S. Appl. No. 14/554,943, dated Aug. 31, 2017, 7 pages. |
| Advisory Action for U.S. Appl. No. 14/555,557, dated Nov. 3, 2017, 3 pages. |
| Final Office Action for U.S. Appl. No. 14/555,557, dated Aug. 7, 2017, 21 pages. |
| Duplessis, M., et al., “Physical implementation of 3D integrated solenoids within silicon substrate for hybrid IC applications,” presented at the European Microwave Conference, Sep. 29-Oct. 1, 2009, Rome, IEEE, pp. 1006-1009. |
| Invitation to Pay Additional Fees for PCT/US2014/030188, dated Jul. 4, 2014, 8 pages. |
| International Search Report and Written Opinion for PCT/US2014/030188, dated Sep. 5, 2014, 19 pages. |
| International Preliminary Report on Patentability for PCT/US2014/030188, dated Sep. 24, 2015, 13 pages. |
| Non-Final Office Action for U.S. Appl. No. 14/099,007, dated Oct. 30, 2014, 10 pages. |
| Final Office Action for U.S. Appl. No. 14/099,007, dated Mar. 4, 2015, 14 pages. |
| Notice of Allowance for U.S. Appl. No. 14/099,007, dated Jul. 22, 2015, 9 pages. |
| Non-Final Office Action for U.S. Appl. No. 14/450,156, dated Sep. 9, 2015, 13 pages. |
| Notice of Allowance for U.S. Appl. No. 14/215,800, dated Jan. 9, 2018, 8 pages. |
| Notice of Allowance for U.S. Appl. No. 15/587,581, dated Dec. 8, 2017, 7 pages. |
| Bogya, Robert I., et al., “Linear Radio Frequency Power Amplifier Design Using Nonlinear Feedback Linearization Techniques,” presented at the 60th Vehicular Technology Conference, vol. 3, Sep. 26-29, 2004, IEEE, pp. 2259-2263. |
| Brounley, Richard W., “Matching Networks for Power Amplifiers Operating into High VSWR Loads,” High Frequency Electronics, May 2004, pp. 58-62. |
| Charles, C.T., “A Calibrated Phase and Amplitude Control System for a 1.9 GHz Phased-Array Transmitter Element,” IEEE Transactions on Circuits and Systems 1: Regular Papers, vol. 56, No. 12, Dec. 2009, pp. 2728-2737. |
| Chen, Wei, et al., “A Novel VSWR-Protected and Controllable CMOS Class E Power Amplifier for Bluetooth Applications,” International Journal of Design, Analysis and Tools for Circuits and Systems, vol. 1, No. 1, Jun. 2011, pp. 22-26. |
| D'Andrea, Aldo N., et al., “RF Power Amplifier Linearization through Amplitude and Phase Predistortion,” IEEE Transactions on Communications, vol. 44, No. 11, Nov. 1996, pp. 1477-1484. |
| Dawson, J., et al., “Automatic Phase Alignment for a Fully Integrated Cartesian Feedback Power Amplifier System,” IEEE Journal of Solid-State Circuits, vol. 38, No. 12, Dec. 2003, pp. 2269-2279. |
| Dawson, Joel L., “Feedback Linearization of RF Power Amplifiers,” Dissertation for Stanford University, Stanford, Calif., Aug. 2003, 191 pages. |
| Delaunay, Nicolas, et al., “Linearization of a 65nm CMOS Power Amplifier with a Cartesian Feedback for W-CDMA Standard,” Joint IEEE North-East Workshop on Circuits and Systems and TAISA Conference, Jun. 28-Jul. 1, 2009, Toulouse, France, 4 pages. |
| Do, Ji-Hoon, et al., “W-CDMA High Power Amplifier Using Anti-Phase Intermodulation Distortion Linearization Technology,” Asia-Pacific Microwave Conference, Dec. 11-14, 2007, Bangkok, Thailand, 4 pages. |
| Hoppenjans, Eric E., et al., “A Vertically Integrated Tunable UHF Filter,” 2010 IEEE MTT-S International Microwave Symposium Digest (MTT), May 23-28, 2010, Anaheim, Calif., pp. 1380-1383. |
| Hu, Q.Z., et al., “A SiGe Power Amplifier with Power Detector and VSWR Protection for TD-SCDMA Application,” Proceedings of the International Conference on Mixed Design of Integrated Circuits and Systems, Jun. 22-24, 2006, Gdynia, Poland, pp. 214-217. |
| Hur, J., et al., “An Amplitude and Phase Mismatches Calibration Technique for the LINC Transmitter with Unbalanced Phase Control,” IEEE Transactions on Vehicular Technology, vol. 60, No. 9, Nov. 2011, pp. 4184-4193. |
| Hoppenjans, Eric E. et al., “A Vertically Integrated Tunable UHF Filter,” International Microwave Symposium Digest (MTT), May 23-28, 2010, Anaheim, California, IEEE, pp. 1380-1383. |
| Joshi, H. et al., “Tunable high Q narrow-band triplexer,” IEEE MTT-S International Microwave Symposium Digest, Jun. 7-12, 2009, Boston, MA, IEEE, pp. 1477-1480. |
| Kamali-Sarvestani, Reza et al., “Fabrication of High Quality Factor RF-Resonator Using Embedded Inductor and Via Capacitor,” IECON 2010—36th Annual Conference on IEEE Industrial Electronics Society, Nov. 7-10, 2010, Glendale, Arizona, IEEE, pp. 2283-2287. |
| International Search Report and Written Opinion for PCT/US2014/030431, dated Jun. 20, 2014, 14 pages. |
| International Preliminary Report on Patentability for PCT/US/2014/030431, dated Sep. 24, 2015, 10 pages. |
| Non-Final Office Action for U.S. Appl. No. 14/215,800, dated Nov. 20, 2015, 5 pages. |
| Final Office Action for U.S. Appl. No. 14/215,800, dated Mar. 11, 2016, 6 pages. |
| Non-Final Office Action for U.S. Appl. No. 14/215,800, dated Aug. 11, 2016, 6 pages. |
| Invitation to Pay Additional Fees and, Where Applicable, Protest Fee for PCT/US2014/048608, dated Oct. 21, 2014, 7 pages. |
| International Search Report and Written Opinion for PCT/US2014/048608, dated Dec. 16, 2014, 18 pages. |
| International Preliminary Report on Patentability for PCT/US2014/048608, dated Feb. 11, 2016, 14 pages. |
| Non-Final Office Action for U.S. Appl. No. 14/298,829, dated Jun. 22, 2015, 8 pages. |
| Final Office Action for U.S. Appl. No. 14/298,829, dated Feb. 3, 2016, 10 pages. |
| Notice of Allowance for U.S. Appl. No. 14/298,829, dated May 20, 2016, 9 pages. |
| Non-Final Office Action for U.S. Appl. No. 14/298,830, dated Dec. 3, 2015, 10 pages. |
| Notice of Allowance for U.S. Appl. No. 14/298,830, dated Apr. 7, 2016, 9 pages. |
| Non-Final Office Action for U.S. Appl. No. 14/298,863, dated Jan. 7, 2016, 16 pages. |
| Final Office Action for U.S. Appl. No. 14/298,863, dated Jun. 3, 2016, 17 pages. |
| Non-Final Office Action for U.S. Appl. No. 14/449,913, dated Mar. 28, 2016, 15 pages. |
| Final Office Action for U.S. Appl. No. 14/449,913, dated Sep. 7, 2016, 14 pages. |
| Non-Final Office Action for U.S. Appl. No. 14/298,852, dated Dec. 22, 2015, 7 pages. |
| Notice of Allowance for U.S. Appl. No. 14/298,852, dated May 13, 2016, 9 pages. |
| Notice of Allowance for U.S. Appl. No. 14/298,852, dated Jul. 13, 2016, 9 pages. |
| Non-Final Office Action for U.S. Appl. No. 14/450,156, dated Mar. 14, 2016, 11 pages. |
| Non-Final Office Action for U.S. Appl. No. 14/450,156, dated Sep. 15, 2016, 11 pages. |
| Non-Final Office Action for U.S. Appl. No. 14/450,028, dated Dec. 10, 2015, 11 pages. |
| Final Office Action for U.S. Appl. No. 14/450,028, dated Mar. 31, 2016, 12 pages. |
| Advisory Action for U.S. Appl. No. 14/450,028, dated Aug. 2, 2016, 3 pages. |
| Non-Final Office Action for U.S. Appl. No. 14/449,764, dated May 4, 2016, 12 pages. |
| Non-Final Office Action for U.S. Appl. No. 14/450,199, dated Apr. 20, 2016, 7 pages. |
| Notice of Allowance for U.S. Appl. No. 14/450,199, dated Aug. 1, 2016, 7 pages. |
| Non-Final Office Action for U.S. Appl. No. 14/450,204, dated Apr. 22, 2016, 8 pages. |
| Non-Final Office Action for U.S. Appl. No. 14/555,053, dated Dec. 31, 2015, 5 pages. |
| Notice of Allowance for U.S. Appl. No. 14/555,053, dated Apr. 19, 2016, 7 pages. |
| Non-Final Office Action for U.S. Appl. No. 14/450,200, dated Feb. 29, 2016, 13 pages. |
| Final Office Action for U.S. Appl. No. 14/450,200, dated Jun. 14, 2016, 13 pages. |
| Non-Final Office Action for U.S. Appl. No. 14/450,200, dated Sep. 8, 2016, 14 pages. |
| Non-Final Office Action for U.S. Appl. No. 14/554,943, dated Jun. 30, 2016, 14 pages. |
| Non-Final Office Action for U.S. Appl. No. 14/555,557, dated Jun. 13, 2016, 28 pages. |
| Non-Final Office Action for U.S. Appl. No. 14/298,863, dated Sep. 26, 2016, 9 pages. |
| Non-Final Office Action for U.S. Appl. No. 14/450,028, dated Sep. 26, 2016, 14 pages. |
| Non-Final Office Action for U.S. Appl. No. 14/449,764, dated Oct. 17, 2016, 10 pages. |
| Final Office Action for U.S. Appl. No. 14/555,557, dated Sep. 20, 2016, 23 pages. |
| Non-Final Office Action for U.S. Appl. No. 14/553,371, dated Oct. 25, 2016, 19 pages. |
| Notice of Allowance for U.S. Appl. No. 14/449,913, dated Dec. 7, 2016, 7 pages. |
| Notice of Allowance and Examiner-Initiated Interview Summary for U.S. Appl. No. 14/554,943, dated Nov. 16, 2016, 8 pages. |
| Notice of Allowance for U.S. Appl. No. 15/223,416, dated Dec. 2, 2016, 8 pages. |
| Final Office Action for U.S. Appl. No. 14/215,800, dated Feb. 8, 2017, 7 pages. |
| Final Office Action for U.S. Appl. No. 14/298,863, dated Feb. 14, 2017, 10 pages. |
| Final Office Action for U.S. Appl. No. 14/450,028, dated Jan. 19, 2017, 12 pages. |
| Final Office Action for U.S. Patent Application No. 15/961,299, mailed Mar. 5, 2019, 11 pages. |
| Non-Final Office Action for U.S. Patent Application No. 15/717,525, mailed Mar. 4, 2019, 10 pages. |
| Final Office Action for U.S. Patent Application No. 15/208,780, mailed Mar. 7, 2019, 9 pages. |
| Number | Date | Country | |
|---|---|---|---|
| 20180254755 A1 | Sep 2018 | US |
| Number | Date | Country | |
|---|---|---|---|
| 61793583 | Mar 2013 | US | |
| 61789508 | Mar 2013 | US | |
| 61800772 | Mar 2013 | US | |
| 61800991 | Mar 2013 | US | |
| 61801038 | Mar 2013 | US | |
| 61946270 | Feb 2014 | US | |
| 61946927 | Mar 2014 | US |
| Number | Date | Country | |
|---|---|---|---|
| Parent | 14215800 | Mar 2014 | US |
| Child | 15972917 | US |
