Patent Grant
7240981
An inkjet printing system, as one embodiment of a fluid ejection system, may include a printhead assembly, an ink supply which supplies liquid ink to the printhead assembly, and a controller which controls the printhead assembly. The printhead assembly, as one embodiment of a fluid ejection device, ejects ink drops through a plurality of orifices or nozzles and toward a print medium, such as a sheet of paper, so as to print onto the print medium. Typically, the orifices are arranged in one or more arrays such that properly sequenced ejection of ink from the orifices causes characters or other images to be printed upon the print medium as the printhead assembly and the print medium are moved relative to each other.
Typically, the printhead assembly ejects the ink drops through the nozzles by rapidly heating a small volume of ink located in vaporization chambers with small electric heaters, such as thin film resistors, often referred to as firing resistors. Heating the ink causes the ink to vaporize and be ejected from the nozzles. Typically, for one dot of ink, a remote printhead assembly controller typically located as part of the processing electronics of a printer, controls activation of an electrical current from a power supply external to the printhead assembly. The electrical current is passed through a selected firing resistor to heat the ink in a corresponding selected vaporization chamber. The combination of a nozzle, a vaporization chamber, and a firing resistor is herein referred to as a drop generator.
One method of controlling the application of the electrical current through the selected firing resistor is to couple a switching device, such as a field effect transistor (FET), to each firing resistor. In one printhead arrangement, the firing resistors are grouped together in primitives, with a single power lead providing power to the source or drain of each FET for each firing resistor in a primitive. Each FET in a primitive has a separately energizable address lead coupled to its gate, with each address lead coupled to its gate, with each address lead shared by multiple primitives. In a typical printing operation, the address leads are controlled so that only a single firing resistor in a primitive is activated at a given time.
In one arrangement, the address lead coupled to the gate of each FET is controlled by a combination of nozzle data, nozzle addresses, and a fire pulse. The nozzle data is typically provided by the controller of the printer and represents the actual data to be printed. The fire pulse controls the timing of the activation of the electrical current through the selected firing resistor. Typical conventional inkjet printing systems employ the controller to control the timing related to the fire pulse. The nozzle address is cycled through all nozzle addresses to control the nozzle firing order so that all nozzles can be fired, but only a single nozzle in a primitive is fired at a given time.
While such arrangements are effective in controlling nozzle firing, connections between the printhead assembly and remote elements and between elements on the printhead assembly itself can become complex, especially as the number of nozzles and the area of the printhead assembly increase. An example of one such system is a wide-array inkjet printing system. Printing systems, particularly wide-array inkjet printing systems, would benefit from a simplified nozzle firing activation scheme.
In the following Detailed Description, reference is made to the accompanying drawings which form a part hereof, and in which is shown by way of illustration specific embodiments in which the invention may be practiced. In this regard, directional terminology, such as “top,” “bottom,” “row,” “column,” “front,” “back,” “leading,” “trailing,” etc., is used with reference to the orientation of the Figure(s) being described. Because components of embodiments of the present invention can be positioned in a number of different orientations, the directional terminology is used for purposes of illustration and is in no way limiting. It is to be understood that other embodiments may be utilized and structural or logical changes may be made without departing from the scope of the present invention. The following detailed description, therefore, is not to be taken in a limiting sense, and the scope of the present invention is defined by the appended claims.
Printhead assembly 12, as one embodiment of a fluid ejection device, may be formed according to an embodiment of the present invention and ejects drops of ink, including one or more colored inks or UV readable inks, through a plurality of orifices or nozzles 13. While the following description refers to the ejection of ink from printhead assembly 12, it is understood that other liquids, fluids, or flowable materials, including clear fluid, may be ejected from printhead assembly 12. The types of fluids used will depend on the application for which the fluid ejecting device will be used.
In one embodiment, the drops are directed toward a medium, such as print media 19, so as to print onto print media 19. Typically, nozzles 13 are arranged in one or more columns or arrays such that properly sequenced ejection of ink from nozzles 13 causes, in one embodiment, characters, symbols, and/or other graphics or images to be printed upon print media 19 as printhead assembly 12 and print media 19 are moved relative to each other.
Print media 19 includes any type of suitable sheet-like material, such as paper, card stock, envelopes, labels, transparencies, Mylar, and the like. In one embodiment, print media 19 is a continuous form or continuous web print media 19. As such, print media 19 may include a continuous roll of unprinted paper.
Ink supply assembly 14, as one embodiment of a fluid supply assembly, supplies ink to printhead assembly 12 and includes a reservoir 15 for storing ink. As such, ink flows from reservoir 15 to printhead assembly 12. In one embodiment, ink supply assembly 14 and printhead assembly 12 form a recirculating ink delivery system. As such, ink flows back to reservoir 15 from printhead assembly 12. In one embodiment, printhead assembly 12 and ink supply assembly 14 are housed together in an inkjet or fluidjet cartridge or pen. In another embodiment, ink supply assembly 14 is separate from printhead assembly 12 and supplies ink to printhead assembly 12 through an interface connection, such as a supply tube.
In one embodiment, mounting assembly 16 positions printhead assembly 12 relative to media transport assembly 18, and media transport assembly 18 positions print media 19 relative to printhead assembly 12. As such, a print zone 17 within which printhead assembly 12 deposits ink drops is defined adjacent to nozzles 13 in an area between printhead assembly 12 and print media 19. Print media 19 is advanced through print zone 17 during printing by media transport assembly 18.
In one embodiment, printhead assembly 12 is a scanning type printhead assembly, and mounting assembly 16 moves printhead assembly 12 relative to media transport assembly 18 and print media 19 during printing of a swath on print media 19. In another embodiment, printhead assembly 12 is a non-scanning type printhead assembly, and mounting assembly 16 fixes printhead assembly 12 at a prescribed position relative to media transport assembly 18 during printing of a swath on print media 19 as media transport assembly 18 advances print media 19 past the prescribed position.
Controller 20 communicates with printhead assembly 12, mounting assembly 16, and media transport assembly 18. Controller 20 receives data 21 from a host system, such as a computer, and includes memory for temporarily storing data 21. Typically, data 21 is sent to inkjet printing system 10 along an electronic, infrared, optical or other information transfer path. Data 21 represents, for example, a document and/or file to be printed. As such, data 21 forms a print job for inkjet printing system 10 and includes one or more print job commands and/or command parameters.
In one embodiment, controller 20 provides control of printhead assembly 12 including timing control for ejection of ink drops from nozzles 13. As such, controller 20 defines a pattern of ejected ink drops which form characters, symbols, and/or other graphics or images on print media 19. Timing control and, therefore, the pattern of ejected ink drops, is determined by the print job commands and/or command parameters. In one embodiment, logic and drive circuitry forming a portion of controller 20 is located on printhead assembly 12. In another embodiment, logic and drive circuitry is located off printhead assembly 12.
Controller 20 may be implemented as a processor, logic elements, firmware, and software, or in any combination thereof.
As illustrated in the embodiment of
In one embodiment, inner layer 50 and outer layers 30 and 40 form two rows 61 and 62 of nozzles 13. More specifically, inner layer 50 and outer layer 30 form row 61 of nozzles 13 along edge 34 of outer layer 30, and inner layer 50 and outer layer 40 form row 62 of nozzles 13 along edge 44 of outer layer 40. As such, in one embodiment, rows 61 and 62 of nozzles 13 are spaced from and oriented substantially parallel to each other.
In one embodiment, as illustrated in
As illustrated in the embodiment of
In one embodiment, as illustrated in
In one embodiment, as described below, inner layer 50 (
In one embodiment, fluid pathways 80 are defined by barriers 82 formed on sides 32 and 42 of respective outer layers 30 and 40. As such, inner layer 50 (
As illustrated in the embodiment of
In one embodiment, each fluid ejecting element 70 includes a firing resistor 72 formed within fluid chamber 86 of a respective fluid pathway 80. Firing resistor 72 includes, for example, a heater resistor which, when energized, heats fluid within fluid chamber 86 to produce a bubble within fluid chamber 86 and generate a droplet of fluid which is ejected through nozzle 13. As such, in one embodiment, a respective fluid chamber 86, firing resistor 72, and nozzle 13 form a drop generator of a respective fluid ejecting element 70.
In one embodiment, during operation, fluid flows from fluid inlet 84 to fluid chamber 86 where droplets of fluid are ejected from fluid chamber 86 through fluid outlet 88 and a respective nozzle 13 upon activation of a respective firing resistor 72. As such, droplets of fluid are ejected substantially parallel to sides 32 and 42 of respective outer layers 30 and 40 toward a medium. Accordingly, in one embodiment, printhead assembly 12 constitutes an edge or side-shooter design.
In one embodiment, as illustrated in
In one embodiment, inner layer 50 and substrate 90 of outer layers 30 and 40 each include a common material. As such, a coefficient of thermal expansion of inner layer 50 and outer layers 30 and 40 is substantially matched. Thus, thermal gradients between inner layer 50 and outer layers 30 and 40 are minimized. Example materials suitable for inner layer 50 and substrate 90 of outer layers 30 and 40 include glass, metal, a ceramic material, a carbon composite material, a metal matrix composite material, or any other chemically inert and thermally stable material.
In one embodiment, inner layer 50 and substrate 90 of outer layers 30 and 40 include glass such as Corning® 1737 glass or Corning® 1740 glass. In one embodiment, when inner layer 50 and substrate 90 of outer layers 30 and 40 include a metal or metal matrix composite material, an oxide layer is formed on the metal or metal matrix composite material of substrate 90.
In one embodiment, thin-film structure 92 includes drive circuitry 74 for fluid ejecting elements 70. Drive circuitry 74 provides, for example, power, ground, and control logic for fluid ejecting elements 70 including, more specifically, firing resistors 72.
In one embodiment, thin-film structure 92 includes one or more passivation or insulation layers formed, for example, of silicon dioxide, silicon carbide, silicon nitride, tantalum, poly-silicon glass, or other suitable material. In addition, thin-film structure 92 also includes one or more conductive layers formed, for example, by aluminum, gold, tantalum, tantalum-aluminum, or other metal or metal alloy. In one embodiment, thin-film structure 92 includes thin-film transistors which form a portion of drive circuitry 74 for fluid ejecting elements 70.
As illustrated in the embodiment of
As illustrated in the embodiment of
Methods for fabricating thin-film transistors arrays on monolithic structures are disclosed and discussed in more detail in U.S. Pat. No. 4,960,719 entitled “Method for Producing Amorphous Silicon Thin Film Transistor Array Substrate,” and in U.S. Pat. No. 6,582,062 entitled “Large Thermal Ink Jet Nozzle Array Printhead,” both of which are herein incorporated by reference in their entirety as if fully set forth herein.
Fire enable shift register 104 includes N one-bit memory elements, indicated as memory elements 104a to 104N, each coupled to a corresponding one of the N fluid ejecting elements of row 102 via a path as indicated by paths 106a to 106N. Data input shift register 108 includes N one-bit memory elements, indicated as memory elements 108a to 108N. Data hold shift register 110 includes N one-bit memory elements, indicated as memory elements 110a to 110N. In one embodiment, a plurality of shift registers may be employed to form each of the shift registers. In other embodiments, alternative forms of data shifting may be employed, such as a random access memory (RAM) device employing a counter.
Each of the N one-bit memory elements of data hold shift register 110 is coupled to a corresponding one of the N one-bit memory elements of data input shift register 108 via a path as indicated by paths 112a to 112N. Each of the N one-bit memory elements of data hold shift register 110 is also coupled to a corresponding one of the N fluid ejecting elements of row 102 via a path as indicated by paths 114a to 114N. Additionally fire enable shift register 104, data input shift register 108, and data hold shift register 110 each receive a clock signal 116 having a clock cycle from controller 20 via a path 118.
In one embodiment, as described below, row 102 is configured to print a series of rows of image data representative of a displayable image by ejecting ink droplets via fluid ejecting elements 102a through 102N. For illustrative purposes, assume at the outset that each of the N one-bit memory elements of fire enable shift register 104, data input shift register 108, and data hold shift register 110 contains a disable value, e.g. “0.”
To begin a print job, a first row of image data comprising N bits of image data is serially shifted into data input shift register 108 from controller 20 via a path 120, with one bit of image data being shifted into data input shift register during each clock cycle of clock signal 116. Each of the N bits of image data has a value of “1” or “0”, with “1” being an enabling value and “0” being a disabling value.
After N clock cycles, data input shift register 108 is filled with the N bits of image data of the first row of image data, with each of the N memory elements storing a different one of the N image data bits. Data hold shift register 110 then receives a load enable signal from controller 20 via a path 122, and the N image data bits of the first row of image data are parallel-shifted from data input shift register 108 to data hold shift register 110 via paths 112a through 112N. In other embodiments, data hold shift register 110 may receive a row of image data via a series of partial image data shifts occurring over a number of clock cycles.
To print the first row of data stored in data hold shift register 110, a series of one-bit fire enable values representative of a fire enable pulse is shifted into fire enable shift register 104 from controller 20 via a path 124. One bit of the series is shifted with each clock cycle, with the entire series being received in a print cycle, wherein one row of image data is printed in a print cycle. In one embodiment, each fire enable value has a value of “1” or “0”, with “1” being an enabling value and “0” being a disabling value. A first X fire enable values of the series, where X is at least equal to one, received during a first X clock cycles of the print cycle have a value of “1”, and a final N fire enable values of the series received during a final N clock cycles of the print cycle have a value of “0.” The final N fire enable values of the series cause the first X fire enable values having the enabling value to be shifted through fire enable shift register 104, thereby generating a fire enable pulse having a duration, which can be referred to as pulse width, which is equal to a product of X multiplied by a duration of the clock cycle. This fire enable pulse instructs the appropriate fluid ejecting element to eject fluid. At the end of a given print cycle, each of the N memory elements 104a through 104n of fire enable shift register 104 is storing a fire enable value having a value of “0.”
Upon each clock cycle of clock signal 116, each of the N fluid ejecting elements 102a through 102N of row 102 receives the fire enable value from the corresponding memory element of fire enable shift register via paths 106a through 106n and the image data bit from the corresponding memory element of data hold shift register 110 via paths 114a through 114N. As the X fire enable values having a value of “1” propagate through fire enable shift register 104 and reach a given fluid ejecting element, the given fluid ejecting element is enabled to generate an ink drop. If the image data bit from the memory element of data hold shift register 110 corresponding to the given fluid ejecting element has a value of “1”, the fluid ejecting element generates an ink droplet. If the image data bit has a value of “0”, though enabled, the given fluid ejecting element will not generate an ink droplet. When a first of the final N fire enable values having a value of “0” reaches the given fluid ejecting element, the fluid ejecting element is disabled from generating an ink droplet, regardless of the value of the image data bit received from the corresponding memory element of data hold register 110.
Simultaneously with fire enable shift register 104 receiving the X plus N fire enable values during the print cycle of the first row of image data, a next row of image data to be printed is serially-shifted into data input shift register 108 from controller 20 via path 120. When the print cycle of the first row of data has been completed, the N image data bits of the next row of image data are parallel-shifted from data input shift register 108 to data hold register 110 and a print cycle for the next row of image data begins. This process is repeated for each row of image data of the displayable image until the print job has been completed.
First input 156 is coupled via a path 172 to corresponding memory element 104a of a fire enable shift register 104, wherein memory element 104a stores the fire enable value. Second input 158 is coupled via a path 176 to corresponding memory element 110a of data hold shift register 110. Memory element 110a is, in-turn, coupled via a path 180 to corresponding memory element 108a of data input shift register 108.
Gate 164 of FET 162 is coupled via a path 184 to output 160 of AND-gate 154. Firing resistor 72 has a first terminal coupled to a voltage source 186 and a second terminal coupled to drain 168. Source 166 is coupled to ground 188. AND-gate 154 is configured to provide a fire signal via path 184 to gate 164 based on the fire enable value and image data value stored in corresponding memory elements 104a and 110a, respectively. Upon each cycle of a clock signal, such as a clock signal 116, AND-gate 154 is configured to receive the fire enable value presently stored in memory element 104a and the image data value presently stored in memory element 110a at first input 156 and second input 158, respectively.
When both the fire enable value and the image data value have a value of “1”, AND-gate 154 provides a fire signal to gate 164, causing FET 162 to “turn on” and couple the second terminal of firing resistor 72 to ground 188, which correspondingly causes a current 190 to pass from voltage source 186 to ground 188 through firing resistor 72. Current 190 through firing resistor 72 heats ink in a corresponding ink chamber, such as ink chamber 86, causing an ink droplet to be ejected through a corresponding nozzle, such as nozzle 13. When either the fire enable value and/or the image data value have a value of “0”, AND-gate 154 does not provide a fire signal to turn on FET 152, current 190 does not flow through firing resistor 72, and no ink droplet is ejected by fluid ejecting element 152.
In the example operation of
Data hold shift register 210 continues to hold the row of image data, with memory elements 210a to 210e storing a value of “0” and memory elements 210f to 210j storing a value of “1”. In other words, the row of image data is “0000011111” and was loaded from data input shift register 208 prior to the three clock cycles of the print cycle. Thus, even though enabled to eject ink, fluid ejecting elements 202a to 202c will not eject ink because the image data bits stored in and previously received from corresponding memory elements 210a to 210c via paths 214a to 214c each have a disable value.
Fire enable shift register 204 is now indicated as having received seven of the ten final enable values of the fire enable pulse, each having a disable value, “0”, and being stored in memory elements 204a to 204g. Consequently, the first three fire enable values having a value of “1” have been shifted to memory elements 204h to 204j. As a result, fluid ejecting elements 202h to 202j are enabled to eject ink. Furthermore, because the image data bits stored in and received from corresponding memory elements 210h to 210j via paths 214h to 214j each have a value of “1”, fluid ejecting elements 202h to 202j are, in fact, in the process of generating ink droplets since both memory elements 210h to 210j and memory elements 204h to 204j contain values having enabling values.
Data hold shift register 210 is indicated as continuing to hold the first row of image data in memory elements 210a through 210j. However data input shift register 208 is now indicated as containing the next row of image data, with memory elements 208a to 208j seven of which storing image data values of “1”. In other words, the next row of image data is “1111111000”. The next row of image data will be shifted from data input shift register 208 to data hold shift register 210 upon receipt of a load enable signal from controller 20 via path 222, and the above process will be repeated until each subsequent image data row of a print job has been printed by printhead 200.
As illustrated by
It should be noted that while
One characteristic of an array is that different sections, or zones, of an array are typically at different temperatures. As a result, in a zone that is at an already elevated temperature, the ink does not require as much energy to be heated to a temperature to produce nucleation as ink in a cooler zone. If the same amount of energy is applied to each firing resistor of the array, those firing resistors in a zone at an already elevated temperature may become over-energized while those in a cooler zone may receive too little energy. Too little energy may cause print quality degradation, while too much energy may shorten an expected operating life of a firing resistor. As a result, energy control is a beneficial feature in printhead assemblies of inkjet printing systems, and is particularly beneficial in printhead assemblies of wide array inkjet printing systems, where larger areas increase the potential for thermal gradients.
In the illustrated embodiment, each of the N fire enable memory elements 304a to 304N is coupled to a corresponding one of the N fluid ejecting elements of row 302 via paths 306a to 306N. Data input shift register 308 includes N one-bit memory elements, illustrated as 308a to 308N, and data hold shift register 310 includes N one-bit memory elements, illustrated as 310a to 310N. Additionally, fire enable memory elements 304a to 304N of row 304 are arranged into N memory element zones, identified as memory element zones 311a to 311N. In the illustrated embodiment, each fire enable memory element 304a to 304N corresponds to a different one of the zones 311a to 311N.
Each of the N one-bit memory elements of data input shift register 308 is coupled to a corresponding one of the N one-bit memory elements of data hold shift register 310 via paths 312a to 312N. Each of the N one-bit memory elements of data hold shift register 310 is, in-turn, coupled to a corresponding one of the N fluid ejecting elements of row 302 via paths 314a to 314N. Additionally, data input shift register 308, data hold shift register 310, and fire enable controller 305 each receive a first clock signal 316 having a clock rate via a path 318 from a controller, such as controller 20 (see
In one embodiment printhead assembly 300 is configured to print a row of image data comprising N bits of image data in a fashion similar to that described above for printhead assembly 200. As such, the N bits of image data are initially serially-shifted into data input shift register 308 via a path 320 from a controller, such as controller 20 (see
Row 304 of fire enable memory elements then receives fire enable values from controller 20 via path 324, with each fire enable memory element 304a to 304N having at least one enabling value and at least one disabling value. Upon each cycle of first clock signal 316, each of the fluid ejecting elements 302a to 302N receives the fire enable value from the corresponding fire enable memory element of row 304 and image data from the corresponding memory element of data hold shift register 310 via paths 306 and 314, respectively. Each fluid ejecting element 302a to 302N is configured to eject ink when the corresponding fire enable value is an enabling value and when there is image data to be printed. In other words, when the corresponding memory element of data hold shift register 310 is enabled (i.e., holds image data to be printed), each fluid ejecting element 302 will be energized for ink ejection so long as the corresponding fire enable memory element of row 304 has an enabling value.
Fire enable controller 305 provides to fire enable memory elements 304a to 304N the first clock signal 316 via a path 326 and a second clock signal having a clock rate via a path 328. By varying the rate of the second clock relative to the rate of the first clock, fire enable controller 305 is configured to individually control for each zone of memory elements 311a to 311N a duration for which the at least one enabling value and the at least one disabling value are stored. By controlling this duration for each zone 311 of fire enable memory elements, fire enable controller 305 controls the energy provided to fluid ejecting elements 302 corresponding to each zone. In the illustrated embodiment, because each zone 311 corresponds to a single fluid ejecting memory element 304, fire enable controller 305 individually controls the energy provided to each fluid ejecting element 302a to 302N.
In one embodiment, fire enable controller 305 varies the rate of the second clock based on temperature data of each zone 311. In other embodiments, fire enable controller 305 varies the rate of the second clock based on a power supply voltage level, average firing resistor values associated with each zone 311, and prior knowledge of appropriate energy levels under similar conditions. Alternatively, a single clock that varies in frequency based upon the position of the “pulse” relative to row 302 of fluid ejecting elements may be utilized in lieu of first and second clocks 326 and 328.
Printhead assembly 300 further includes a row 404 of N AND-gates, illustrated as 404a to 404N, with each AND-gate having a first and a second input and an output. Each of the N one-bit memory elements of IFE shift register 400 is coupled to a first input and each of the N one-bit memory elements of nTFE shift register 402 is coupled to a second input of a corresponding one of the row 404 of AND-gates via paths 406 and 408, respectively. The output of each of the AND-gates 404a to 404N is coupled to a corresponding one of the N fluid ejecting elements 302a to 302N (see
Fire enable controller receives first clock signal 316 via path 318. Fire enable controller provides the first clock signal 316 to IFE shift register 400 via path 326 and the second clock signal to nTFE shift register 402 via path 328. IFE register 400 receives initiate fire enable (IFE) values via a path 424a and nTFE register 402 receives not terminate fire enable (nTFE) values via a path 424b. In one embodiment, the IFE values and nTFE values are received from a controller, such as controller 20.
To print a row of data stored in data hold shift register 310, a series of one-bit IFE values is serially shifted into IFE shift register 400 via path 424a, with one bit of the series being shifted each cycle of the first clock signal. Each IFE value has a value of “1” or “0”, with “1” being an enabling value and “0” being a disabling value. Initially, each memory element 400a to 400N of IFE shift register 400 contains a “0” while each memory element 402a to 402N of nTFE shift register 402 contains a “1”.
To begin, each of the IFE values of the series has a value of “1”. As the IFE values having a value of “1” are shifted in direction 426 across IFE shift register 400, the AND-gates 404 where the corresponding IFE shift register 400 and nTFE shift register 402 memory elements are each holding a value of “1” provides a fire enable signal being an enabling value to its corresponding fluid ejecting element 302 via path 306. At this point, the corresponding fluid ejecting elements 302 that also have image data having a value of “1” stored in the corresponding memory element of data hold shift register 310 begin conducting an electrical current through firing resistor 72 to eject ink (see
After a desired number of IFE values having a value of “1” have been shifted into IFE shift register 400, one-bit IFE values having a value of “0” are shifted into IFE shift register 400. One bit is shifted with each cycle of clock signal 1 at 326 until each of the memory elements 400a to 400N once again holds a “0”. At some point after the IFE shift register begins receiving IFE values having a value of “1” but before the IFE shift register begins receiving IFE values having a value of “0”, nTFE shift register 402 begins receiving nTFE values having a value of “0”, if an adjustment is to be made to the pulse width. The nTFE shift register 402 continues to receive nTFE values having a value of “0” until IFE shift register 400 begins to receive IFE values having a value of “0”. At this point, nTFE values having a value of “1” are shifted into nTFE shift register 402 until each of the memory elements 402a to 402N once again holds a “1”.
As the nTFE values having a value of “0” reach the memory elements of nTFE register 402 where the corresponding memory elements of the IFE shift register 400 hold a value of “1”, the corresponding AND-gates 400 no longer provide a fire enable signal being an enabling value, but instead provide a fire enable signal being a disabling value. As a result, the corresponding fluid ejecting elements 302 cease conducting an electrical current through firing resistor 72.
At a given fluid ejecting element 302, a duration between receiving from the associated AND-gate 404 the fire enable signal being the enabling value and receiving the fire enable signal having the disabling value defines a width of a fire enable pulse for the given fluid ejecting element. In other words, the fire enable pulse width for a given fluid ejecting element 302 is the duration between the corresponding memory element of IFE shift register 400 receiving an IFE value having a value of “1” and the corresponding memory element of nTFE shift register 402 receiving an nTFE value having a value of “0”. A maximum width of the fire enable pulse is determined by the number of IFE values having a value of “1” shifted into IFE shift register 400.
If the rate of the second clock is equal to the rate of the first clock 316, each fluid ejecting element 302a to 302N receives a fire enable signal having a substantially equal pulse width from corresponding AND-gates 404a to 404N. To vary the width of the fire enable pulse across row 302 of fluid ejecting elements 302a to 302N, fire enable controller varies the rate of the second clock relative to the first clock 316. When fire enable controller 305 provides a second clock having a rate less than the rate of the first clock 316, the width of the fire enable pulse increases at each adjacent memory element of row 304, up to the maximum width, with fluid ejecting element 302a receiving a fire enable pulse having the shortest duration and fluid ejecting element 302N receiving the fire enable pulse having the longest duration. Similarly, when fire enable controller 305 provides a second clock having a rate greater than the rate of the first clock 316, the width of the fire enable pulse decreases at each adjacent memory element of row 304 with fluid ejecting element 302a receiving a fire enable pulse having the longest duration and fluid ejecting element 302N receiving the fire enable pulse having the shortest duration. Thus, by varying the rate of the second clock signal provided to nTFE shift register 402 via path 328, fire enable controller 305 controls the width of the fire enable pulse of each memory element 304 to thereby control the energy delivered to the firing resistor 72 of each corresponding fluid ejecting element 302a to 302N.
At the point in time illustrated by
In the illustrated embodiment, each of the N fire enable memory elements 504a to 504N is coupled to a corresponding one of the N fluid ejecting elements of row 502 via paths 506a to 506N. Data input shift register 508 includes N one-bit memory elements, illustrated as 508a to 508N, and data hold shift register 510 includes N one-bit memory elements, illustrated as 510a to 510N. Additionally, fire enable memory elements 504a to 504N of row 504 are arranged into M memory element zones, identified as memory element zones 511a to 511M.
Each of the N one-bit memory elements of data input shift register 508 is coupled to a corresponding one of the N one-bit memory elements of data hold shift register 510 via paths 512a to 512N. Each of the N one-bit memory elements of data hold shift register 510 is, in-turn, coupled to a corresponding one of the N fluid ejecting elements of row 502 via paths 514a to 514N. Additionally, data input shift register 508, data hold shift register 510, and fire enable controller 505 each receive a clock signal 516 via a path 518 from a controller, such as controller 20 (see
In one embodiment printhead assembly 500 is configured to print a row of image data comprising N bits of image data in a fashion similar to that described above for printhead assembly 100. As such, the N bits of image data are initially serially-shifted into data input shift register 508 via a path 520 from a controller, such as controller 20 (see
Row 504 of fire enable memory elements 504a to 504N then receives fire enable values from fire enable controller 505 via path 524, with each fire enable value being one of an enabling value or a disabling value. Upon each cycle of clock signal 516, each of the fluid ejecting elements 502a to 502N receives the fire enable value from the corresponding fire enable memory element of row 504 and image data from the corresponding memory element of data hold shift register 510 via paths 506 and 514, respectively. Each fluid ejecting element 502a to 502N is configured to eject ink when the corresponding fire enable value is the enabling value and when there is image data to be printed. In other words, when the corresponding memory element of data hold shift register 510 holds image data having a value of “1”, each fluid ejecting element 502 will be energized for ink ejection so long as the corresponding fire enable memory element of row 504 stores the enabling value.
Fire enable controller 505 is configured to individually control the fire enable values provided to each zone of fire enable memory elements 511a to 511M. By controlling the duration for which the enabling values and the disabling values of each zone are stored in each fire enable memory element 511a to 511M, fire enable controller 505 controls the energy provided to fluid ejecting elements 302 corresponding to each zone.
Fire enable controller 505 includes a pulse width controller 608, M pulse width zone registers (PWRs) 610a to 610M, and M fire enable zone generators (FEGs) 612a to 612M, with each PWR 610 and each FEG 612 corresponding to a different one of the M memory element zones 511. Each PWR 610 is coupled to a read line 614 and a write line 616 and to a corresponding FEG generator 612 via a path 617.
Each FEG 612, except for FEG 612a, is coupled via a path 618 to a first memory element of a corresponding FEZ shift register 604 and is coupled via a path 620 to a last memory element of a FEZ shift register 604 preceding its corresponding FEZ shift register 604. FEG 612a is also coupled to a first memory element of a corresponding FEZ shift register 604 (which as illustrated is the first memory element of FEZ shift register 604a, which corresponds to fire enable memory element 504a), but is coupled via path 620a to a controller, such as controller 20.
Printhead assembly 600 operates as described below to print a row of image stored in data hold shift register 510. Initially, each memory element of each FEZ shift register 604 contains a value of “0”. A print cycle begins when FEG 612a, corresponding to the first memory element zone 511a, receives a value of “1” at the fire enable input via path 620a. On the next cycle of clock signal 516, FEG 612a begins sending fire enable values having a value of “1” to corresponding FEZ shift register 604a via path 618a, sending one fire enable value upon each cycle of clock 316.
When the first of the fire enable values having a value of “1” propagates to the last memory element of FEZ shift register 604a (indicated as “a”), the fire enable value is provided to the fire enable input of FEG 612b, corresponding to the second memory element zone 511b. In response, FEG 612b begins sending fire enable values having a value of “1” to corresponding shift register 604b. This process is repeated until FEG 612M, corresponding to memory element zone 511M, receives a fire enable value of “1” from the last memory element of FEZ shift register 604(M−1) via path 620M, and it too provides fire enable values having a value of “1” to its corresponding FEZ shift register 604M.
The number of clock cycles that each FEG 612 provides a fire enable value having a value of “1” is determined by its corresponding PWR 610. Each PWR 610 contains a number corresponding to the number of clock cycles that the corresponding FEG 612 is to provide a fire enable value having a value “1” for the corresponding zone of fire enable memory elements 511. The numbers are written to each PWR 610 by pulse width controller 608 via write line 616. In one embodiment, pulse width controller 608 determines the numbers based on temperature data received via a path 622 for each zone 511 from temperature sensors located in each zone. In other embodiments, the number stored in each PWR 610 is also based on a power supply voltage level, average firing resistor values associated with each zone, and prior knowledge of appropriate energy levels under similar conditions.
After each FEG 612 provides a quantity of fire enable values having a value of “1” based on the value stored in the corresponding PWR 610, each FEG provides fire enable values having a value of “0” until each memory element of the corresponding FEZ shift register 604 again holds a “0”. The net effect is that a series of fire enable values having a value of “1” is clocked across fire enable memory elements 504a to 504N, with each zone of fire enable memory elements 511 potentially receiving a fire enable signal having a different pulse width. By controlling the number of fire enable values having a value of “1” provided to individual zones 511, printhead assembly 500 can individually control the energy provided to firing resistors 72 associated with each zone.
In inkjet printheads, ink droplet weight and “decap” performance, among other things, are affected by the temperature of the printhead. Drop weight has significant temperature dependence, and variations in drop weight due to variations in printhead temperature can result in print quality defects such as varying optical densities and hues. Decap refers to a thickening of ink in the nozzle area due to evaporation of a carrier fluid, or vehicle, into the surrounding air. If a printhead is left “uncapped” at an excessively high temperature, the time may be short before the ink thickens and becomes a defect-producing nozzle obstruction.
Unfortunately, one characteristic of an array is that when in use, different sections, or zones, of an array are typically at different temperatures. These temperature variations, or thermal gradients, across the printhead can potentially produce the above described print quality defects. As a result, temperature control is a beneficial feature in inkjet printing systems, particularly in wide array inkjet printing systems where longer distances give rise to thermal gradients, to improve print quality and printhead assembly performance.
Printhead assembly 700 further includes a fire enable shift register 704 having N memory elements, indicated as 704a to 704N, and a data hold shift register 710 having N memory elements, indicated as 710a to 710N. Each of the N memory elements of fire enable shift register 704 is coupled to a corresponding one of the drop ejecting elements 702 via paths 712a to 712N. Similarly, each of the N memory elements of data hold shift register 710 is coupled to a corresponding one of the drop ejecting elements 702 via paths 714a to 714N.
Drop ejecting elements 702 and corresponding memory elements 704 and 710 are arranged in a plurality of zones 716, indicated as 716a to 716M, with each zone having at least one drop ejecting element 702. In one embodiment, zones 716 are selected based on expected thermal gradients across the width of row 702. The number of zones 716 and the number of drop ejecting elements 702 in each zone 716 may vary, depending on the granularity of temperature control desired.
Printing system 690 further includes a warming system 720. Warming system 720 includes a warming controller 722, a warming enable register 724, and a plurality of temperature sensors 726. Warming enable register 724 comprises a plurality of memory elements, indicated as 724a to 724M, each corresponding to a different one of the zones 716. Each memory element 724 stores a warming enable value being an enabling value or a disabling value. In one embodiment, as illustrated, each temperature sensor of the plurality, indicated as 726a to 726M, comprises a portion of printhead assembly 700 and corresponds to and is located proximate to a different one of the zones 716. Each temperature sensor 726 provides temperature data representative of the operating temperature of the corresponding zone 716. In other embodiments, temperature sensors 726 can be positioned at other locations suitable for providing temperature data representative of the operating temperatures of zones 716. In one embodiment, warming system 720 comprises a portion of printhead assembly 700.
In one embodiment, printing system 690 is configured to print a row of image data comprising N bits of image data in a fashion similar to that described above for printhead assembly 200. As such, the N bits of image data are shifted into the N memory elements of data hold shift register 710. Each of the N bits of image data has a value of “1” or “0”, with a “1” indicating that there is image data to be printed and a “0” indicating there is no image data to be printed.
Fire enable shift register 704 then receives a series of fire enable values from a controller, such as controller 20 (see
Warming controller 722 receives, via path 728, temperature data from each of the temperature sensors 726 and monitors the operating temperature of each zone 716. When the operating temperature of a given zone 716 is below a corresponding setpoint temperature for the zone, warming controller writes a warming enable value being an enabling value to the zone's corresponding memory element in warming enable register 724. In one embodiment, when a warming enable value being an enabling value is written to a memory element 724 corresponding to a zone 716 of a drop ejecting element whose corresponding fire enable memory element 704 is storing a fire enable value being an enabling value, corresponding heater circuit 703 is activated and heats the drop ejecting element, but not to a temperature sufficient to generate an ink droplet.
In one embodiment, printhead assembly 700 optionally includes a warming control shift register 730 having N memory elements, indicated as 730a to 730N, with each of the N memory elements corresponding to a different one of the N drop ejecting elements 702. When printing system 690 prints a row of image data, warming control shift register 730 is configured to receive a series of warming control values from a controller in a fashion similar to that described above for fire enable shift register 704, wherein each warming control value is one of at least one enabling value or a at least one disabling value. In one embodiment, warming control shift register 730 receives the series of warming control values concurrent with fire enable shift register 704 receiving the series of fire enable values. When a warming control value which is an enabling value is stored in a memory element 730 corresponding to a drop ejecting element 702 in a zone 716 whose warming enable value stored in corresponding memory element 724 is an enabling value, the corresponding heater circuit 703 is activated and heats the drop ejecting element, but not to a temperature sufficient to generate an ink droplet.
By maintaining those drop ejecting elements 702 that are enabled to eject an ink droplet at a setpoint temperature, or baseline temperature, in this fashion, variations in the weight of ink droplets generated across the width of printhead assembly 700 are reduced, resulting in a reduction of print defects. Furthermore, by heating only those drop ejecting elements 702 in the zone 716 that is enabled, generation of excessive waste heat is reduced.
A first input of AND-gate 754 is coupled via a path 770 to corresponding memory element 710a of data shift register 710, wherein memory element 710a stores an image data value. In one embodiment, the image data value has a value of “1” or “0”. A second input of AND-gate-754 is coupled via a path 772 to memory element 704a of fire enable shift register 704, wherein memory element 704a stores a fire enable value being one of an enabling value or a disabling value. In one embodiment, the fire enable value is an enabling value when the fire enable value is “1” and is a disabling value when the fire enable value is “0”. An output of AND-gate 754 is coupled via a path 774 to a control gate of FET 762.
A first input of AND-gate 764 is coupled via a path 776 to memory element 724a of warming enable register 724, wherein memory element 724a stores a warming enable value which is one of an enabling value or a disabling value. In one embodiment, the warming enable value is the enabling value when the warming enable value is “1′ and the disabling value when the warming enable value is “0”. A warming enable value of “1” indicates that the temperature of corresponding zone 716a is below the corresponding setpoint temperature. A second input of AND-gate 764 is coupled to memory element 704a via path 772.
A first input of OR-gate 766 is coupled to the output of AND-gate 754 via path 774. A second input of OR-gate 766 is coupled to an output of AND-gate 764 via a path 778. An output of OR-gate 766 is coupled to a control gate of FET 768 via a path 780. Firing resistor 72 has a first terminal coupled to a voltage source (Vpp) 786 and a second terminal coupled to the drains of FET's 762 and 768. The source terminals of FET's 762 and 768 are coupled to ground 788.
Each FET 762 and 768 has a different “ON” resistance (RON). In one embodiment, the RON of FET 762 is low relative to the RON of FET 768. Consequently, FET 762 is capable of switching a higher current 790 through firing resistor 72 relative to FET 768. The RON values of FET's 762 and 768 are such that the current 790 switched through firing resistor 70 by FET 768 acting independently is insufficient to cause nucleation of ink in a corresponding ink chamber, such as ink chamber 86 (See
When both the fire enable value and the data image value, stored respectively in memory elements 704a and 710a, have a value of “1”, the output of AND-gate 754 is “high”, which results in the output of OR-gate 766 being “high”. With the outputs of both AND-gate 754 and OR-gate 766 being “high”, both FET's 762 and 768 are turned on, resulting in drop ejecting element 702a generating an ink droplet, regardless of the value of the corresponding warming enable value stored in memory element 724a.
When the fire enable value stored in memory element 704a has a value of “1” but the image data stored in memory element 710a has a value of “0”, the output of AND-gate 754 is “low”. Consequently, FET 762 is turned off. If the corresponding warming enable value stored respectively in memory element 724a has a value of “1”, the output of AND-gate 764 is “high”, resulting in the output of OR-gate 766 being “high”. With the output of OR-gate 766 being “high”, FET 768 is turned on. With FET 768 turned on and FET 762 turned off, current 790 has a level too low to cause nucleation of ink in a corresponding ink chamber, but a level high enough to cause firing resistor 72 and FET 768 to generate enough heat to warm drop ejecting element 702a. If the warming enable value has a value of “0”, meaning that the temperature of zone 716a is at or above the setpoint temperature, both FET 762 and FET 768 will be turned off and no current will pass through and no heat will be generated by firing resistor 72 or FET 768.
When both the fire enable value and the data image value, stored respective in memory elements 704a and 710a, have a value of “0”, the outputs of both AND-gates 754 and 764 will be “low”. Consequently, both FET's 762 and 768 will be turned off and no current will pass through and no heat will be generated by firing resistor 72, regardless of the value of the corresponding warming enable value stored in memory element 724a.
In one embodiment, as illustrated, warming system 720 includes a plurality of temperature sensor 726, each temperature sensor 726 of the plurality corresponding to a different one of the zones 716 of printhead assembly 700. In other embodiment, multiple temperature sensors 726 may be provided for each zone 716. In one embodiment, as illustrated, each temperature sensor 726 is located internally to printhead assembly 700 and proximate to the corresponding zone 716.
In one embodiment, as illustrated, each temperature sensor 726 includes a temperature sensitive resistor (RT) 804 and a field effect transistor (FET) 806. A first terminal of each resistor RT 804 is coupled via a shared supply path 808 to current source 800, and a second terminal of each RT 804 is coupled to a drain terminal of corresponding FET 806. A control gate of each FET 806 is coupled via a corresponding switch control line 810 to warming controller 722, and a source terminal of each FET 806 is coupled to ground 788. Current source 800 is powered from a voltage source 812.
An input of A/D converter 802 is coupled to supply path 808 via a path 814 and an output is coupled to warming controller 722 via path 728. Warming controller 722 is further coupled to a control input of A/D converter 802 via a path 816. Warming controller 722 provides warming control data (i.e., warming enable values) to warming enable register 724 via a path 818, and receives via a path 820 setpoint temperature data for each zone 716 from a controller, such as controller 20.
Prior to printing image data, warming controller 722 sequentially measures the present temperature of each zone 716 by sequentially turning on FET's 806a to 806M via their corresponding switch control lines 810a to 810M. When a given FET 806 is turned on, it completes a current path from current source 800 to ground 788 via path 808 and the corresponding RT 804, with current source 800 providing a current at a known level. The resulting voltage level generated at the input of A/D converter 802 via path 814 is a function of the current provided by current source and the resistance of RT 804 corresponding to the given zone (neglecting the resistance of corresponding FET 806), and is proportional to the present temperature of the given zone. A voltage reading of each zone 716 is taken by A/D converter 802 and provided to warming controller 722 via path 728.
During manufacture, readings of initial voltage values are taken for each zone 716 at a known reference temperature for calibration purposes by warming controller 722 and stored therein. These initial voltage values and known characteristic of RT 804 are used by warming controller 722 to convert the present voltage readings received via path 728 to a present temperature value for each zone 716.
Warming controller 722 then compares the present temperature value of each zone 716 to a desired setpoint temperature value for each zone previously received at 820 from a system controller, such as controller 20. Warming controller then compares the present temperature value of each zone 716 to the zone's corresponding desired setpoint temperature value, and writes a warming enable value having a value based on the comparison to the corresponding memory element of warming enable register 724. The warming enable value will be an enabling value (i.e., a value of “1”) when the present temperature level is less than the desired setpoint temperature value, and a disabling value (i.e., a value of “0”) when the present temperature level is at least equal to the desired setpoint temperature level. The warming enable values of each memory element of warming enable register 724 are then provided to drop ejecting elements 702 of the corresponding zone 716 for activation of heating circuits 703 as described above by
A first input of AND-gate 854 is coupled via a path 870 to corresponding memory element 710a of data hold shift register 710, wherein memory element 710a stores an image data value having a value of “1” or “0”. A second input of AND-gate 854 is coupled via a path 872 to memory element 704a of fire enable shift register 704, wherein memory element 704a stores a fire enable value being one of an enabling value or a disabling value. In one embodiment, the fire enable value is the enabling value when the fire enable value is “1” and the disabling value when the fire enable value is “0”.
A first input of AND-gate 864 is coupled via a path 874 to memory element 724a of warming enable register 724, wherein memory element 724a stores a warming enable value being one of an enabling value or a disabling value. In one embodiment, the warming enable value is the enabling value when the warming enable value is “1” and the disabling value when the warming enable value is “0”. A warming enable value of “1” indicates that the temperature of corresponding zone 716a is below the corresponding setpoint temperature. A second input of AND-gate 864 is coupled via a path 876 to memory element 730a of warming control shift register 730, wherein memory element 730a stores a warming control value being one of an enabling value or a disabling value. In one embodiment, the warming control value is the enabling value when the warming control value is “1” and the disabling value when the warming control value is “0”.
A first input of OR-gate 866 is coupled via a path 878 to an output of AND-gate 854. A second input of OR-gate 866 is coupled via a path 878 to an output of AND-gate 864. An output of OR-gate 866 is coupled via a path 880 to a control gate of FET 862. Firing resistor 72 has a first terminal coupled to a voltage source (VPP) 886 and a second terminal coupled to a drain of FET 862. A source terminal of FET 862 is coupled to ground 888.
To print a row of image data stored in data shift register 710, a series of fire enable values having a value of “1” (enabling value) are shifted through fire enable shift register 704, wherein each memory element of fire enable shift register 704 initially stored a value of “0” (disabling value). If memory element 710a of data shift register 710 is holding an image data value of “1”, both inputs to AND-gate 854 will be “high” as the series of fire enable values having a value of “1” are shifted through memory element 704a. With both inputs of AND-gate 854 “high”, the output will also be “high” and cause the output of OR-gate 866 to be “high”. With the output of OR-gate 866 “high”, FET 862 is turned on, causing a current 890 to flow through firing resistor 72 to ground 888.
The period of time that current 890 flows through firing resistor 72 depends on the number of “1's” in the series of fire enable values having the enable state that are shifted through fire enable shift register 704. In any case, the minimum number of “1's” in the series is sufficient to cause current 890 to flow long enough for firing resistor 72 to generate enough heat to cause nucleation of ink and an ink droplet to be ejected from a corresponding nozzle. If memory element 710a is holding an image data value of “0”, no ink droplet will be ejected from the corresponding nozzle regardless of the series of fire enable values is the enabling value.
Concurrently with the series of “1 's” being shifted across fire enable shift register 704, a series of warming control value having a value of “1” (enabling value) is shifted through warming control shift register 730, wherein each memory element of warming control shift register 730 initially stored a value of “0” (disabling value). If memory element 724a of warming enable register 724 is holding a warming enable value of “1” (meaning that the temperature of zone 716a is below the setpoint temperature), both inputs to AND-gate 864 will be “high” as the series of warming control values having a value of “1” is shifted through memory element 730a. With both input of AND-gate 864 “high”, the output will also be “high” and cause the output of OR-gate 866 to be “high.” With the output of OR-gate 866 “high”, FET 862 is turned on, causing current 890 to flow through firing resistor 72 to ground 888.
The period of time that current 890 flows through firing resistor 72 depends on the number of “1's” in the series of warming control values (i.e., being enabling values) that are shifted through warming control shift register 730. As described above, a given consecutive number of fire enable values having a value of “1's” is required to cause firing resistor 72 to generate heat sufficient to cause nucleation of ink and ejection of an ink droplet. Thus, a maximum allowable number of “1's” in the series of warming control values will be sufficient to cause current 890 to flow long enough to heat drop ejecting element 702, but not long enough for firing resistor 72 to generate enough heat to cause nucleation of ink, and thus no ink droplet to be ejected from the corresponding nozzle.
In one embodiment, drop ejecting elements 702 are warmed by heating circuit 703 independent of whether printhead assembly 690 is printing image data. In this case, the series of warming control values having a value of “1” is shifted through warming control shift register 730 with no image data stored in data shift register 710 and no series of fire enable values being enabling values being shifted through fire enable shift register 704. When the temperature of zone 716a is below the setpoint temperature, warming controller 722 will write a memory enable value having a value of “1” in memory element 704a. As the series of warming control values having a value of “1” is shifted through warming control shift register 730, and thus through memory element 730a, both inputs to AND-gate 864 will be “high”, thereby causing the output of OR-gate 866 to be “high” and FET 862 to be turned on.
With FET 862 turned on, current 890 is conducted through firing resistor 72 and begins to warm drop ejecting element 702a. The series of warming control elements having a value of “1” is continued to be shifted through fire enable shift register 730 and memory element 730a until the temperature of zone 716a reaches the setpoint temperature. When the temperature of zone 716a reaches the setpoint temperature, warming controller 722 ceases the warming of drop ejecting elements in the zone by writing a warming enable value having a value of zero to memory element 724a, thereby causing the outputs of AND-gate 864 and OR-gate 866 to go low and FET 862 to turn off.
It should be noted that while the description uses “1” to indicate enabling values, and “0” to indicate disabling values, the reverse can be utilized depending on the logic used.
Further, even though a shift register is shown in each of the figures that extends for an entire row of fluid ejection elements, multiple shift registers that each relate to different portions of a row of fluid ejection elements may be utilized. By using multiple shift registers that relate to different portions of a single row, a single row of fluid ejection elements may have different portions that eject fluid simultaneously. This allows for an increase in the fluid ejection speed of a row, which has advantages in the area of printing.
Also, it should be noted that a single row, in one embodiment has a 600 dpi resolution, and as such in one implementation, the number of nozzles in a row should allow for such resolution. However, other resolutions and numbers of nozzles may be utilized depending on the needs and particular applications.
Although specific embodiments have been illustrated and described herein, it will be appreciated by those of ordinary skill in the art that a variety of alternate and/or equivalent implementations may be substituted for the specific embodiments shown and described without departing from the scope of the present invention. This application is intended to cover any adaptations or variations of the specific embodiments discussed herein. Therefore, it is intended that this invention be limited only by the claims and the equivalents thereof.
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