Patent Application
20160308495
The present application relates to Doherty amplifiers, in particular series connected Doherty amplifiers with summing networks that present a stable impedance transformation to the amplifier circuits over a wide bandwidth.
RF (radio frequency) power architectures within the telecommunications field focus on achieving high DC-to-RF efficiency at significant power back off from Psat (the average output power when the amplifier is driven deep into saturation). This is due to the high peak to average ratio (PAR) of the transmitted digital signals such as W-CDMA (wideband code division multiple access), LTE (long term evolution) and WiMAX (worldwide interoperability for microwave access). The most popular power amplifier architecture currently employed is the Doherty amplifier. The Doherty amplifier employs a class AB main amplifier and a class C peaking amplifier, and efficiency is enhanced through load modulation of the main amplifier from the peaking amplifier.
Doherty amplifier circuits typically achieve peak efficiency only at a very limited bandwidth. One solution for improving the bandwidth limitation of Doherty amplifiers is to provide multiple amplifiers for different frequency bands. However, this solution increases system cost and complexity. Alternatively, multiple smaller and wider bandwidth amplifiers can be combined in parallel to achieve a suitable bandwidth. This scheme introduces additional combiner loss, requires additional circuit area for the combiner, and is therefore more costly and less power efficient.
A Doherty amplifier circuit is disclosed. According to an embodiment, the Doherty amplifier circuit includes an RF input terminal, an RF output terminal, a main amplifier having a first input terminal and a first output driving terminal, the first input terminal being connected to the RF input terminal, and a peaking amplifier having a second input terminal and a second output driving terminal, the second input terminal being connected to the RF input terminal. The Doherty amplifier circuit further includes an output combining network being configured to feed output current from the first and second output driving terminals into a summing node. The output combining network includes a transmission line transformer balun having first and second input ports and a first output port connected to the summing node, a first electrical connection between the first output driving terminal and the first input port, and a second electrical connection between the second output driving terminal and the second input port. The second electrical connection includes a quarter wave impedance inverter. The Doherty amplifier circuit further includes a first output impedance matching network connected between the summing node and the RF output terminal.
A packaged Doherty amplifier is disclosed. According to an embodiment, the packaged Doherty amplifier includes an electrically conductive RF input terminal, an electrically conductive RF output input terminal, a main amplifier including a first input terminal and a first output driving terminal, the first input terminal being connected to the RF input terminal, and the first output driving terminal opposite from the substrate, and a peaking amplifier including a second input terminal and a second output driving terminal, the second input terminal being connected to the RF input terminal, and the second output driving terminal opposite from the substrate. The packaged Doherty amplifier further includes an output combining network being configured to feed output current from the first and second output driving terminals into a summing node. The output combining network includes a transmission line transformer balun that is mounted on the substrate and includes first and second input ports and a first output port connected to the summing node, a first electrical connection between the first output driving terminal and the first input port, and a second electrical connection between the second output driving terminal and the second input port. The second electrical connection includes a quarter wave impedance inverter. The packaged Doherty amplifier further includes a first output impedance matching network connected between the summing node and the RF output terminal.
A method of operating a Doherty amplifier circuit having an RF input terminal, an RF output terminal, a main amplifier having a first input terminal and a first output driving terminal, the first input terminal being connected to the RF input terminal, and a peaking amplifier comprising a second input terminal and a second output driving terminal, the second input terminal being connected to the RF input terminal is disclosed. According to the method, an RF signal is amplified between RF input terminal and an RF output terminal using one or both of the main and peaking amplifiers. The amplified RF signal generated at the first and second output driving terminals is combined into a summing node using a transmission line transformer balun. An impedance between the second output driving terminal and the transmission line transformer balun is inverted using a quarter wave impedance inverter.
Those skilled in the art will recognize additional features and advantages upon reading the following detailed description, and upon viewing the accompanying drawings.
The elements of the drawings are not necessarily to scale relative to each other. Like reference numerals designate corresponding similar parts. The features of the various illustrated embodiments can be combined unless they exclude each other. Embodiments are depicted in the drawings and are detailed in the description which follows.
The Doherty amplifier circuit 100 is configured to operate in a low power mode and in a high power mode. At lower power mode, only the main amplifier 106 is operational. The efficiency of the main amplifier 106 increases as the power level increases. The main amplifier 106 eventually reaches a maximum efficiency point as the power level continues to rise. At this power level, the peaking amplifier 108 turns on. In a high power mode, both the main main amplifier 106 and the peaking amplifier 108 are operational.
The Doherty amplifier circuit 100 of
The Doherty amplifier circuit 100 includes an output combining network 114 that is configured to feed output current from a first output driving terminal 116 of the main amplifier 106 and from a second output driving terminal 118 of the peaking amplifier 108 into the summing node 110. That is, the output combining network 114 combines the power generated by the main amplifier 106 and the peaking amplifier 108 at the summing node 110.
The output combining network 114 includes a transmission line transformer balun 120. The transmission line transformer balun 120 includes at least two conductors configured to carry an RF signal with minimal reflections (i.e., transmission lines), wherein the two conductors are designed to a multiple of a quarter wavelength of a center design frequency, and are coupled to form a transmission line between them. The balun includes first and second (unbalanced) input ports 122, 124 and a first (balanced) output port 126. The first output port 126 is connected to the to the summing node 110.
The output combining network 114 further includes a first electrical connection 128 between the first output driving terminal 116 and the first input port 122. The first electrical connection 128 may be effectuated using (nominally) perfectly conductive wire connections directly connecting the first output driving terminal 116 and the first input port 122. Alternatively, the Doherty amplifier circuit 100 may include a second output impedance matching network 130 connected to first output driving terminal 116 and the first input port 122. The second output impedance matching network 130 may include an LC or RLC network.
The output combining network 114 further includes a second electrical connection 132, which is discrete from the first electrical connection 128, and is between the second output driving terminal 118 and the second input port 124. The second electrical connection 132 may be effectuated using (nominally) perfectly conductive wire connections directly connecting the second output driving terminal 118 and the second input port 124. Alternatively, the Doherty amplifier circuit 100 may include a third output impedance matching network 134 connected to second output driving terminal 118 and the second input port 124. The third output impedance matching network 134 may include an LC or RLC network.
The second electrical connection 132 includes a quarter wave impedance inverter 136. That is, current flowing between the second output driving terminal 118 and the second input port 124 must pass through the quarter wave impedance inverter 136. According to an embodiment, the second output impedance matching network 134 is directly connected to the quarter wave impedance inverter 136, and the quarter wave impedance inverter 136 is directly electrically connected to the second input port 124 of the transmission line transformer balun 120. The impedance inverter 136 and the output matching network 134 may be implemented separately, or combined into a single network.
The quarter wave impedance inverter 136 is a two port network configured to present the dual or reciprocal impedance with which it is terminated. Thus, a very high impedance at one end of the quarter wave impedance inverter 136 will appear as a very low impedance at the other end and vice-versa. The quarter wave impedance inverter 136 may have any of a variety of commonly known configurations. For example, the quarter wave impedance inverter 136 may be configured as a single length of transmission line or alternatively may be implemented as a network of lumped elements.
In the embodiment depicted in
According to an embodiment, the main amplifier 106 and peaking amplifier 108 are each configured as three terminal power transistors having gate, source and drain terminals. The drain terminal of the main amplifier 106 provides the first output driving terminal 116 and the drain terminal of the peaking amplifier 108 provides the second output driving terminal 118. The source terminals of the main and peaking amplifiers 106, 108 are connected to one another and to a reference (i.e., ground). This is only one example, and the main amplifier 106 and peaking amplifier 108 can be provided by any of a variety of device types, such a power MOSFET, IGBT, BJT, thyristor, etc.
The load modulation characteristics of the output combining network 114 will now be discussed. Referring to
The impedance inversion provided by the quarter wave impedance inverter 136 is centered to a particular frequency, as it requires a transmission line length that is equal to exactly one-quarter of a wavelength (λ) long of the transmitted frequency. Thus, the quarter wave impedance inverter 136 is only able to function as in ideal inverter at a single frequency.
The incorporation of a transmission line transformer balun 120 into the output combining network 114 in the manner described herein advantageously presents a highly stable impedance versus frequency to the quarter wave impedance inverter 136. The balun 120 additionally operates as a dual mode 2:1 impedance inverter (i.e., 50 ohms at the output port 126 of the balun 120 is converted to 25 ohms at the main and peaking amplifiers 106, 108), combined with a very compact wideband power combiner, which reduces the amount of impedance transformation which must be performed elsewhere in the circuit. This also enhances bandwidth, as the balun 120 is able to provide the 2:1 impedance transformation over a wider bandwidth, with equivalent or lower loss, than conventional techniques that utilize LC filter matching networks after the summing node 110.
The transmission line transformer balun 120 naturally presents a high impedance to the second harmonic at the balanced ports 122, 124. This is due to the property of the balanced structure to reject even mode current, which is active when the peaking amplifier 108 is fully operational. This property can be used to maximize the efficiency of both the main and peaking amplifiers 106, 108 through the power range, whereby friendly passive and even active impedances can be presented to the individual transistors, maximizing efficiency.
An example of the beneficial impedance versus frequency characteristic of the output combining network 114 that includes the transmission line transformer balun 120 will now be discussed. Referring to
The output combining network 114 described with reference to
Terms such as “same,” “match” and “matches” as used herein are intended to mean identical, nearly identical or approximately so that some reasonable amount of variation is contemplated without departing from the spirit of the invention. The term “constant” means not changing or varying, or changing or varying slightly again so that some reasonable amount of variation is contemplated without departing from the spirit of the invention. Further, terms such as “first,” “second,” and the like, are used to describe various elements, regions, sections, etc. and are also not intended to be limiting. Like terms refer to like elements throughout the description.
The term “directly electrically connected” or “in direct electrical contact” describes a permanent low-ohmic connection between electrically connected elements, for example a wire connection between the concerned elements. By contrast, the term “electrically coupled” means that one or more intervening element(s) configured to influence the electrical signal in some tangible way is be provided between the electrically coupled elements. These intervening elements include active elements, such as transistors, as well as passive elements, such as inductors, capacitors, diodes, resistors, etc.
As used herein, the terms “having,” “containing,” “including,” “comprising” and the like are open ended terms that indicate the presence of stated elements or features, but do not preclude additional elements or features. The articles “a,” “an” and “the” are intended to include the plural as well as the singular, unless the context clearly indicates otherwise.
It is to be understood that the features of the various embodiments described herein may be combined with each other, unless specifically noted otherwise.
Although specific embodiments have been illustrated and described herein, it will be appreciated by those of ordinary skill in the art that a variety of alternate and/or equivalent implementations may be substituted for the specific embodiments shown and described without departing from the scope of the present invention. This application is intended to cover any adaptations or variations of the specific embodiments discussed herein. Therefore, it is intended that this invention be limited only by the claims and the equivalents thereof.
