WIRE TO BOARD CONNECTORS SUITABLE FOR USE IN BYPASS ROUTING ASSEMBLIES

BACKGROUND OF THE DISCLOSURE

The Present Disclosure relates generally to high speed data transmission systems suitable for use in transmitting high speed signals at low losses from chips, or processors and the like to backplanes, mother boards and other circuit boards, and more particularly to a bypass cable assembly having connectors that provide reliable wiping action during connection to circuit boards contacts of an electronic component.

Electronic devices such as routers, servers, switches and the like need to operate at high data transmission speeds in order to serve the rising need for bandwidth and delivery of streaming audio and video in many end user devices. These devices use signal transmission lines that extend between a primary chip member mounted on a printed circuit board (mother board) of the device, such as an ASIC, FPGA, etc. and connectors mounted to the circuit board. These transmission lines are currently formed as conductive traces on or in the mother board and extend between the chip member(s) to external connectors or circuitry of the device.

Typical circuit boards are usually formed from an inexpensive material known as FR4, which is inexpensive. Although inexpensive, FR4 is known to be lossy in high speed signal transmission lines which transfer data at rates of about 6 Gbps and greater. These losses increase as the speed increases and therefore make FR4 material undesirable for the high speed data transfer applications of about 10 Gbps and greater. This drop off begins at 6 Gbps and increases as the data rate increases. In order to use FR4 as a circuit board material for signal transmission lines, a designer may have to utilize amplifiers and equalizers, which increase the final cost of the device.

The overall length of the signal transmission lines in FR4 circuit boards can exceed threshold lengths, about 10 inches, and may include bends and turns that can create signal reflection and noise problems as well as additional losses. Losses can sometimes be corrected by the use of amplifiers, repeaters and equalizers but these elements also increase the cost of manufacturing the final circuit board. This complicates the layout of the circuit board as additional board space is needed to accommodate these amplifiers and repeaters. In addition, the routing of signal transmission lines in the FR-4 material may require multiple turns. These turns and the transitions which occur at termination points along the signal transmission lines may negatively affect the integrity of the signals transmitted thereby. It then becomes difficult to route transmission line traces in a manner to achieve a consistent impedance and a low signal loss therethrough. Custom materials, such as MEGTRON, are available for circuit board construction which reduces such losses, but the prices of these materials severely increases the cost of the circuit board and, consequently, the electronic devices in which they are used.

Chips are the heart of these routers, switches and other devices. These chips typically include a processor such as an ASIC (application specific integrated circuit) chip and this ASIC chip has a die that is connected to a substrate (its package) by way of conductive solder bumps. The package may include micro-vias or plated through holes which extend through the substrate to solder balls. These solder balls comprise a ball grid array by which the package is attached to the motherboard. The motherboard includes numerous traces formed in it that define transmission lines which include differential signal pairs for the transmission of high speed data signals, ground paths associated with the differential signal pairs, and a variety of low speed transmission lines for power, clock signals and other functions. These traces can include traces routed from the ASIC to the I/O connectors of the device into which external connectors are connected, as well as others that are routed from the ASIC to backplane connectors that permit the device to be connected to an overall system such as a network server or the like or still others that are routed from the ASIC to components and circuitry on the motherboard or another circuit board of the device in which the ASIC is used.

FR4 circuit board materials can handle data transmission speeds of 10 Gbits/sec, but this handling comes with disadvantages. In order to traverse long trace lengths, the power required to transmit these signals also increases. Therefore, designers find it difficult to provide “green” designs for such devices, as low power chips cannot effectively drive signals for such and longer lengths. The higher power needed to drive the signals consumes more electricity and it also generates more heat that must be dissipated. Accordingly, these disadvantages further complicate the use of FR4 as a motherboard material used in electronic devices. Using more expensive, and exotic motherboard materials, such as MEGTRON, to handle the high speed signals at more acceptable losses increases the overall cost of electronic devices. Notwithstanding the low losses experienced with these expensive materials, they still require increased power to transmit their signals and incurred, and the turns and crossovers required in the design of lengthy board traces create areas of signal reflection and potential increased noise.

It therefore becomes difficult to adequately design signal transmission lines in circuit boards and backplanes to meet the crosstalk and loss requirements needed for high speed applications. Although it is desirable to use economical board materials such as FR4, the performance of FR4 falls off dramatically as the data transmission rate approaches 10 Gbps, driving designers to use more expensive board materials and increasing the overall cost of the device in which the circuit board is used. Accordingly, the Present Disclosure is therefore directed to bypass cable assemblies with suitable point-to-point electrical interconnects that cooperatively define high speed transmission lines for transmitting data signals, at 10 Gbps and greater, and which assemblies have low loss characteristics.

SUMMARY OF THE PRESENT DISCLOSURE

Accordingly, there are provided herein, improved high speed bypass assemblies which utilize cables, rather than circuit boards, to define signal transmission lines which are useful for high speed data applications at 10 Gbps and above and with low loss characteristics.

In accordance with the Present Disclosure, a bypass cable assembly is used to route high speed data transmission lines between a chip or chip package and backplanes or circuit boards. The bypass cable assemblies include cables which contain signal transmission lines that avoid the disadvantages of circuit board construction, no matter the material of construction, and which provide independent signal paths with a consistent geometry and structure that resists signal loss and maintains impedances at acceptable levels.

In applications of the Present Disclosure, integrated circuits having the form of a chip, such as an ASIC or FPGA, is provided as part of an overall chip package. The chip is mounted to a package substrate by way of conventional solder bumps or the like and may be enclosed within and integrated to the substrate by way of an encapsulating material that overlies the chip and a portion of the substrate. The package substrate has leads extending from the solder bumps to termination areas on the substrate. Cables are used to connect the chip to external interfaces of the device, such as I/O connectors, backplane connectors and circuit board circuitry. These cables are provided with board connectors at their near ends which are connected to the chip package substrate.

The chip package may include a plurality of contacts which are typically disposed on the underside of the package for providing connections from logic, clock, power and low-speed components as well as high speed signal circuits to traces on the motherboard of a device. These contacts may be located on either the top or bottom surfaces of the chip package substrate where they can be easily connected to cables in a manner that maintains the geometry of the cable signal transmission lines. The cables provide signal transmission lines that bypass the traces on the motherboard. Such a structure not only alleviates the loss and noise problems referred to above, but also frees up considerable space (i.e., real estate) on the motherboard, while permitting low cost circuit board materials, such as FR4, to be used for its construction.

Cables utilized for such assemblies are designed for differential signal transmission and preferably are twin-ax style cables that utilize pairs of signal conductor wires encased within dielectric coverings to form a signal wire pair. The wire pairs may include associated drain wires and all three wires may further be enclosed within an outer shield in the form of a conductive wrap, braided shield or the like. The two signal conductors may be encased in a single dielectric covering. The spacing and orientation of the wires that make up each such wire pair can be easily controlled in a manner so that the cable provides a transmission line separate and apart from the circuit board, and which may extend between a chip, chip set, component and a connector location on the circuit board or between two locations on the circuit board. The ordered geometry of the cables as signal transmission lines components is very easy to maintain and with acceptable losses and noise as compared to the difficulties encountered with circuit board signal transmission lines, no matter what the material of construction.

The near (proximal) ends of the wire pairs are terminated to the chip package and the far (distal) ends of the cables are connected to external connector interfaces in the form of connector ports. The near end connection is preferably accomplished utilizing wire-to-board connectors configured to engage circuit boards and their contacts. In these wire-to-board connectors, free ends of the signal wire pairs are terminated directly to termination tails of the connector terminals in a spacing that emulates the ordered geometry of the cable so that crosstalk and other negative factors are kept to a minimum at the connector location. Each connector includes a support that holds the two signal terminals in a desired spacing and further includes associated a ground shield that preferably at least partially encompasses the signal terminals of the connector. The ground shield has ground terminal formed with it.

In this manner, the ground associated with each wire pair may be terminated to the connector ground shield to form a ground path that provides shielding as well as reduction of cross talk by defining a ground plane to which the signal terminals can broadside couple in common mode, while the signal terminals of the connectors edge couple together in differential mode. The termination of the wires of the bypass cable assembly is done in a manner such that to the extent possible, a specific desired geometry of the signal and ground conductors in the cable is maintained through the termination of the cable to the board connector.

The ground shield may include sidewalls that extend near the mating end of the connector to provide a multiple faceted ground plane. The drain wire, or ground, of each signal wire pair is terminated to the connector ground shield and in this manner, each pair of signal terminals is at least partially encompassed by a ground shield that has two ground terminals integrated therewith for mating with the circuit board.

In one embodiment of the present disclosure, a chip package is provided that includes an integrated circuit mounted to a substrate. The chip package substrate has termination areas to which first (or near) ends of twin-ax bypass cables are terminated. The lengths of the cables may vary, but are at least long enough for some of the bypass cables to be easily and reliably terminated to a first and second external connector interfaces which may include either a single or multiple I/O style and backplane style connectors or the like. The connectors are preferably mounted to faces of the device to permits external connectors, such as plug connectors to be mated therewith. The bypass cable assembly provides a means for the device to be utilized as a complete interior component of a larger device, such as a server or the like in a data center. At the near end, the bypass cables have board connectors that are configured to connect to contact pads on the chip package substrate.

These board connectors are of the wire-to-board style and are configured so that they may be inserted into a receptacle housing on the chip package substrate. Accordingly, the overall chip package-bypass cable assembly can have a “plug and play” capability inasmuch as the entire assembly can be inserted as a single unit supporting multiple individual signal transmission lines. The chip package may be supported within the housing of the device either solely or by way of standoffs or other similar attachments to a low cost, low speed motherboard. Removing the signal transmission lines off of the motherboard frees up space on the motherboard which can accommodate additional functional components to provide added value and function to the device, while maintaining a cost that is lower than a comparable device that utilizes the motherboard for signal transmission lines. Furthermore, incorporating the signal transmission lines into the bypass cables reduces the amount of power needed to transmit high speed signals through the cables, thereby increasing the “green” value of the bypass assembly and reducing the operating cost of devices that use such bypass assemblies.

In one embodiment, the signal pairs of the bypass cables are terminated to wire-to-board connectors in a manner that permits the contact portions of the connector terminals to directly engage contact pads on circuit boards. These contact portions preferably include curved contact surfaces with arcuate surfaces that are oriented in opposition to contact pads on circuit boards. The contact surfaces extend transversely, or at angles, to the longitudinal axes of their respective connectors. The contact portions preferably have J-shaped configurations when viewed from a side, and free ends of the contact portions extend in opposite directions so that when the connectors are inserted into receptacles, or housings, mounted on circuit boards, the contact portions spread apart from in linear paths on the contact pads to provide a wiping action to facilitate removing surface film, dust and the like and to provide a reliable connection.

In another embodiment, the board connectors may be provided with a compliant member that engages the contact portions of the signal terminals. The receptacles used with these style connectors are mounted to the chip package substrate and have openings that accommodate individual connectors. The receptacles include pressure members such as corresponding press arms that engage corresponding opposing surfaces of the connectors and apply a pressure to the connectors in line with the chip package substrate contacts. The compliant member exerts an additional force to fully develop a desired spring force on the connector terminal contact portions that will result in reliable engagement with the chip package contacts. The openings of the receptacle may include a conductive coating on selected surfaces thereof to engage the ground shields of the wire to board connectors. In this manner, the cable twin-ax wires reliably connect to the chip package contacts.

Furthermore, the wire-to-board connectors of the wire pairs are structured as single connector units, or “chiclets,” so that each distinct transmission line of a bypass cable assembly may be individually connected to a desired termination point on either the chip package substrate or the circuit board of a device. The receptacles may be provided with openings arranged in preselected patterns, with each opening accommodating a single connector therein. The receptacle openings may further be provided with inner ledges, or shoulders, that define stop surfaces of the receptacle and which engage corresponding opposing surfaces on the connector. These two engaging stop surfaces serve to maintain a contact pressure on the connector to maintain it in contact with the circuit board. During insertion of one of the connectors described above into a receptacle opening, the contact portions of the signal and ground terminals are spread outwardly along a common mating surface of the circuit board and contact pads disposed thereon. This linear movement occurs in a direction transverse to the longitudinal insertion direction of the connector. In this manner, the bypass cables reliably connect circuits on the chip package to external connector interfaces and/or termination points of the motherboard.

Accordingly, there is provided an improved high speed bypass cable assembly that defines a signal transmission line useful for high speed data applications at 10 Gbps or above and with low loss characteristics.

These and other objects, features and advantages of the Present Disclosure will be clearly understood through a consideration of the following detailed description.

BRIEF DESCRIPTION OF THE FIGURES

The organization and manner of the structure and operation of the Present Disclosure, together with further objects and advantages thereof, may be understood by reference to the following Detailed Description, taken in connection with the accompanying Figures, wherein like reference numerals identify like elements, and in which:

FIG. 1 is a perspective view of an electronic device, such as a switch, router or the like with its top cover removed, and illustrating the general layout of the device components and a bypass cable assembly in place therein;

FIG. 2 is the same view as FIG. 1, with the bypass assembly removed from within the device for clarity;

FIG. 3 is a perspective view of the bypass assembly of FIG. 1;

FIG. 4A is a schematic cross-sectional view of a known structure traditionally used to connect a chip package to a motherboard in an electronic device such as a router, switch or the like, by way of traces routed through or on the motherboard;

FIG. 4B is a schematic cross-sectional view, similar to FIG. 1A, but illustrating the structure of bypass assemblies of the Present Disclosure and such as that illustrated in FIG. 1, which are used to connect a chip package to connectors or other components of the device if FIG. 1, utilizing cables and consequently eliminating the use of conductive traces as signal transmission lines on the motherboard as illustrated in the device of FIG. 1;

FIG. 5 is an enlarged detail view of the termination area surrounding one of the chips used in the bypass assembly of FIG. 1;

FIG. 6 is a perspective view of one embodiment of a board connector of the present disclosure, mounted to a circuit board, with the proximal ends of the bypass cables and their associated connector housings inserted therein;

FIG. 6A is an exploded view of the connector structure of FIG. 6;

FIG. 6B is the same view as FIG. 6, but with two of the connectors partially moved of place from their corresponding receptacles;

FIG. 6C is a diagram illustrating an embodiment of a signal and ground terminal mating arrangement obtained using the chiclet-style connector assemblies of FIG. 6;

FIG. 6D is another diagram illustrating another embodiment of a signal and ground terminal mating arrangement obtained using the chiclet-style connector assemblies of FIG. 6

FIG. 7 is a side elevational view of one embodiment of a board connector of the Present Disclosure when it is fully inserted into a connector receptacle and into contact with opposing contacts of a substrate;

FIG. 7A is an elevational view of the board connector of FIG. 7 partially inserted into a receptacle of a connector housing so that the contact portions of the signal and ground terminals thereof are in initial contact with contacts of a substrate;

FIG. 8 is a perspective view of the board connector of FIG. 7;

FIG. 8A is a perspective view of the signal terminals of the connector of FIG. 8 terminated to free ends of a bypass cable signal wire pair;

FIG. 8B is the same view as FIG. 8A, but with a spacing block formed about portions of the connector terminals;

FIG. 8C is the same view as FIG. 8B, but with a connector ground shield in place over the spacing block;

FIG. 8D a perspective view of the connector of FIG. 8, with one of the connector housing halves exploded for clarity;

FIG. 8E is a bottom plan view of the mating face of the connector of FIG. 8;

FIG. 8F is an enlarged, side elevational view of the mating end of the connector of FIG. 7 with the connector housing removed for clarity;

FIG. 9 is a perspective view of another embodiment of a cable bypass board connector that incorporates a compliant member as part of its contact portions;

FIG. 9A is a perspective view of the connector of FIG. 9, taken slightly from the bottom and with the signal conductors within the connector body shown in phantom for clarity;

FIG. 9B is a side elevational view of the connector of FIG. 9 taken along lines B-B thereof;

FIG. 9C is a bottom plan view of the connector of FIG. 9A taken along lines C-C thereof;

FIG. 9D is a lengthwise sectional view of the connector of FIG. 9, taken along lines D-D thereof;

FIG. 10 is a perspective view of a vertical receptacle connector mounted to a circuit board and with connectors of FIG. 9 inserted therein;

FIG. 11 is a perspective view of a the wire-to-board connector of FIG. 9 utilized in a horizontal orientation for contacting a chip package substrate;

FIG. 11A is sectional view of one of the connectors of FIG. 11, taken along lines A-A thereof;

FIG. 11B is the same view as FIG. 11, but with a horizontal receptacle connector in place upon a chip package substrate and with connector chiclets in place;

FIG. 11C is the same view as FIG. 11B, but with the connector chiclets removed for clarity;

FIG. 11D is a sectional view of the receptacle connector of FIG. 11C, taken along lines D-D thereof; and,

FIG. 11E is a sectional view of the receptacle connector assembly of FIG. 11B, taken along lines E-E thereof.

DETAILED DESCRIPTION

While the Present Disclosure may be susceptible to embodiment in different forms, there is shown in the Figures, and will be described herein in detail, specific embodiments, with the understanding that the Present Disclosure is to be considered an exemplification of the principles of the Present Disclosure, and is not intended to limit the Present Disclosure to that as illustrated.

As such, references to a feature or aspect are intended to describe a feature or aspect of an example of the Present Disclosure, not to imply that every embodiment thereof must have the described feature or aspect. Furthermore, it should be noted that the description illustrates a number of features. While certain features have been combined together to illustrate potential system designs, those features may also be used in other combinations not expressly disclosed. Thus, the depicted combinations are not intended to be limiting, unless otherwise noted.

In the embodiments illustrated in the Figures, representations of directions such as up, down, left, right, front and rear, used for explaining the structure and movement of the various elements of the Present Disclosure, are not absolute, but relative. These representations are appropriate when the elements are in the position shown in the Figures. If the description of the position of the elements changes, however, these representations are to be changed accordingly.

FIG. 1 is a perspective view of an electronic device 50 such as a switch, router, server or the like. The device 50 is governed by one or more processors, or integrated circuits, in the form of chips 52 that may be part of an overall chip package 54. The device 50 has a pair of side walls 55 and front and back walls, 56, 57. Connector ports 60 are provided in the front wall 56 so that opposing mating connectors in the form of cable connectors may be inserted to connect circuits of the device 50 to other devices. Backplane connector ports 61 may be provided in the back wall 57 to accommodate backplane connectors 93 for connecting the device 50 to a larger device, such as a server or the like, including backplanes utilized in such devices. The device 50 includes a power supply 58 and cooling assembly 59 as well as a motherboard 62 with various electronic components thereupon such as capacitors, switches, smaller chips, etc.

FIG. 4A is a cross-sectional view of a prior art conventional chip package and motherboard assembly that is used in conventional devices. The chip 52 may be an ASIC or any another type of processor or integrated circuit, such as a FPGA and may be one or more separate integrated circuits positioned together. Accordingly, the term chip will be used herein as a generic term for any suitable integrated circuit. As shown in FIG. 4A, the chip 52 has contacts on its underside in the form of solder bumps 45 that connect it to associated contact pads 46 of a supporting substrate 47 of a chip package. The substrate 47 typically includes plated through-holes, micro vias or traces 48 that extend through the body of the substrate 47 to its underside. These elements 48 connect with contacts 49 disposed on the underside 47a of the substrate 47 and these contacts 49 typically may take the form of a BGA, PGA or LGA and the like. The chip 52, solder bumps 45, substrate 47 and contacts 49 all cooperatively define a chip package 52-1. The chip package 52-1 can be mated by way of a socket (not shown) to a motherboard 52-2 made of a suitable material, such as FR4, and used in a device. The motherboard 52-2 typically has a plurality of lengthy conductive traces 52-3 that extend from the chip package contacts 49 through the motherboard 52-2 to other connectors, components or the like of the device. For example, a pair of conductive traces 52a, 52b are required to define differential signal transmission line and a third conductive trace 52c provides an associated ground that follows the path of the signal transmission line. Each such signal transmission line is routed through or on the motherboard 52-2 and such routing has certain disadvantages.

FR4 circuit board material becomes increasing lossy and at frequencies above 10 Ghz this starts to become problematic. Additionally, turns, bends and crossovers of these signal transmission line traces 52a-c are usually required to route the transmission line from the chip package contacts 49 to connectors or other components mounted on the motherboard 52-2. These directional changes in the traces 52a-c can create signal reflection and noise problems as well as additional losses. Losses can sometimes be corrected by the use of amplifiers, repeaters and equalizers but these elements also increase the cost of manufacturing the final circuit board 52-2. This complicates the layout of the circuit board 52-2 because additional board space will be needed to accommodate such amplifiers and repeaters and this additional board space may not be available in the intended size of the device. Custom materials for circuit boards are available that reduce such losses, but the prices of these materials severely increase the cost of the circuit board and, consequently, the electronic devices in which they are used. Still further, lengthy circuit traces require increased power to drive high speed signals through them and, as such, they hamper efforts by designers to develop “green” (energy-saving) devices.

In order to overcome these disadvantages, we have developed bypass cable assemblies that take the signal transmission lines off of the circuit board to eliminate the need to use expensive, custom board materials for circuit boards, as well as largely eliminated the problem of losses in FR4 material. FIG. 4B is a cross sectional view of the chip package 54 and mother board 62 of the device 50 of FIG. 1 which utilizes a bypass cable assembly in accordance with the principles of the present disclosure. The chip 52 may contain high speed, low speed, clock, logic, power and other circuits which are also connected to the substrate 53 of the package 54. Traces 54-1 are formed on or within the substrate 53 and lead to associated contacts 54-2 that may include contact pads or the like, and which are arranged in designated termination areas 54-3 on the chip package substrate 53.

Preferably, these termination areas 54-3 are disposed proximate to, or at edges 54-4 of the chip package 54, as shown in FIG. 4B. The chip package 54 may further include an encapsulant 54-5 that fixes the chip 52 in place within the package 54 as a unitary assembly and which provides a singular, exterior form to the chip package 54 that can be inserted into a device as a single element. In some instances, heat transfer devices, such as heat sinks 70 with upstanding fins 71 may be attached to a surface of the chip as is known in the art in order to dissipate heat generated during operation of the chip 52. These heat transfer devices 70 are mounted to the chips 52 so that the heat-dissipating fins 71 thereof project from the encapsulant 54-5 into the interior air space of the device 50.

Bypass cables 80 are utilized to connect circuits of the chip package 54 at the cable proximal ends to external connector interfaces and circuits on a circuit board at the cable distal ends. The bypass cables 80 are shown terminated at their proximal ends 87 to the package contact pads 54-2. As shown in FIGS. 3 & 5, the cables proximal ends 87 are generally terminated to plug-style board connectors 87a. The cables 80 are preferably of the twin-ax construction with two, interior signal conductors 81 which are depicted as being surrounded by a dielectric covering 82. A drain wire 83 is provided for each cable pair of signal conductors 81 and is disposed within an outer conductive covering 84 and an exterior insulative outer jacket 85. The pairs of signal conductors 81 (and the associated drain wire 83) collectively define respective individual signal transmission lines that lead from circuits on the chip package 54 (and the chip 52 itself) to connectors 90, 93 & 100, or directly to termination points on the motherboard 62 or chip package 54. As noted above, the ordered geometry of the cables bypass 80 will maintain the signal conductors 81 as differential signal transmission pairs in a preselected spacing that controls the impedance for the length of the cable 80. Utilizing the bypass cables 80 as signal transmission lines eliminates the need to lay down high speed signal transmission lines in the form of traces on the motherboard, thereby avoiding high costs of exotic board materials and the losses associated with cheaper board materials such as FR4. The use of flexible bypass cables also reduces the likelihood of signal reflection and helps avoid the need for excessive power consumption and/or for additional board space.

As noted, the bypass cables 80 have opposing proximal ends 87 and distal ends 88 that are respectively connected to the chip package 54 and to distal connectors. The distal connectors may include I/O connectors 90 as illustrated in FIG. 3 at the front of the device and which are housed in the various connector ports 60 of the device 50, or they may include backplane connectors 93 at the rear of the device in ports 61 (FIG. 1) for connecting the host device 50 to another device, or board connectors 100 connected to the motherboard 62 or another circuit board. Connectors 100 are board connectors of the wire-to-board style that connect connector terminal contact portions to contacts on a circuit board or other substrate. It is the latter application, namely as connectors to a chip package, that will be used to explain the structure and some of the advantages of the bypass cable connectors depicted.

The bypass cables 80 define a plurality of individual, high speed signal transmission lines that bypass traces on the motherboard 62 and the aforementioned related disadvantages. The bypass cables 80 are able to maintain the ordered geometry of the signal conductors 81 throughout the length of the cables 80 from the contacts, or termination points 54-2, 54-3, on the chip package 54 to the distal connectors 90, 93 and because this geometry remains relatively ordered, the bypass cables 80 may easily be turned, bent or crossed in their paths without introducing problematic signal reflection or impedance discontinuities into the signal transmission lines. The cables 80 are shown as arranged in first and second sets of cables wherein a first set of bypass cables extends between the chip package 54 and the I/O connectors 90 in the ports 60 in the front wall 56 of the device 50. A second set of bypass cables is shown in FIG. 3 as extending between the chip package 54 and backplane connectors 93 at the rear of the device 50. A third set of bypass cables is also illustrated as extending between the chip package and board connectors 100 which connect them to circuitry on the motherboard 62, also at the rear of the device 50. Naturally, numerous other configurations are possible.

The board connectors 100 of the present disclosure mate with receptacle connectors 98, as illustrated in FIGS. 6 & 6A, which may have bases 99 that are mounted to the motherboard 62 or to the chip package substrate 53. For the most part, such connectors will be mounted to the chip package substrate 53. The receptacle connectors include openings 99a formed therein which open to a common mating surface 64 of the chip package substrate 53 that is mounted on a motherboard 62, and each opening 99a is shown to receive a single wire to board connector 100 therein. The receptacle connectors 98 may be attached to the substrate and/or motherboard by way of screws, posts or other fasteners.

FIGS. 7-8E illustrate one embodiment of a wire to board connector 100 having a pair of spaced-apart signal terminals 102, to which the signal conductors 81 of a bypass cable 80 are terminated to tail portions 103. It should be noted that the depicted configuration, while have certain benefits, is not intended to be limiting, Thus, certain embodiments may include a signal, signal, ground triplet configuration rather than the double ground terminals associated with signal pair. Thus, the pattern shown in FIGS. 6C and 6D could (either an alternating or repeating GG/SS pattern) be modified to show a GSSG pattern or some other desirable pattern such as GSS/G pattern with the bottom G terminal between the signal pair. In other words, it is expected that the particular pattern used will depend on the data rate and the space constraints.

As depicted, the signal terminals 102 have contact portions 104 that extend outwardly from a mating end 106 of the connector 100. The signal terminal tail portions 103 and contact portions 104 are interconnected together by intervening signal terminal body portions 105. The signal terminal contact portions 104 can be seen to have generally J-shaped configurations when viewed from the side, as in FIGS. 7-7A & 8. The contact portions 104 include arcuate contact surfaces 107 which are oriented crosswise, or transversely to the longitudinal axes LA of the associated connectors 100 as well as the longitudinal axes of the signal terminals 102. The contact portions 104 have a width W2 that is greater than the width W1 of the terminal body portions 105 (FIG. 8) and preferably this width W2 approximates or is equal to a corresponding width W3 of the chip package or motherboard 54-2, 65. This width difference increases the contact against the contact pads and adds strength to the terminal contact portions.

The contact surfaces 107 have general U-shaped or C-shaped configurations, and they ride upon the chip package substrate contacts 54-2 when the connectors 100 are inserted into their corresponding receptacles 98 and into contact with the mating surface 64 of the chip package substrate 53 by at least a point contact along the width of the contacts 54-2. Although arcuate contact surfaces are shown in the illustrated embodiments, other configurations may work provided that a suitable connection is maintained against the contacts 54-2. In an embodiment other configurations will includes at least a linear point contact with the contacts 54-2. The depicted arcuate surfaces include this type of contact and thereby provide a reliable wiping action. The curved contact surfaces of the connector terminals are also partially compliant and therefore absorb stack-up tolerances that may occur between the receptacle connectors 98 and the chip package substrate 53 to which they are mounted.

The connector 100, as shown in FIG. 8B, is assembled by supporting the signal terminals 102 in a desired spacing with a support block 109 formed from a dielectric material such as LCP which is applied to the terminal body portions 105 as illustrated in FIG. 8B to support the signal terminals 102 during and after assembly. A ground shield 110 (FIG. 8C) is provided that preferably extends, as shown in FIG. 8C, entirely around the support block 109 so that it is maintained at a preselected distance from the signal terminal body portions 105. The ground shield 110 further includes a longitudinal termination tab 111 that extends rearwardly as shown in FIG. 8C and provides a location to which the bypass cable drain wire 83 and conductive wrap 84 may be terminated. As illustrated, the drain 83 wire may be bent upon itself to extend rearwardly of the cable 80 and extend through hole 111a of the ground shield termination tab 111. The spacing between the ground shield 110 and its associated termination tab 111 and the signal conductors 81 of the cable 80 and the connector signal terminals 102 may be selected so as to match, or increase or decrease the impedance of the signal transmission line from the signal conductor terminations to the signal terminal contact portions.

The ground shield 110 is also shown as having a pair of spaced-apart ground terminals 112 extending longitudinally therefrom along one side edge 110a of the ground shield 110. These ground terminals 112 project past the mating end 106 of the connector 100 and include body portions 112a, and J-shaped contact portions 113 with arcuate contact surfaces 114 that extend transversely to the connector axis LA as well as longitudinal axes of the ground terminals 110. As illustrated in FIG. 8E, the signal terminal body and contact portions are aligned together in a pair, as are the ground terminal body contact portions. The signal terminal body and contact portions are further aligned, as a pair, with their corresponding pair of ground terminal body and contact portions. The depicted pair of signal terminals 102 are edge coupled to each other and broadside coupled to the ground shield 110 and ground shield terminals 112 throughout the length of the connector. FIG. 8E further illustrates the arrangement of the signal and ground terminal contact portions. The two signal terminal contact portions 104 are aligned as a pair in a first row 190 and then ground terminal contact portions are aligned as a pair in a second row 191. Single signal and ground terminal contact portions are further aligned together in third and fourth rows, respectively 192 and 193 and these rows can be seen to intersect (or extend transverse to) the first and second rows 190 and 191.

An insulative connector housing 116 having two interengaging halves 116a, 116b is shown in FIG. 8D as encasing at least the distal end of the bypass cable 80 and portions of the signal terminals 102, especially the termination areas of the cable signal conductors to the signal terminals. The assembled connector housing 116 is shown as generally having four sides and may be provided with one or more openings 118 into which a material such as a potting compound or an LCP may be injected to hold the cable 80 and housing halves 116a, 116b together as a single unit.

As noted earlier, the signal and ground terminal contact portions 104, 113 have general J-shaped configurations. Preferably, this J-shape is in the nature of a compound curve that combines two different radius curves, as is known in the art (FIG. 8F) that meet at an inflection point 115. The inflection points 115 typically are located between the terminal body portions and the terminal contact portions, and predispose the terminal contact portions to flex, or move, in opposite directions along a common linear path as shown by the two arrows in FIG. 7. This structure promotes the desired outwardly, or sideways, movement of the signal and ground contact portions 104, 113 when downward pressure is applied to them. With this structure, as the connector 100 is inserted into the receptacle opening 99a and moved into contact with a common, opposing mating surface 64 of the chip package substrate 53, the contact portions will move linearly along the contacts 54-2. Thus, insertion of a connector 100 in the vertical direction (perpendicular to the chip package substrate) promotes movement of the contact portions 104, 113 in horizontal directions. This movement is along a common mating surface 64 of the chip package substrate 53, rather than along opposite mating surfaces as occur in edge card connectors. The contact between the signal and ground terminal contact surfaces 107, 114 and the contacts 65 can be described as a linear point contact that occurs primarily along the base of the J-shape through the width W2 thereof.

Such connectors 100 may be inserted into the openings 99a of the receptacle connectors 98 and held in place vertically in pressure engagement against the circuit board mating surface 64. In the embodiment illustrated in FIGS. 7-8F, the connector housing 116 may include a pair of engagement shoulders 122 with planar stop surfaces 123 perpendicular to the longitudinal axis of the connector 100. These stop surfaces 123 will abut and engage complimentary engagement surfaces 126 disposed on the interior of the receptacle openings 99a. The engagement shoulders may also include angled lead-in surfaces 124 to facilitate the insertion of the connectors 100 into the receptacles. As illustrated in FIGS. 6C & 6D, the connectors 100 may be inserted into receptacle openings to achieve particular patterns, such as the one shown in FIG. 6D where the signal terminals “S” and ground terminals “G” of each channel are arranged in a common row. Other patterns as possible and one such other pattern is illustrated in FIG. 6C wherein each pair of signal terminals “SS” is flanked on at least two sides by a pair of ground terminals “GG”.

FIGS. 9-9D illustrate one embodiment of a wire to board connector 200 in which the signal conductors 81 of each cable 80 extend through a corresponding connector body portion 202 of the connector 200. The signal conductors 81 have free ends 206 that extend out of their dielectric coverings 84 and which are configured to define signal terminals 210 with corresponding contact portions 212 that at least partially extend out of the connector body 202. As shown in this embodiment, which is utilized in vertical applications, a pair of signal terminals 210 with corresponding contact portions 212 extend slightly outwardly from a mating end 203 of the connector 200. The signal terminals 210 are in effect, a continuation of the signal conductors 81 of the cables 80 and extend lengthwise through the connector body 202. Hence, there is no need to use separate terminals with distinct tail portions. The signal terminal contact portions 212 can be seen to have generally C or U-shaped configurations when viewed from the side, as in FIGS. 9B & 9D. In this regard, the signal terminal contact portions 212 include arcuate contact surfaces 213 which are oriented crosswise, or transversely to a longitudinal axis LA of its connector 200.

The contact surfaces 213 have general U-shaped or C-shaped configurations, and they can ride upon the substrate contacts 54-2 when the connectors 200 are inserted into corresponding vertical openings 99a so as to contact the mating surface 64 of the substrate 53 in at least a point contact along the contacts 54-2. Although arcuate contact surfaces 213 of the connector terminals are shown in the illustrated embodiments, other configurations may work, provided that a least a linear point contact is maintained against the substrate contacts 54-2. In the illustrated embodiments, the free ends 206 of the signal conductors 81 are folded or bent back upon themselves as illustrated, as at 209, and in doing so, extend around a compliant member 215 with a cylindrical body portion 216 that is disposed widthwise within the connector body 202. The compliant member 215 is preferably formed from a elastomeric material with a durometer value chosen to accommodate the desired spring force for the contact portions 212. The compliant member 215 is shown as having a cylindrical configuration, but it will be understood that other configurations, such as square, rectangular, elliptical or the like may be used. The signal conductor free ends are bent such that they define an opening, or loop, 208 through which the complaint member 215 extends in the connector body 202 and the free ends 206 extend around at least more than half of the circumference of the compliant member body portion 216 in order to retain the compliant member 215 in place. Although the free ends 206 are shown folded back upon themselves, they could terminate earlier to define a J-shaped hook that engages the compliant member body portion 216 in a manner that prevents the compliant member 215 from working free from its engagement with the contact portions 212.

In the connector 200 of FIGS. 9-11, the pair of signal conductors 81 are arranged in a parallel spacing and formed about the compliant member 215. This assembly is inserted into a ground shield 220 shown in the Figures as having three walls 221, 222 and the drain wire 83 of the cable 80 is attached the ground shield 220 at one of the walls 222 in a known manner. The space 224 within the ground shield walls 221, 222 is filled with a dielectric material, such as LCP, to fix the signal terminals 210 and in place within the connector body 202 and to give the connector body 202 more definition. The signal terminal/conductors are arranged within the ground shield 220 as shown in FIG. 11B, with the ends 218 of the compliant member proximate to or engaging the side walls 221 of the ground shield 220 so that parts of the contact portions 212 extend past the mating face of the connector body. As seen in FIGS. 9A, 9B and 10A, a portion of the compliant member 215 extends past the mating face 203 of the connector 200, 200′. The ground shield 220 may include one or more ground terminals 228 with curved contact portions 229 that extend from an edge 226 of the ground shield 220, and the drain wire 83 of the signal pair of the cable 80 extends through an opening 236 in the ground shield wall 222 and bent back upon the wall 222 for attachment thereto in a known manner. The ground terminals 228 are aligned with each other in a first direction, and are further aligned with the two signal terminals 210 in second direction, transverse to the first direction.

Such connectors 200 may be inserted into the openings 99a of the receptacle connectors 98 and held in place vertically in pressure engagement against the circuit board mating surface. This pressure may be applied by way of a press arm or angled walls of the receptacle openings 99a. Receptacle connectors 98 that receive connectors 200 in a vertical direction are shown in FIGS. 9 through 10, but FIGS. 11-11E illustrate a second embodiment of a wire to board connector 200′ and a corresponding receptacle connector 240 constructed in accordance with the principles of the Present Disclosure. In this embodiment, the connectors 201′ are structured for engagement with the substrate contacts in a horizontal orientation. In this regard, the overall structure of the connector 200 is much the same as that of the previously described embodiment. One difference is that the compliant member 215 is disposed proximate to a corner of the mating face 203 of the connector 200′ as illustrated in FIG. 11A, so that more than half of the arc length AL of the signal terminal contact surfaces 213 are exposed outside of the connector body mating face 203.

In order to accommodate these type wire to board connectors 200′, a horizontal receptacle connector 240 such as illustrated in FIG. 11B can be utilized. The depicted receptacle connector 240 has a base 242 for mounting to the mating surface 64 of a substrate 53. The base 242 has receptacle openings 243 as shown that are spaced apart along the width of the connector 240 and each opening 243 is configured to receive a single connector unit 200′ therein. The openings 143 open directly to the substrate 53 so that its contacts are exposed within the openings 243 are proximate to the corners thereof so as to engage the signal terminal contact portions 212 of an inserted connector 200′. In this regard, the substrate mating surface 64 may be considered as defining a wall of the receptacle opening 243.

In order to apply a downward contact pressure on the signal terminal contact portions 212, a cantilevered press arm, or latch 246, is shown formed as part of the connector 240. It extends forwardly within the opening 243 from a rear wall 244 thereof and terminates in a free end 247 that is manipulatable. It further preferably has a configuration that is complementary to that of one of the ground shield walls 222, as shown in FIG. 11E. The ground shield wall 22 of the connector 200′ is offset to define a ridge 234 that engages an opposing shoulder 248 formed on the press arm 246. In this manner, the connector 200′ is urged forwardly (FIG. 11E) so that the ground contacts 229 contact the end wall 244 of the receptacle opening 243 as well as urged downwardly so that its signal contact portions 212 contact the circuit board contact pads 64. At least the end wall 244 of the receptacle connector opening 243 is conductive, such as by way of a conductive coating and it is connected to ground circuits on the circuit board 62 in a known manner. The press arm 246 is also preferably conductive so that contact is made between the connector ground shield along at least two points in two different directions.

The receptacle connector 240 may further include in its openings 243, side rails 249 that extend lengthwise within the opening 243 along the mating surface of the circuit board 62. These rails 249 engage and support edges of the connector body 202 above the circuit board a desired distance that produces a reliable spring force against the contact portions 212 of the signal terminals 210 by the compliant member 215. It will be noted that the signal terminal contact portions 212 of the connector 200′ make contact with their corresponding contact pads 64 in a horizontal direction, while the ground terminal contact portions 229 of the ground terminals 228 make contact ground circuits on the circuit board 62 in a vertical direction by virtue of their contact with the vertical conductive surface 230 of the connector 240.

The Present Disclosure provides connectors that will preserve an ordered geometry through the termination to the circuit board that is present in the cable wires without the introduction of excessive noise and/or crosstalk and which will provide a wiping action on the contact pads to which they connect. The use of such bypass cable assemblies, permits the high speed data transmission in association with circuit boards made with inexpensive materials, such as FR4, thereby lowering the cost and manufacturing complexity of certain electronic devices. The direct manner of connection between the cable conductors and the circuit board eliminates the use of separate terminals which consequently reduces the likelihood of discontinuities, leading to better signal performance. This elimination of separate contacts also leads to an overall reduction in the system cost. Additionally, the compressibility of the compliant member 215 will ensure contact between at least the signal terminals and the circuit board contacts irrespective of areas of the circuit board which may be out of planar tolerance. It also permits the signal contact portions 212 to move slightly against the compliant member 215 to achieve a reliable spring force against the substrate contacts.

While preferred embodiments of the Present Disclosure have been shown and described, it is envisioned that those skilled in the art may devise various modifications without departing from the spirit and scope of the foregoing Description and the appended Claims.

Number	Date	Country
62102045	Jan 2015	US
62102046	Jan 2015	US
62102047	Jan 2015	US
62102048	Jan 2015	US
62156602	May 2015	US
62156708	May 2015	US
62167036	May 2015	US
62182161	Jun 2015	US

	Number	Date	Country
Parent	15541208	Jun 2017	US
Child	16386294		US

WIRE TO BOARD CONNECTORS SUITABLE FOR USE IN BYPASS ROUTING ASSEMBLIES

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CPC

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Description

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REFERENCE TO RELATED APPLICATIONS

Provisional Applications (8)

Continuations (1)