The Present Disclosure relates generally to high speed data transmission systems suitable for use in transmitting high speed signals at low losses from chips, or processors and the like to backplanes, mother boards and other circuit boards, and more particularly to a bypass cable assembly having connectors that provide reliable wiping action during connection to circuit boards contacts of an electronic component.
Electronic devices such as routers, servers, switches and the like need to operate at high data transmission speeds in order to serve the rising need for bandwidth and delivery of streaming audio and video in many end user devices. These devices use signal transmission lines that extend between a primary chip member mounted on a printed circuit board (mother board) of the device, such as an ASIC, FPGA, etc. and connectors mounted to the circuit board. These transmission lines are currently formed as conductive traces on or in the mother board and extend between the chip member(s) to external connectors or circuitry of the device.
Typical circuit boards are usually formed from an inexpensive material known as FR4, which is inexpensive. Although inexpensive, FR4 is known to be lossy in high speed signal transmission lines which transfer data at rates of about 6 Gbps and greater. These losses increase as the speed increases and therefore make FR4 material undesirable for the high speed data transfer applications of about 10 Gbps and greater. This drop off begins at 6 Gbps and increases as the data rate increases. In order to use FR4 as a circuit board material for signal transmission lines, a designer may have to utilize amplifiers and equalizers, which increase the final cost of the device.
The overall length of the signal transmission lines in FR4 circuit boards can exceed threshold lengths, about 10 inches, and may include bends and turns that can create signal reflection and noise problems as well as additional losses. Losses can sometimes be corrected by the use of amplifiers, repeaters and equalizers but these elements also increase the cost of manufacturing the final circuit board. This complicates the layout of the circuit board as additional board space is needed to accommodate these amplifiers and repeaters. In addition, the routing of signal transmission lines in the FR-4 material may require multiple turns. These turns and the transitions which occur at termination points along the signal transmission lines may negatively affect the integrity of the signals transmitted thereby. It then becomes difficult to route transmission line traces in a manner to achieve a consistent impedance and a low signal loss therethrough. Custom materials, such as MEGTRON, are available for circuit board construction which reduces such losses, but the prices of these materials severely increases the cost of the circuit board and, consequently, the electronic devices in which they are used.
Chips are the heart of these routers, switches and other devices. These chips typically include a processor such as an ASIC (application specific integrated circuit) chip and this ASIC chip has a die that is connected to a substrate (its package) by way of conductive solder bumps. The package may include micro-vias or plated through holes which extend through the substrate to solder balls. These solder balls comprise a ball grid array by which the package is attached to the motherboard. The motherboard includes numerous traces formed in it that define transmission lines which include differential signal pairs for the transmission of high speed data signals, ground paths associated with the differential signal pairs, and a variety of low speed transmission lines for power, clock signals and other functions. These traces can include traces routed from the ASIC to the I/O connectors of the device into which external connectors are connected, as well as others that are routed from the ASIC to backplane connectors that permit the device to be connected to an overall system such as a network server or the like or still others that are routed from the ASIC to components and circuitry on the motherboard or another circuit board of the device in which the ASIC is used.
FR4 circuit board materials can handle data transmission speeds of 10 Gbits/sec, but this handling comes with disadvantages. In order to traverse long trace lengths, the power required to transmit these signals also increases. Therefore, designers find it difficult to provide “green” designs for such devices, as low power chips cannot effectively drive signals for such and longer lengths. The higher power needed to drive the signals consumes more electricity and it also generates more heat that must be dissipated. Accordingly, these disadvantages further complicate the use of FR4 as a motherboard material used in electronic devices. Using more expensive, and exotic motherboard materials, such as MEGTRON, to handle the high speed signals at more acceptable losses increases the overall cost of electronic devices. Notwithstanding the low losses experienced with these expensive materials, they still require increased power to transmit their signals and incurred, and the turns and crossovers required in the design of lengthy board traces create areas of signal reflection and potential increased noise.
It therefore becomes difficult to adequately design signal transmission lines in circuit boards and backplanes to meet the crosstalk and loss requirements needed for high speed applications. Although it is desirable to use economical board materials such as FR4, the performance of FR4 falls off dramatically as the data transmission rate approaches 10 Gbps, driving designers to use more expensive board materials and increasing the overall cost of the device in which the circuit board is used. Accordingly, the Present Disclosure is therefore directed to bypass cable assemblies with suitable point-to-point electrical interconnects that cooperatively define high speed transmission lines for transmitting data signals, at 10 Gbps and greater, and which assemblies have low loss characteristics.
Accordingly, there are provided herein, improved high speed bypass assemblies which utilize cables, rather than circuit boards, to define signal transmission lines which are useful for high speed data applications at 10 Gbps and above and with low loss characteristics.
In accordance with the Present Disclosure, a bypass cable assembly is used to route high speed data transmission lines between a chip or chip package and backplanes or circuit boards. The bypass cable assemblies include cables which contain signal transmission lines that avoid the disadvantages of circuit board construction, no matter the material of construction, and which provide independent signal paths with a consistent geometry and structure that resists signal loss and maintains impedances at acceptable levels.
In applications of the Present Disclosure, integrated circuits having the form of a chip, such as an ASIC or FPGA, is provided as part of an overall chip package. The chip is mounted to a package substrate by way of conventional solder bumps or the like and may be enclosed within and integrated to the substrate by way of an encapsulating material that overlies the chip and a portion of the substrate. The package substrate has leads extending from the solder bumps to termination areas on the substrate. Cables are used to connect the chip to external interfaces of the device, such as I/O connectors, backplane connectors and circuit board circuitry. These cables are provided with board connectors at their near ends which are connected to the chip package substrate.
The chip package may include a plurality of contacts which are typically disposed on the underside of the package for providing connections from logic, clock, power and low-speed components as well as high speed signal circuits to traces on the motherboard of a device. These contacts may be located on either the top or bottom surfaces of the chip package substrate where they can be easily connected to cables in a manner that maintains the geometry of the cable signal transmission lines. The cables provide signal transmission lines that bypass the traces on the motherboard. Such a structure not only alleviates the loss and noise problems referred to above, but also frees up considerable space (i.e., real estate) on the motherboard, while permitting low cost circuit board materials, such as FR4, to be used for its construction.
Cables utilized for such assemblies are designed for differential signal transmission and preferably are twin-ax style cables that utilize pairs of signal conductor wires encased within dielectric coverings to form a signal wire pair. The wire pairs may include associated drain wires and all three wires may further be enclosed within an outer shield in the form of a conductive wrap, braided shield or the like. The two signal conductors may be encased in a single dielectric covering. The spacing and orientation of the wires that make up each such wire pair can be easily controlled in a manner so that the cable provides a transmission line separate and apart from the circuit board, and which may extend between a chip, chip set, component and a connector location on the circuit board or between two locations on the circuit board. The ordered geometry of the cables as signal transmission lines components is very easy to maintain and with acceptable losses and noise as compared to the difficulties encountered with circuit board signal transmission lines, no matter what the material of construction.
The near (proximal) ends of the wire pairs are terminated to the chip package and the far (distal) ends of the cables are connected to external connector interfaces in the form of connector ports. The near end connection is preferably accomplished utilizing wire-to-board connectors configured to engage circuit boards and their contacts. In these wire-to-board connectors, free ends of the signal wire pairs are terminated directly to termination tails of the connector terminals in a spacing that emulates the ordered geometry of the cable so that crosstalk and other negative factors are kept to a minimum at the connector location. Each connector includes a support that holds the two signal terminals in a desired spacing and further includes associated a ground shield that preferably at least partially encompasses the signal terminals of the connector. The ground shield has ground terminal formed with it.
In this manner, the ground associated with each wire pair may be terminated to the connector ground shield to form a ground path that provides shielding as well as reduction of cross talk by defining a ground plane to which the signal terminals can broadside couple in common mode, while the signal terminals of the connectors edge couple together in differential mode. The termination of the wires of the bypass cable assembly is done in a manner such that to the extent possible, a specific desired geometry of the signal and ground conductors in the cable is maintained through the termination of the cable to the board connector.
The ground shield may include sidewalls that extend near the mating end of the connector to provide a multiple faceted ground plane. The drain wire, or ground, of each signal wire pair is terminated to the connector ground shield and in this manner, each pair of signal terminals is at least partially encompassed by a ground shield that has two ground terminals integrated therewith for mating with the circuit board.
In one embodiment of the present disclosure, a chip package is provided that includes an integrated circuit mounted to a substrate. The chip package substrate has termination areas to which first (or near) ends of twin-ax bypass cables are terminated. The lengths of the cables may vary, but are at least long enough for some of the bypass cables to be easily and reliably terminated to a first and second external connector interfaces which may include either a single or multiple I/O style and backplane style connectors or the like. The connectors are preferably mounted to faces of the device to permits external connectors, such as plug connectors to be mated therewith. The bypass cable assembly provides a means for the device to be utilized as a complete interior component of a larger device, such as a server or the like in a data center. At the near end, the bypass cables have board connectors that are configured to connect to contact pads on the chip package substrate.
These board connectors are of the wire-to-board style and are configured so that they may be inserted into a receptacle housing on the chip package substrate. Accordingly, the overall chip package-bypass cable assembly can have a “plug and play” capability inasmuch as the entire assembly can be inserted as a single unit supporting multiple individual signal transmission lines. The chip package may be supported within the housing of the device either solely or by way of standoffs or other similar attachments to a low cost, low speed motherboard. Removing the signal transmission lines off of the motherboard frees up space on the motherboard which can accommodate additional functional components to provide added value and function to the device, while maintaining a cost that is lower than a comparable device that utilizes the motherboard for signal transmission lines. Furthermore, incorporating the signal transmission lines into the bypass cables reduces the amount of power needed to transmit high speed signals through the cables, thereby increasing the “green” value of the bypass assembly and reducing the operating cost of devices that use such bypass assemblies.
In one embodiment, the signal pairs of the bypass cables are terminated to wire-to-board connectors in a manner that permits the contact portions of the connector terminals to directly engage contact pads on circuit boards. These contact portions preferably include curved contact surfaces with arcuate surfaces that are oriented in opposition to contact pads on circuit boards. The contact surfaces extend transversely, or at angles, to the longitudinal axes of their respective connectors. The contact portions preferably have J-shaped configurations when viewed from a side, and free ends of the contact portions extend in opposite directions so that when the connectors are inserted into receptacles, or housings, mounted on circuit boards, the contact portions spread apart from in linear paths on the contact pads to provide a wiping action to facilitate removing surface film, dust and the like and to provide a reliable connection.
In another embodiment, the board connectors may be provided with a compliant member that engages the contact portions of the signal terminals. The receptacles used with these style connectors are mounted to the chip package substrate and have openings that accommodate individual connectors. The receptacles include pressure members such as corresponding press arms that engage corresponding opposing surfaces of the connectors and apply a pressure to the connectors in line with the chip package substrate contacts. The compliant member exerts an additional force to fully develop a desired spring force on the connector terminal contact portions that will result in reliable engagement with the chip package contacts. The openings of the receptacle may include a conductive coating on selected surfaces thereof to engage the ground shields of the wire to board connectors. In this manner, the cable twin-ax wires reliably connect to the chip package contacts.
Furthermore, the wire-to-board connectors of the wire pairs are structured as single connector units, or “chiclets,” so that each distinct transmission line of a bypass cable assembly may be individually connected to a desired termination point on either the chip package substrate or the circuit board of a device. The receptacles may be provided with openings arranged in preselected patterns, with each opening accommodating a single connector therein. The receptacle openings may further be provided with inner ledges, or shoulders, that define stop surfaces of the receptacle and which engage corresponding opposing surfaces on the connector. These two engaging stop surfaces serve to maintain a contact pressure on the connector to maintain it in contact with the circuit board. During insertion of one of the connectors described above into a receptacle opening, the contact portions of the signal and ground terminals are spread outwardly along a common mating surface of the circuit board and contact pads disposed thereon. This linear movement occurs in a direction transverse to the longitudinal insertion direction of the connector. In this manner, the bypass cables reliably connect circuits on the chip package to external connector interfaces and/or termination points of the motherboard.
Accordingly, there is provided an improved high speed bypass cable assembly that defines a signal transmission line useful for high speed data applications at 10 Gbps or above and with low loss characteristics.
These and other objects, features and advantages of the Present Disclosure will be clearly understood through a consideration of the following detailed description.
The organization and manner of the structure and operation of the Present Disclosure, together with further objects and advantages thereof, may be understood by reference to the following Detailed Description, taken in connection with the accompanying Figures, wherein like reference numerals identify like elements, and in which:
While the Present Disclosure may be susceptible to embodiment in different forms, there is shown in the Figures, and will be described herein in detail, specific embodiments, with the understanding that the Present Disclosure is to be considered an exemplification of the principles of the Present Disclosure, and is not intended to limit the Present Disclosure to that as illustrated.
As such, references to a feature or aspect are intended to describe a feature or aspect of an example of the Present Disclosure, not to imply that every embodiment thereof must have the described feature or aspect. Furthermore, it should be noted that the description illustrates a number of features. While certain features have been combined together to illustrate potential system designs, those features may also be used in other combinations not expressly disclosed. Thus, the depicted combinations are not intended to be limiting, unless otherwise noted.
In the embodiments illustrated in the Figures, representations of directions such as up, down, left, right, front and rear, used for explaining the structure and movement of the various elements of the Present Disclosure, are not absolute, but relative. These representations are appropriate when the elements are in the position shown in the Figures. If the description of the position of the elements changes, however, these representations are to be changed accordingly.
FR4 circuit board material becomes increasing lossy and at frequencies above 10 Ghz this starts to become problematic. Additionally, turns, bends and crossovers of these signal transmission line traces 52a-c are usually required to route the transmission line from the chip package contacts 49 to connectors or other components mounted on the motherboard 52-2. These directional changes in the traces 52a-c can create signal reflection and noise problems as well as additional losses. Losses can sometimes be corrected by the use of amplifiers, repeaters and equalizers but these elements also increase the cost of manufacturing the final circuit board 52-2. This complicates the layout of the circuit board 52-2 because additional board space will be needed to accommodate such amplifiers and repeaters and this additional board space may not be available in the intended size of the device. Custom materials for circuit boards are available that reduce such losses, but the prices of these materials severely increase the cost of the circuit board and, consequently, the electronic devices in which they are used. Still further, lengthy circuit traces require increased power to drive high speed signals through them and, as such, they hamper efforts by designers to develop “green” (energy-saving) devices.
In order to overcome these disadvantages, we have developed bypass cable assemblies that take the signal transmission lines off of the circuit board to eliminate the need to use expensive, custom board materials for circuit boards, as well as largely eliminated the problem of losses in FR4 material.
Preferably, these termination areas 54-3 are disposed proximate to, or at edges 54-4 of the chip package 54, as shown in
Bypass cables 80 are utilized to connect circuits of the chip package 54 at the cable proximal ends to external connector interfaces and circuits on a circuit board at the cable distal ends. The bypass cables 80 are shown terminated at their proximal ends 87 to the package contact pads 54-2. As shown in
As noted, the bypass cables 80 have opposing proximal ends 87 and distal ends 88 that are respectively connected to the chip package 54 and to distal connectors. The distal connectors may include I/O connectors 90 as illustrated in
The bypass cables 80 define a plurality of individual, high speed signal transmission lines that bypass traces on the motherboard 62 and the aforementioned related disadvantages. The bypass cables 80 are able to maintain the ordered geometry of the signal conductors 81 throughout the length of the cables 80 from the contacts, or termination points 54-2, 54-3, on the chip package 54 to the distal connectors 90, 93 and because this geometry remains relatively ordered, the bypass cables 80 may easily be turned, bent or crossed in their paths without introducing problematic signal reflection or impedance discontinuities into the signal transmission lines. The cables 80 are shown as arranged in first and second sets of cables wherein a first set of bypass cables extends between the chip package 54 and the I/O connectors 90 in the ports 60 in the front wall 56 of the device 50. A second set of bypass cables is shown in
The board connectors 100 of the present disclosure mate with receptacle connectors 98, as illustrated in
As depicted, the signal terminals 102 have contact portions 104 that extend outwardly from a mating end 106 of the connector 100. The signal terminal tail portions 103 and contact portions 104 are interconnected together by intervening signal terminal body portions 105. The signal terminal contact portions 104 can be seen to have generally J-shaped configurations when viewed from the side, as in
The contact surfaces 107 have general U-shaped or C-shaped configurations, and they ride upon the chip package substrate contacts 54-2 when the connectors 100 are inserted into their corresponding receptacles 98 and into contact with the mating surface 64 of the chip package substrate 53 by at least a point contact along the width of the contacts 54-2. Although arcuate contact surfaces are shown in the illustrated embodiments, other configurations may work provided that a suitable connection is maintained against the contacts 54-2. In an embodiment other configurations will includes at least a linear point contact with the contacts 54-2. The depicted arcuate surfaces include this type of contact and thereby provide a reliable wiping action. The curved contact surfaces of the connector terminals are also partially compliant and therefore absorb stack-up tolerances that may occur between the receptacle connectors 98 and the chip package substrate 53 to which they are mounted.
The connector 100, as shown in
The ground shield 110 is also shown as having a pair of spaced-apart ground terminals 112 extending longitudinally therefrom along one side edge 110a of the ground shield 110. These ground terminals 112 project past the mating end 106 of the connector 100 and include body portions 112a, and J-shaped contact portions 113 with arcuate contact surfaces 114 that extend transversely to the connector axis LA as well as longitudinal axes of the ground terminals 110. As illustrated in
An insulative connector housing 116 having two interengaging halves 116a, 116b is shown in
As noted earlier, the signal and ground terminal contact portions 104, 113 have general J-shaped configurations. Preferably, this J-shape is in the nature of a compound curve that combines two different radius curves, as is known in the art (
Such connectors 100 may be inserted into the openings 99a of the receptacle connectors 98 and held in place vertically in pressure engagement against the circuit board mating surface 64. In the embodiment illustrated in
The contact surfaces 213 have general U-shaped or C-shaped configurations, and they can ride upon the substrate contacts 54-2 when the connectors 200 are inserted into corresponding vertical openings 99a so as to contact the mating surface 64 of the substrate 53 in at least a point contact along the contacts 54-2. Although arcuate contact surfaces 213 of the connector terminals are shown in the illustrated embodiments, other configurations may work, provided that a least a linear point contact is maintained against the substrate contacts 54-2. In the illustrated embodiments, the free ends 206 of the signal conductors 81 are folded or bent back upon themselves as illustrated, as at 209, and in doing so, extend around a compliant member 215 with a cylindrical body portion 216 that is disposed widthwise within the connector body 202. The compliant member 215 is preferably formed from a elastomeric material with a durometer value chosen to accommodate the desired spring force for the contact portions 212. The compliant member 215 is shown as having a cylindrical configuration, but it will be understood that other configurations, such as square, rectangular, elliptical or the like may be used. The signal conductor free ends are bent such that they define an opening, or loop, 208 through which the complaint member 215 extends in the connector body 202 and the free ends 206 extend around at least more than half of the circumference of the compliant member body portion 216 in order to retain the compliant member 215 in place. Although the free ends 206 are shown folded back upon themselves, they could terminate earlier to define a J-shaped hook that engages the compliant member body portion 216 in a manner that prevents the compliant member 215 from working free from its engagement with the contact portions 212.
In the connector 200 of
Such connectors 200 may be inserted into the openings 99a of the receptacle connectors 98 and held in place vertically in pressure engagement against the circuit board mating surface. This pressure may be applied by way of a press arm or angled walls of the receptacle openings 99a. Receptacle connectors 98 that receive connectors 200 in a vertical direction are shown in
In order to accommodate these type wire to board connectors 200′, a horizontal receptacle connector 240 such as illustrated in
In order to apply a downward contact pressure on the signal terminal contact portions 212, a cantilevered press arm, or latch 246, is shown formed as part of the connector 240. It extends forwardly within the opening 243 from a rear wall 244 thereof and terminates in a free end 247 that is manipulatable. It further preferably has a configuration that is complementary to that of one of the ground shield walls 222, as shown in
The receptacle connector 240 may further include in its openings 243, side rails 249 that extend lengthwise within the opening 243 along the mating surface of the circuit board 62. These rails 249 engage and support edges of the connector body 202 above the circuit board a desired distance that produces a reliable spring force against the contact portions 212 of the signal terminals 210 by the compliant member 215. It will be noted that the signal terminal contact portions 212 of the connector 200′ make contact with their corresponding contact pads 64 in a horizontal direction, while the ground terminal contact portions 229 of the ground terminals 228 make contact ground circuits on the circuit board 62 in a vertical direction by virtue of their contact with the vertical conductive surface 230 of the connector 240.
The Present Disclosure provides connectors that will preserve an ordered geometry through the termination to the circuit board that is present in the cable wires without the introduction of excessive noise and/or crosstalk and which will provide a wiping action on the contact pads to which they connect. The use of such bypass cable assemblies, permits the high speed data transmission in association with circuit boards made with inexpensive materials, such as FR4, thereby lowering the cost and manufacturing complexity of certain electronic devices. The direct manner of connection between the cable conductors and the circuit board eliminates the use of separate terminals which consequently reduces the likelihood of discontinuities, leading to better signal performance. This elimination of separate contacts also leads to an overall reduction in the system cost. Additionally, the compressibility of the compliant member 215 will ensure contact between at least the signal terminals and the circuit board contacts irrespective of areas of the circuit board which may be out of planar tolerance. It also permits the signal contact portions 212 to move slightly against the compliant member 215 to achieve a reliable spring force against the substrate contacts.
While preferred embodiments of the Present Disclosure have been shown and described, it is envisioned that those skilled in the art may devise various modifications without departing from the spirit and scope of the foregoing Description and the appended Claims.
This application is a continuation of U.S. application Ser. No. 15,541,208, filed Jun. 30, 2017, which claims priority to International Application No. PCT/US2016/012862, filed Jan. 11, 2016, which claims priority of prior U.S. provisional patent application No. 62/102,045, filed Jan. 11, 2015 entitled “The Molex Channel”; prior U.S. provisional patent application No. 62/102,046, filed Jan. 11, 2015 entitled “The Molex Channel”; prior U.S. provisional patent application No. 62/102,047, filed Jan. 11, 2015 entitled “The Molex Channel”; prior U.S. provisional patent application No. 62/102,048 filed Jan. 11, 2015 entitled “High Speed Data Transmission Channel Between Chip And External Interfaces Bypassing Circuit Boards”; prior U.S. provisional patent application No. 62/156,602, filed May 4, 2015, entitled “Free-Standing Module Port And Bypass Assemblies Using Same”, prior U.S. provisional patent application No. 62/156,708, filed May 4, 2015, entitled “Improved Cable-Direct Connector”; prior U.S. provisional patent application No. “62/167,036, filed May 27, 2015 entitled “Wire to Board Connector with Wiping Feature and Bypass Assemblies Incorporating Same”; and, prior U.S. provisional patent application No. 62/182,161, filed Jun. 19, 2015 entitled “Wire to Board Connector with Compliant Contacts and Bypass Assemblies Incorporating Same”, all of which are incorporated by reference herein.
Number | Name | Date | Kind |
---|---|---|---|
3007131 | Dahlgren et al. | Oct 1961 | A |
3594613 | Prietula | Jul 1971 | A |
3633152 | Podmore | Jan 1972 | A |
3963319 | Schumacher et al. | Jun 1976 | A |
4009921 | Narozny | Mar 1977 | A |
4025141 | Thelissen | May 1977 | A |
4060295 | Tomkiewicz | Nov 1977 | A |
4072387 | Sochor | Feb 1978 | A |
4083615 | Volinskie | Apr 1978 | A |
4157612 | Rainal | Jun 1979 | A |
4290664 | Davis et al. | Sep 1981 | A |
4307926 | Smith | Dec 1981 | A |
4346355 | Tsukii | Aug 1982 | A |
4417779 | Wilson | Nov 1983 | A |
4508403 | Weltman | Apr 1985 | A |
4611186 | Ziegner | Sep 1986 | A |
4615578 | Stadler et al. | Oct 1986 | A |
4639054 | Kersbergen | Jan 1987 | A |
4656441 | Takahashi et al. | Apr 1987 | A |
4657329 | Dechelette | Apr 1987 | A |
4679321 | Plonski | Jul 1987 | A |
4697862 | Hasircoglu | Oct 1987 | A |
4724409 | Lehman | Feb 1988 | A |
4889500 | Lazar et al. | Dec 1989 | A |
4924179 | Sherman | May 1990 | A |
4948379 | Evans | Aug 1990 | A |
4984992 | Beamenderfer | Jan 1991 | A |
4991001 | Takubo et al. | Feb 1991 | A |
5112251 | Cesar | May 1992 | A |
5197893 | Morlion et al. | Mar 1993 | A |
5332979 | Roskewitsch et al. | Jul 1994 | A |
5387130 | Fedder et al. | Feb 1995 | A |
5402088 | Pierro et al. | Mar 1995 | A |
5435757 | Fedder et al. | Jul 1995 | A |
5441424 | Morlion et al. | Aug 1995 | A |
5487673 | Hurtarte | Jan 1996 | A |
5509827 | Huppenthal et al. | Apr 1996 | A |
5554038 | Morlion et al. | Sep 1996 | A |
5598627 | Saka et al. | Feb 1997 | A |
5632634 | Soes | Nov 1997 | A |
5691506 | Miyazaki et al. | Nov 1997 | A |
5781759 | Kashiwabara | Jul 1998 | A |
5784644 | Larabell | Jul 1998 | A |
5813243 | Johnson et al. | Sep 1998 | A |
5842873 | Gonzales | Dec 1998 | A |
5876239 | Morin et al. | Mar 1999 | A |
6004139 | Dramstad | Dec 1999 | A |
6053770 | Blom | Apr 2000 | A |
6083046 | Wu et al. | Jul 2000 | A |
6095872 | Lang | Aug 2000 | A |
6098127 | Kwang | Aug 2000 | A |
6144559 | Johnson et al. | Nov 2000 | A |
6156981 | Ward | Dec 2000 | A |
6203376 | Magajne et al. | Mar 2001 | B1 |
6216184 | Fackenhall et al. | Apr 2001 | B1 |
6238219 | Wu | May 2001 | B1 |
6255741 | Yoshihara | Jul 2001 | B1 |
6266712 | Henrichs | Jul 2001 | B1 |
6273753 | Ko | Aug 2001 | B1 |
6273758 | Lloyd | Aug 2001 | B1 |
3035973 | McColloch | Oct 2001 | A1 |
6366471 | Edwards et al. | Apr 2002 | B1 |
6368120 | Scherer | Apr 2002 | B1 |
6371788 | Bowling et al. | Apr 2002 | B1 |
6452789 | Pallotti et al. | Sep 2002 | B1 |
6454605 | Bassler et al. | Sep 2002 | B1 |
6489563 | Zhao et al. | Dec 2002 | B1 |
6535367 | Carpenter | Mar 2003 | B1 |
6538903 | Radu et al. | Mar 2003 | B1 |
6574115 | Asano et al. | Jun 2003 | B2 |
6575772 | Soubh et al. | Jun 2003 | B1 |
6592401 | Gardner et al. | Jul 2003 | B1 |
6652296 | Kuroda et al. | Nov 2003 | B2 |
6652318 | Winings et al. | Nov 2003 | B1 |
6685501 | Wu et al. | Feb 2004 | B1 |
6692262 | Loveless | Feb 2004 | B1 |
6705893 | Ko | Mar 2004 | B1 |
6780069 | Scherer | Aug 2004 | B2 |
6797891 | Blair et al. | Sep 2004 | B1 |
6824426 | Spink | Nov 2004 | B1 |
6843657 | Driscoll et al. | Jan 2005 | B2 |
6859854 | Kwong | Feb 2005 | B2 |
6882241 | Abo et al. | Apr 2005 | B2 |
6903934 | Lo | Jun 2005 | B2 |
6910914 | Spink | Jun 2005 | B1 |
6916183 | Alger et al. | Jul 2005 | B2 |
6955565 | Lloyd et al. | Oct 2005 | B2 |
6969270 | Renfro | Nov 2005 | B2 |
6969280 | Chien | Nov 2005 | B2 |
6971887 | Trobaugh | Dec 2005 | B1 |
7004765 | Hsu | Feb 2006 | B2 |
7004793 | Scherer | Feb 2006 | B2 |
7008234 | Brown | Mar 2006 | B1 |
7044772 | McCreery | May 2006 | B2 |
7052292 | Hsu | May 2006 | B2 |
7056128 | Driscoll et al. | Jun 2006 | B2 |
7066756 | Lange | Jun 2006 | B2 |
7070446 | Henry | Jul 2006 | B2 |
7108522 | Verelst et al. | Sep 2006 | B2 |
7148428 | Meier et al. | Dec 2006 | B2 |
7168961 | Hsieh | Jan 2007 | B2 |
7175446 | Bright | Feb 2007 | B2 |
7192300 | Hashiguchi | Mar 2007 | B2 |
7214097 | Hsu et al. | May 2007 | B1 |
7223915 | Hackman | May 2007 | B2 |
7234944 | Nordin | Jun 2007 | B2 |
7244137 | Renfro et al. | Jul 2007 | B2 |
7280372 | Grundy et al. | Oct 2007 | B2 |
7307293 | Fjelstad et al. | Dec 2007 | B2 |
7331816 | Krohn | Feb 2008 | B2 |
7384275 | Ngo | Jun 2008 | B2 |
7394665 | Hamasaki et al. | Jul 2008 | B2 |
7402048 | Meier et al. | Jul 2008 | B2 |
7431608 | Sakaguchi et al. | Oct 2008 | B2 |
7445471 | Scherer | Nov 2008 | B1 |
7462924 | Shuey | Dec 2008 | B2 |
7489514 | Hamasaki | Feb 2009 | B2 |
7534142 | Avery | May 2009 | B2 |
7540773 | Ko | Jun 2009 | B2 |
7549897 | Fedder | Jun 2009 | B2 |
7621779 | Laurx et al. | Nov 2009 | B2 |
7637767 | Davis | Dec 2009 | B2 |
7654831 | Wu | Feb 2010 | B1 |
7658654 | Ohyama | Feb 2010 | B2 |
7690930 | Chen et al. | Apr 2010 | B2 |
7719843 | Dunham | May 2010 | B2 |
7737360 | Wiemeyer et al. | Jun 2010 | B2 |
7744385 | Scherer | Jun 2010 | B2 |
7744403 | Barr | Jun 2010 | B2 |
7744414 | Scherer et al. | Jun 2010 | B2 |
7748988 | Hori | Jul 2010 | B2 |
7771207 | Hamner | Aug 2010 | B2 |
7789529 | Roberts | Sep 2010 | B2 |
7813146 | Phan | Oct 2010 | B1 |
7819675 | Ko et al. | Oct 2010 | B2 |
7824197 | Westman | Nov 2010 | B1 |
7857629 | Chin | Dec 2010 | B2 |
7857630 | Hermant et al. | Dec 2010 | B2 |
7862344 | Morgan | Jan 2011 | B2 |
7892019 | Rao | Feb 2011 | B2 |
7906730 | Atkinson et al. | Mar 2011 | B2 |
7931502 | Lida | Apr 2011 | B2 |
7985097 | Gulla | Jul 2011 | B2 |
7997933 | Feldman | Aug 2011 | B2 |
8002583 | Woensel | Aug 2011 | B2 |
8018733 | Jia | Sep 2011 | B2 |
8036500 | McColloch | Oct 2011 | B2 |
8089779 | Fietz et al. | Jan 2012 | B2 |
8096813 | Biggs | Jan 2012 | B2 |
8157573 | Tanaka | Apr 2012 | B2 |
8162675 | Regnier | Apr 2012 | B2 |
8187038 | Kamiya | May 2012 | B2 |
8192222 | Kameyama | Jun 2012 | B2 |
8226441 | Regnier | Jul 2012 | B2 |
8308491 | Nichols et al. | Nov 2012 | B2 |
8337243 | Elkhatib et al. | Dec 2012 | B2 |
8338713 | Fjelstad et al. | Dec 2012 | B2 |
8398433 | Yang | Mar 2013 | B1 |
8419472 | Swanger | Apr 2013 | B1 |
8435074 | Grant | May 2013 | B1 |
8439704 | Reed | May 2013 | B2 |
8449312 | Lang | May 2013 | B2 |
8449330 | Schroll | May 2013 | B1 |
8465302 | Regnier | Jun 2013 | B2 |
8480413 | Minich | Jul 2013 | B2 |
8517765 | Schroll | Aug 2013 | B2 |
8535069 | Zhang | Sep 2013 | B2 |
8540525 | Regnier | Sep 2013 | B2 |
8553102 | Yamada | Oct 2013 | B2 |
8575491 | Gundel et al. | Nov 2013 | B2 |
8575529 | Asahi | Nov 2013 | B2 |
8585442 | Tuma et al. | Nov 2013 | B2 |
8588561 | Zbinden | Nov 2013 | B2 |
8597055 | Regnier | Dec 2013 | B2 |
8651890 | Chiarelli | Feb 2014 | B2 |
8672707 | Nichols et al. | Mar 2014 | B2 |
8687350 | Santos | Apr 2014 | B2 |
8690604 | Davis | Apr 2014 | B2 |
8715003 | Buck | May 2014 | B2 |
8740644 | Long | Jun 2014 | B2 |
8747158 | Szczesny | Jun 2014 | B2 |
8753145 | Lang | Jun 2014 | B2 |
8758051 | Nonen et al. | Jun 2014 | B2 |
8764483 | Ellison | Jul 2014 | B2 |
8784122 | Soubh | Jul 2014 | B2 |
8787711 | Zbinden | Jul 2014 | B2 |
8794991 | Ngo | Aug 2014 | B2 |
8804342 | Behziz et al. | Aug 2014 | B2 |
8814595 | Cohen et al. | Aug 2014 | B2 |
8834190 | Ngo | Sep 2014 | B2 |
8864521 | Atkinson et al. | Oct 2014 | B2 |
8888533 | Westman et al. | Nov 2014 | B2 |
8905767 | Putt, Jr. | Dec 2014 | B2 |
8911255 | Scherer et al. | Dec 2014 | B2 |
8926342 | Vinther | Jan 2015 | B2 |
8926377 | Kirk | Jan 2015 | B2 |
8992236 | Wittig | Mar 2015 | B2 |
8992237 | Regnier | Mar 2015 | B2 |
8992258 | Raschilla | Mar 2015 | B2 |
9011177 | Lloyd | Apr 2015 | B2 |
9028281 | Kirk | May 2015 | B2 |
9035183 | Kodama et al. | May 2015 | B2 |
9040824 | Guetig et al. | May 2015 | B2 |
9054432 | Yang | Jun 2015 | B2 |
9071001 | Scherer | Jun 2015 | B2 |
9118151 | Tran et al. | Aug 2015 | B2 |
9119292 | Gundel | Aug 2015 | B2 |
9136652 | Ngo | Sep 2015 | B2 |
9142921 | Wanha et al. | Sep 2015 | B2 |
9155214 | Ritter | Oct 2015 | B2 |
9160123 | Pao | Oct 2015 | B1 |
9160151 | Vinther | Oct 2015 | B2 |
9161463 | Takamura | Oct 2015 | B2 |
9166320 | Herring | Oct 2015 | B1 |
9196983 | Saur | Nov 2015 | B2 |
9203171 | Yu | Dec 2015 | B2 |
9209539 | Herring | Dec 2015 | B2 |
9214756 | Nishio | Dec 2015 | B2 |
9214768 | Pao | Dec 2015 | B2 |
9232676 | Sechrist et al. | Jan 2016 | B2 |
9246251 | Regnier | Jan 2016 | B2 |
9277649 | Ellison | Mar 2016 | B2 |
9292055 | Wu | Mar 2016 | B2 |
9312618 | Regnier | Apr 2016 | B2 |
9331432 | Phillips | May 2016 | B1 |
9350108 | Long | May 2016 | B2 |
9356366 | Moore | May 2016 | B2 |
9385455 | Regnier | Jul 2016 | B2 |
9391407 | Bucher | Jul 2016 | B1 |
9401563 | Simpson | Jul 2016 | B2 |
9413090 | Nagamine | Aug 2016 | B2 |
9413097 | Tamarkin et al. | Aug 2016 | B2 |
9413112 | Heister | Aug 2016 | B2 |
9431773 | Chen | Aug 2016 | B2 |
9437981 | Wu | Sep 2016 | B2 |
9455538 | Nishio | Sep 2016 | B2 |
9484671 | Zhu | Nov 2016 | B2 |
9484673 | Yang | Nov 2016 | B1 |
9490587 | Phillips | Nov 2016 | B1 |
9496655 | Huang | Nov 2016 | B1 |
9515429 | DeGeest | Dec 2016 | B2 |
9525245 | Regnier | Dec 2016 | B2 |
9543688 | Pao | Jan 2017 | B2 |
9553381 | Regnier | Jan 2017 | B2 |
9559465 | Phillips | Jan 2017 | B2 |
9565780 | Nishio | Feb 2017 | B2 |
9608388 | Kondo | Mar 2017 | B2 |
9608590 | Hamner | Mar 2017 | B2 |
9627818 | Chen | Apr 2017 | B1 |
9660364 | Wig et al. | May 2017 | B2 |
9666998 | De Boer | May 2017 | B1 |
9673570 | Briant | Jun 2017 | B2 |
9705258 | Phillips | Jul 2017 | B2 |
9812799 | Wittig | Nov 2017 | B2 |
9846287 | Mack | Dec 2017 | B2 |
9985367 | Wanha et al. | May 2018 | B2 |
20010016438 | Reed | Aug 2001 | A1 |
20020111067 | Sakurai | Aug 2002 | A1 |
20020157865 | Noda | Oct 2002 | A1 |
20020180554 | Clark et al. | Dec 2002 | A1 |
20030064616 | Reed | Apr 2003 | A1 |
20030073331 | Peloza | Apr 2003 | A1 |
20030180006 | Loh et al. | Sep 2003 | A1 |
20030222282 | Fjelstad et al. | Dec 2003 | A1 |
20040094328 | Fjelstad et al. | May 2004 | A1 |
20040121633 | David et al. | Jun 2004 | A1 |
20040155328 | Kline | Aug 2004 | A1 |
20040155734 | Kosemura et al. | Aug 2004 | A1 |
20040229510 | Lloyd | Nov 2004 | A1 |
20040264894 | Cooke | Dec 2004 | A1 |
20050006126 | Aisenbrey | Jan 2005 | A1 |
20050051810 | Funakura | Mar 2005 | A1 |
20050093127 | Fjelstad et al. | May 2005 | A1 |
20050130490 | Rose | Jun 2005 | A1 |
20050142944 | Ling | Jun 2005 | A1 |
20050239339 | Pepe | Oct 2005 | A1 |
20060001163 | Kolbehdari et al. | Jan 2006 | A1 |
20060035523 | Kuroda | Feb 2006 | A1 |
20060038287 | Harnasaki | Feb 2006 | A1 |
20060079102 | DeLessert | Apr 2006 | A1 |
20060079119 | Wu | Apr 2006 | A1 |
20060091507 | Fjelstad et al. | May 2006 | A1 |
20060114016 | Suzuki | Jun 2006 | A1 |
20060160399 | Dawiedczyk | Jul 2006 | A1 |
20060189212 | Avery | Aug 2006 | A1 |
20060194475 | Miyazaki | Aug 2006 | A1 |
20060216969 | Bright | Sep 2006 | A1 |
20060228922 | Morriss | Oct 2006 | A1 |
20060234556 | Wu | Oct 2006 | A1 |
20060238991 | Drako | Oct 2006 | A1 |
20060282724 | Roulo | Dec 2006 | A1 |
20060292898 | Meredith | Dec 2006 | A1 |
20070032104 | Yamada | Feb 2007 | A1 |
20070141871 | Scherer | Jun 2007 | A1 |
20070243741 | Yang | Oct 2007 | A1 |
20080024999 | Huang | Jan 2008 | A1 |
20080131997 | Kim et al. | Jun 2008 | A1 |
20080171476 | Liu | Jul 2008 | A1 |
20080186666 | Wu | Aug 2008 | A1 |
20080297988 | Chau | Dec 2008 | A1 |
20080305689 | Zhang et al. | Dec 2008 | A1 |
20090023330 | Stoner et al. | Jan 2009 | A1 |
20090153169 | Soubh | Jun 2009 | A1 |
20090166082 | Liu et al. | Jul 2009 | A1 |
20090174991 | Mandavi | Jul 2009 | A1 |
20090215309 | Mongold | Aug 2009 | A1 |
20100042770 | Chuang | Feb 2010 | A1 |
20100068944 | Scherer | Mar 2010 | A1 |
20100112850 | Rao | May 2010 | A1 |
20100159829 | McCormack | Jun 2010 | A1 |
20100177489 | Yagisawa | Jul 2010 | A1 |
20100190373 | Yeh | Jul 2010 | A1 |
20100203768 | Kondo et al. | Aug 2010 | A1 |
20110074213 | Schaffer | Mar 2011 | A1 |
20110080719 | Jia | Apr 2011 | A1 |
20110136387 | Matsuura | Jun 2011 | A1 |
20110177699 | Crofoot et al. | Jul 2011 | A1 |
20110212633 | Regnier | Sep 2011 | A1 |
20110230104 | Lang | Sep 2011 | A1 |
20110263156 | Ko | Oct 2011 | A1 |
20110300757 | Regnier | Dec 2011 | A1 |
20110304966 | Schrempp | Dec 2011 | A1 |
20120003848 | Casher | Jan 2012 | A1 |
20120033370 | Reinke et al. | Feb 2012 | A1 |
20120034820 | Lang | Feb 2012 | A1 |
20120225585 | Lee | Sep 2012 | A1 |
20120246373 | Chang | Sep 2012 | A1 |
20130005178 | Straka et al. | Jan 2013 | A1 |
20130012038 | Kirk | Jan 2013 | A1 |
20130017715 | Laarhoven | Jan 2013 | A1 |
20130040482 | Ngo | Feb 2013 | A1 |
20130092429 | Ellison | Apr 2013 | A1 |
20130148321 | Liang | Jun 2013 | A1 |
20130340251 | Regnier | Dec 2013 | A1 |
20140041937 | Lloyd | Feb 2014 | A1 |
20140073173 | Yang | Mar 2014 | A1 |
20140073174 | Yang | Mar 2014 | A1 |
20140073181 | Yang | Mar 2014 | A1 |
20140111293 | Madeberg et al. | Apr 2014 | A1 |
20140217571 | Ganesan et al. | Aug 2014 | A1 |
20140242844 | Wanha et al. | Aug 2014 | A1 |
20140273551 | Resendez | Sep 2014 | A1 |
20140273594 | Jones | Sep 2014 | A1 |
20140335736 | Regnier | Nov 2014 | A1 |
20150079845 | Wanha | Mar 2015 | A1 |
20150090491 | Dunwoody | Apr 2015 | A1 |
20150180578 | Leigh et al. | Jun 2015 | A1 |
20150212961 | Wu | Jul 2015 | A1 |
20150207247 | Chen et al. | Sep 2015 | A1 |
20160013596 | Regnier | Jan 2016 | A1 |
20160064119 | Grant | Mar 2016 | A1 |
20160104956 | Santos | Apr 2016 | A1 |
20160181713 | Peloza | Jun 2016 | A1 |
20160190720 | Lindkamp | Jun 2016 | A1 |
20160190747 | Regnier | Jun 2016 | A1 |
20160197423 | Regnier | Jul 2016 | A1 |
20160218455 | Sayre | Jul 2016 | A1 |
20160233598 | Wittig | Aug 2016 | A1 |
20160233615 | Scholeno | Aug 2016 | A1 |
20160336692 | Champion | Nov 2016 | A1 |
20160380383 | Lord | Dec 2016 | A1 |
20170033482 | Liao | Feb 2017 | A1 |
20170033509 | Liao | Feb 2017 | A1 |
20170077621 | Liao | Mar 2017 | A1 |
20170098901 | Regnier | Apr 2017 | A1 |
20170110222 | Liptak | Apr 2017 | A1 |
20170125950 | Lloyd | May 2017 | A1 |
20170162960 | Wanha | Jun 2017 | A1 |
20170302036 | Regnier | Oct 2017 | A1 |
20170365942 | Regnier | Dec 2017 | A1 |
20180034175 | Lloyd | Feb 2018 | A1 |
20180120906 | Reed | May 2018 | A1 |
20180366890 | Lloyd | Dec 2018 | A1 |
20190027870 | Lloyd | Jan 2019 | A1 |
Number | Date | Country |
---|---|---|
1316802 | Oct 2001 | CN |
2624465 | Jul 2004 | CN |
1647323 | Jul 2005 | CN |
102365907 | Feb 2012 | CN |
3447556 | Jul 1986 | DE |
H02-079571 | Jun 1990 | JP |
04-14372 | Feb 1992 | JP |
05-059761 | Aug 1993 | JP |
2004-253456 | Sep 2004 | JP |
2008-041285 | Feb 2008 | JP |
2008-059857 | Mar 2008 | JP |
2009-043590 | Feb 2009 | JP |
2010-017388 | Jan 2010 | JP |
2010-123274 | Jun 2010 | JP |
2013-016394 | Jan 2013 | JP |
10-2009-0040365 | Apr 2009 | KR |
M359141 | Jun 2009 | TW |
M408835 | Aug 2011 | TW |
201225455 | Jun 2012 | TW |
2008072322 | Jun 2008 | WO |
2012078434 | Jun 2012 | WO |
2013006592 | Jan 2013 | WO |
2016112379 | Jul 2016 | WO |
Entry |
---|
International Search Report and Written Opinion received for PCT application No. PCT/US2016/012862, dated Apr. 21, 2016, 10 pages. |
International Preliminary Report on Patentability received for PCT Application No. PCT/US2016/012862, dated Jul. 20, 2017, 9 pages. |
“File:Wrt54gl-layout.jpg-Embedded Xinu”, Internet Citation, Sep. 8, 2006, Retrieved from the Internet: URL: http://xinu.mscs.edu/File:Wrt54gl-layout.jpg, Retrieved on Sep. 23, 2014. |
Agilent, “Designing Scalable 1OG Backplane Interconnect Systems Utilizing Advanced Verification Methodologies,” White Paper, May 5, 2012. |
Amphenol TCS, “Amphenol TCS expands the XCede Platform with 85 Ohm Connectors and High-Speed Cable Solutions,” Press Release, Published Feb. 25, 2009, http://www.amphenol.com/about/news archive/2009/58. |
Amphenol Aerospace, “Size 8 High Speed Quadrax and Differential Twinax Contacts for Use in MIL-DTL-38999 Special Subminiature Cylindrical and ARINC 600 Rectangular Connectors”, Retrieved from the Internet URL: vvww.peigenesis.com/images/content/news/amphenol quadrax.pdf., May 2008. |
Hitachi Cable America Inc., “Direct Attach Cables: OMNIBIT supports 25 Gbit/s interconnections”, Retrieved from the Internet URL: www.hca.hitachi-cable.com/products/hca/catalog/pdfs/direct-attach-cable-assemblies.pdf, Aug. 10, 2017. |
International Search Report and Written Opinion received for PCT application No. PCT/US2016/012848, dated Apr. 25, 2016, 11 pages. |
International Preliminary Report on Patentability received for PCT Application No. PCT/US2016/012848, dated Jul. 20, 2017, 10 pages. |
Number | Date | Country | |
---|---|---|---|
20190245288 A1 | Aug 2019 | US |
Number | Date | Country | |
---|---|---|---|
62102045 | Jan 2015 | US | |
62102046 | Jan 2015 | US | |
62102047 | Jan 2015 | US | |
62102048 | Jan 2015 | US | |
62156602 | May 2015 | US | |
62156708 | May 2015 | US | |
62167036 | May 2015 | US | |
62182161 | Jun 2015 | US |
Number | Date | Country | |
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Parent | 15541208 | US | |
Child | 16386294 | US |