The invention is related to the field of wireless power transfer systems, and in particular a wireless power transfer in-band communication system that provides robust communications channel to be embedded in the case where energy is transferred from a Source to a Load without a physical connection.
Current wireless power transfer (also referred to as wireless charging) on the market (Qi) employs communication system based on a classic asynchronous serial communication interface with a start/stop bit or indication and little or no protection on the data transmitted. This serial communication is specified by the Wireless Power Consortium (WPC).
According to one aspect of the invention, there is provided a wireless charging in-band communication system. The wireless charging in-band communication system includes a transmitter module that formats a message. The transmitter includes channel encoding for message error correction and detection. A modulation module performs biphase modulation for DC balanced signals and impedance switching to change reflected impedance seen by the source. A synchronization module prepends the message with a synchronization sequence having Golay complementary codes. A receiver module receives the message from the transmitter module. The receiver module includes an impedance sensing circuit to detect changes in the reflected impedance of the transmitter module. The receiver module includes a front end filter used for pulse shaping and noise rejection. A preamble detection block has a Golay complementary code correlator used for message detection, synchronization, and equalization coefficient estimation and selection. A decoding module that performs biphase demodulation with error correction with a DC offset being estimated as the average value of the signal over the length of the message before channel decoding. The decoding module performs equalization, error correction and detection channel decoding.
According to another aspect of the invention, there is provided a method of performing the operations of a wireless charging in-band communication system. The method includes formatting a message, and performing biphase modulation for DC balanced signals using a modulation module, including impedance switching to change reflected impedance seen by the source. Also, the method includes prepending the message with a synchronization sequence having Golay complementary codes using a synchronization module, and receiving the message from the transmitter module using a receiver module. An impedance sensing circuit is provided to detect changes in the reflected impedance of the transmitter module. A front end filter is provided that is used for pulse shaping and noise rejection. In addition, the method includes using a Golay complementary code correlator for message detection, synchronization, and equalization coefficient estimation and selection, and performing biphase demodulation with error correction with a DC offset being estimated as the average value of the signal over the length of the message before channel decoding using a biphase demodulator module. Furthermore, the method includes performing equalization, error correction channel decoding and detection.
According to another aspect of the invention, there is provided a transmitter. The transmitter supports wireless charging in-band communication with a receiver. The transmitter comprises a channel encoding module for message error correction and detection, a modulation module for performing modulation and impedance switching to change reflected impedance seen by the receiver, and a synchronization module for prepending the message with a synchronization sequence.
According to another aspect of the invention, there is provided a receiver. The receiver supports wireless charging in-band communication with a transmitter. The receiver comprises a sensing circuit for detecting characteristics changes of the transmitter, a front end filter for pulse shaping and noise rejection, a preamble detection block having a correlator used for message detection, synchronization, and equalization coefficient estimation and selection, and a decoding module for performing demodulation with error correction, equalization, and channel decoding.
This invention describes the feasibility of using the wireless power transfer medium to send messages from a charging device to the source. Wireless power transfer (also referred to as wireless charging) is when energy is transferred from a Source to a Load without a physical connection. A typical example in this case would be a pad that's sits on a flat surface acting as the Source and a mobile phone placed on or near the pad acting as the Load.
The inventive wireless power transfer in-band communication system is different from systems currently on the market or proposed by other companies. In this topology the Load device 4 is required to communicate with the Source 8 to provide power control commands, status and foreign object detection information. It is possible by varying the reflected impedance of the Load 4 seen by the Source 8 to modulate a signal on the transmitted power waveform to facilitate communication between the Load and Source.
Note that inductive wireless charging setups require that the device (Load) 4 is sitting flush with the charger (Source) 8, as shown in
The inventive wireless charging system can utilize a larger form factor to allow multiple devices to charge simultaneously. The inventive wireless charging system can have multiple devices with arbitrary orientation. The devices do not need to be in close proximity or have a fixed orientation. The arbitrary offset and position of the device results in very hostile in-band wireless charger communication channel conditions. This makes communication between Load and Source difficult.
The in-band communication system used by the invention must have low complexity and be robust enough to ensure good communication between the Load(Transmitter) and the Source(Receiver). Complexity is an important factor as both the communication transmission and reception must be able to be implemented on relatively simple MCUs and/or low complexity dedicated hardware.
Table 1 shows some typical values for the message encoding/decoding.
The CRC is used to determine if the message is received without errors. The CRC shall be attached to each message header—if used—and message body. Note that for a variable length communications system the header must indicate the length of the message and must also have a CRC attached to allow for the determination of correct detection. An eight bit CRC could be used with the following polynomial: poly(D)=D8+D7+D4+D3+D+1.
Two error correcting codes have been considered for the wireless charger application but the invention can use other known coding technologies. The first code is a (15,7) double-error-correcting BCH code and the second code is an enhanced (13,8) Hamming code which can correct single-bit errors as well as adjacent double-bit errors. For both codes, an implementation of the encoder and the straightforward implementation of the decoder based on lookup tables is used.
The following describes a possible encoder implementation of a (15,7) double-error-correcting BCH Code. A codeword can be written as c=(c1, c2, . . . , c15), where c1, c2, . . . , c7 are information bits and c8, c9, . . . , c15 are redundant bits. The parity check matrix of the code is
The generator matrix of the code is
The code can correct any double-bit errors. To simplify the error correcting algorithm, the error will be corrected only if the information bits of the codes are affected.
Given 7 information bits v, for encoding the 15-bit codeword can be computed by a modulo 2 matrix multiplication c=vG. The formulas for the 8 redundant bits are as follows, where + is the modulo 2 addition.
c8=c1+c2+c4
c9=c2+c3+c5
c10=c3+c4+c6
c11=c4+c5+c7
c12=c1+c2+c4+c5+c6
c13=c2+c3+c5+c6+c7
c14=c1+c2+c3+c6+c7
c15=c1+c3+c7
The following describes a possible encoder implementation of a (13,8) Enhanced Hamming code. The (13,8) Enhanced Hamming code can correct any single-bit errors and any adjacent double-bit errors. The total number of correctable error patterns is 26. For channel models where almost all of the double-bit errors occur to two adjacent bits, the code can provide nearly as good performance as a double-error-correcting BCH codes.
Given 8 information bits v, the 13-bit codeword can be computed by a modulo 2 matrix multiplication c=vG. The formulas for the 5 redundant bits are as follows, where + is the modulo 2 addition.
c9=c2+c3+c5+c7
c10=c1+c3+c4+c6
c11=c1+c2+c5+c8
c12=c1+c2+c3+c5+c6
c13=c2+c4+c7+c8
The coding scheme used in Table 1a is a Reed-Solomon code—RS (48, 16) code defined over GF(24).
Assuming hard-decision decoding is applied, the error detection/correction capability of a given block code is determined by its symbol Hamming distance d. A code with Hamming distance d=2t+1 can:
If one can fully use the error correction capability of a block code with Hamming distance d=2t+1 (up to t errors can be corrected), then an error with Hamming weight d−t=t+1 can be miss corrected as an error of Hamming weight %. Miss corrected errors can be more harmful than undetected errors in channels where errors with smaller multiplicity are more probable (Undetected errors have a multiplicity of at least 2t+1 thus are less probable to occur).
If only t′≤t−1 errors are corrected, then miss corrected errors will have a multiplicity of at least d−t′. By sacrificing its error correction capability (t′<t), we are increasing the error detection capability of the code (d−t′ increases as t′ decreases). “Multiplicity” of errors is defined as the number of non-zero symbols in the error.
The channel coding setup has a Hamming distance of d=9 which can correct up to 4 symbol errors. If we let t′=3, the code can correct up to 3 symbol errors and at the same time detect all symbol errors with a multiplicity of up to 5. (The multiplicity of miss corrected errors is at least d−t′=6).
Using this scheme to be able to detect errors is dependent on the communications link operating within the specified SNR range. Decoder metrics or an SNR measurement can be used to determine if the communication link is within the specified SNR range and scenarios outside the range constitute message packets that have errors.
Specific consideration has been given to the modulation format. This is important for multiple reasons: to have suitable format for the medium that is dominated by large DC signals, to have good performance in terms of bit-error-rate (BER) and to have format that can be effectively produced by simple circuit realization.
In-band communication is accomplished by means of modulating the impedance of a Load and sensing a power change on the Source. One can detect this power change on the Source via a sensing circuit and provide this as an input to a micro-controller or low complexity hardware block. During communications, a “0” output from the “Load” has no effect on the “Source” coil's impedance. The impedance modulation may have the effect of decreasing the power available to the Load. In order to maintain a relatively constant rate of power transfer the coding scheme should have a relative consistent portion of “1”s and “0”s.
A transmission protocol such as biphase insures that a “1” state will only occur for one bit time before it will be normalized by a “0” state. This type of conditioning is best for the circuitry to minimize the effect on the “receivers” coil voltage. At worst only three consecutive “1”s should occur at the biphase rate (in the example of the system used to illustrate operation rate is 4 kHz).
The receiver portion of the in-band communication system includes: (1) Impedance sensing, to detect changes in the reflected impedance of the Load; (2) Front end filter, used for pulse shaping and noise rejection; (3) Preamble detection block—e.g., Golay complementary code correlator, used for message detection, synchronization, and equalization coefficient estimation; (4) Demodulation and equalization—e.g., biphase demodulation with error correction; (5) Channel decoding—e.g., BCH error correction decoder; (6) CRC calculation, check and removal, for message error detection.
ADC typically operates at the clock rate that is an integer multiple of the data rate supported by in-band communication system. In one of the implementations of the receiver the received signal after ADC is 32× oversampled, with x being the supported data rate, and is down sampled digitally. The sample rate of the signal after downsampling is dependent on the signal processing function being used. For preamble detection the rate of oversampling used can 8× or 4× and for message reception the oversampling rate is 4×. A higher oversample rate used in the preamble detection results in better noise and DC offset estimation.
Following ADC is the digital RX front end filter 14 which can be implemented as a cascade of the filter sections 16 to reduce the amount of processing (MIPS) and increase the number of effective bits. The output of the pulse shaping filter is down sampled to the rate required by the preamble and message detection. In the current design the message detection has an input sample rate of 4× rate. The selection of which samples to filter is determined by the synchronization procedure. It should be noted that the pulse shaping filter could be implemented as a cascade of filter sections to reduce the amount of processing (MIPS) required.
The received signal is a combination of wanted biphase modulated signal and unwanted DC offset. The DC offset can be removed within one of the following modules
The following pulse shaping filter was designed to remove the DC offset and attenuate the signal past the first main lobe of the biphase signal.
The preamble detector 18 (or syncronization) block contains: (1) Correlator with DC offset; (2) Peak detector; and (3) Timing estimation. The correlator can be done as either a sliding correlator or using the Enhanced Golay Correlator (EGC).
In order for the Source(Receiver) to determine if the Load(Transmitter) is transmitting a message there needs to be an initial preamble for the Source to do the following: (1) Recognize there is going to be a message transmitted from the Load to the Source; (2) Synchronization of the symbol timing between the Load and the Source by setting which samples are feed into the pulse shaping filter; and (3) Calculation of equalizer coefficients and hence dispersiveness of the channel.
The Load system will have its frequency locked to the Source 6.78 MHz oscillator so the preamble synchronization sequence is only meant for the Source to determine the symbol timing.
The following codes were investigated: (1) Barker sequence; (2) Complementary Hadamard sequence, (3) length 32; M-sequence length, 32; (4) Complementary Golay sequence, length 16. Note other codes can also be used in accordance with the invention.
Of these synchronization codes investigated the Complementary Golay sequence had good characteristics and also the option of implementing the correlator using the Enhanced Golay Correlator (EGC) or a variant of this method. The EGC and variants are an efficient implementation of a circular correlator and can efficiently support DC offset estimation and removal. The synchronization can be done either using a sliding window time correlator or a circular correlator performed each sample.
It is important to be able to detect the preamble at SNR values that are lower than that expected for a reliable message decoding. From the current requirements with a modulation depth of 0.1 the lowest SNR value encountered is ˜0 dB. It is expected that the preamble detection and synchronization can work at <0 dB SNR value.
Biphase encoding a signal with good autocorrelation characteristics will make the autocorrelation characteristics poorer.
The autocorrelation properties of several M-sequences and complementary Hadamard sequences of length 32 were also investigated and it was found that the Hadamard sequences had good auto correlation properties. The auto correlation of the Hadamard sequence is shown in
Golay complementary sequences have good autocorrelation characteristics.
To minimize the amount of processing required by the preamble detector the correlator 40 has been implemented as an Optimized Golay Correlator (OGC) with the noise estimation and DC offset estimation and removal built into the correlator block 40, as shown in
where N=3, n=0, 1, 2, k=0, . . . , 7, L=7, a[k] and b[k] are the received signals, a′i[k] and b′i[k] are partial results, Y [k] is the correlation between the input signal and the Golay sequence, Y[7] is the correlator output, MS Noise is the mean square of the noise for the current correlator output.
The DC offset is calculated using the equation below:
where N is the number of samples in the preamble sequence.
After a peak is detected the timing alignment needs to be determined so that this can be feedback to the pulse shaping filter to adjust the input samples to give the best timing alignment. The timing alignment of the received signal can be obtained by using an interpolation filter on the down sampled correlation data used for the preamble detection. Due to the interpolation the data must be padded with zeros. Only five correlation values are required around the correlation peak (zn).
Zm=(zn−2,0,0,0,zn−1,0,0,0,zn,0,0,0,zn+1,0,0,0,zn+2,0,0,0).
The output of the interpolator and the data gives:
B(k)=b0+b1+ . . . +bk,
where k=m+n−1
The location of the peak detected in the previous operation in the interpolated data set is at b15. A search can be done around sample b15 of +/−3 samples to determine if there is a greater value.
To simplify the interpolation procedure the interpolation filter's tapped delay line can be pre-loaded and only seven operations of the interpolation filter is required. A more efficient implementation would be to avoid a filter structure and use seven dedicated operations. Table 2 shows simplified interpolation filtering and Table 3 shows the dedicated sub-operations for interpolations filtering.
Following the synchronization the receiver performs demodulation by providing the functions of (optional) equalization, modulation decoding, channel decoding of the message and CRC check. If a channel coding scheme is used that does both error correction and detection then the CRC block is not required.
One of the items considered for the use in demodulation part of the receiver is equalizer. Experiments have determined that for the channel with time dispersion using the equalizer can be beneficial and it can be signaled by the flag from synchronization module.
The biphase with error correction method makes use of the soft bits, the characterisitics of biphase encoding and maximum likelihood (ML) correction. Looking at
The invention produces BER results using a system configuration with the following: (1) Biphase modulation; (2) pulse shaping filter at the receiver; and (3) Channel coding BCH.
The following describes a possible decoder implementation of a (15,7) double-error-correcting BCH Code. After receiving a possibly distorted codeword {tilde over (c)}, compute the syndrome of the BCH code by a modulo 2 matrix multiplication s=H{tilde over (c)}, where s is an 8-bit binary vector. No error is detected if s=0. If s≠0, the syndrome and its corresponding error vector is shown in Table 3. If a nonzero s is not in Table 3, then the information bits of the codeword is not affected by the error. Table 3 shows the error pattern for different syndromes s for the regular (15,7) BCH Code
The following describes a possible decoder implementation of a (13,8) enhanced Hamming code. After receiving a possibly distorted codeword {tilde over (c)}, compute the syndrome of the enhanced Hamming code by a modulo 2 matrix multiplication s=H{tilde over (c)}, where s is a 5-bit binary vector. Use s as the index to perform a (32×13) table lookup operation. The table of error patterns is described in Table 4. Table 4 shows the error pattern for different syndromes s for the (13,8) enhanced Hamming code
After finding the error vector e, the original codeword can be computed as c={tilde over (c)}+e, where + is the modulo 2 addition. The first 8 bits in c are the original information bits.
Although the present invention has been shown and described with respect to several preferred embodiments thereof, various changes, omissions and additions to the form and detail thereof, may be made therein, without departing from the spirit and scope of the invention.
This application is a continuation-in-part of PCT Application Ser. No. PCT/US13/66721 (which claims priority from U.S. provisional application Ser. No. 61/718,943 filed Oct. 26, 2012), and claims priority from U.S. provisional application Ser. No. 61/791,014 filed Mar. 15, 2013, all of which are incorporated herein by reference in their entireties.
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Number | Date | Country | |
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Parent | PCT/US2013/066721 | Oct 2013 | US |
Child | 14215084 | US |