Ascenium AS

Organization

4006 Stavanger, NO

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Patents Applicationslast 30 patents

Information Patent Application
PARALLEL PROCESSING ARCHITECTURE WITH BLOCK MOVE BACKPRESSURE
- Publication number 20240419507
- Publication date Dec 19, 2024
- Ascenium, Inc.
- Peter Foley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARALLEL PROCESSING ARCHITECTURE WITH BLOCK MOVE SUPPORT
- Publication number 20240385965
- Publication date Nov 21, 2024
- Ascenium, Inc.
- Peter Foley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARALLEL PROCESSING ARCHITECTURE WITH SHADOW STATE
- Publication number 20240330036
- Publication date Oct 3, 2024
- Ascenium AS
- Øyvind Harboe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARALLEL PROCESSING HAZARD MITIGATION AVOIDANCE
- Publication number 20240264974
- Publication date Aug 8, 2024
- Ascenium, Inc.
- Peter Foley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARALLEL PROCESSING ARCHITECTURE FOR BRANCH PATH SUPPRESSION
- Publication number 20240193009
- Publication date Jun 13, 2024
- Ascenium, Inc.
- Peter Foley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARALLEL PROCESSING WITH HAZARD DETECTION AND STORE PROBES
- Publication number 20240168802
- Publication date May 23, 2024
- Ascenium, Inc.
- Peter Foley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARALLEL PROCESSING WITH SWITCH BLOCK EXECUTION
- Publication number 20240078182
- Publication date Mar 7, 2024
- Ascenium, Inc.
- Peter Foley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARALLEL PROCESSING USING HAZARD DETECTION AND MITIGATION
- Publication number 20240070076
- Publication date Feb 29, 2024
- Ascenium, Inc.
- Peter Foley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARALLEL PROCESSING ARCHITECTURE WITH BIN PACKING
- Publication number 20240028340
- Publication date Jan 25, 2024
- Ascenium, Inc.
- Peter Foley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARALLEL PROCESSING ARCHITECTURE WITH MEMORY BLOCK TRANSFERS
- Publication number 20230409328
- Publication date Dec 21, 2023
- Ascenium, Inc.
- Peter Foley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARALLEL PROCESSING ARCHITECTURE WITH DUAL LOAD BUFFERS
- Publication number 20230376447
- Publication date Nov 23, 2023
- Ascenium, Inc.
- Peter Foley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARALLEL PROCESSING ARCHITECTURE WITH COUNTDOWN TAGGING
- Publication number 20230350713
- Publication date Nov 2, 2023
- Ascenium, Inc.
- Peter Foley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARALLEL PROCESSING ARCHITECTURE WITH SPLIT CONTROL WORD CACHES
- Publication number 20230342152
- Publication date Oct 26, 2023
- Ascenium, Inc.
- Peter Foley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARALLEL PROCESSING OF MULTIPLE LOOPS WITH LOADS AND STORES
- Publication number 20230281014
- Publication date Sep 7, 2023
- Ascenium, Inc.
- Peter Foley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIGHLY PARALLEL PROCESSING ARCHITECTURE WITH OUT-OF-ORDER RESOLUTION
- Publication number 20230273818
- Publication date Aug 31, 2023
- Ascenium, Inc.
- Peter Foley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
AUTONOMOUS COMPUTE ELEMENT OPERATION USING BUFFERS
- Publication number 20230221931
- Publication date Jul 13, 2023
- Ascenium, Inc.
- Peter Foley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTE ELEMENT PROCESSING USING CONTROL WORD TEMPLATES
- Publication number 20230128127
- Publication date Apr 27, 2023
- Ascenium, Inc.
- Ionut Hristodorescu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOAD LATENCY AMELIORATION USING BUNCH BUFFERS
- Publication number 20230031902
- Publication date Feb 2, 2023
- Ascenium, Inc.
- Peter Foley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARALLEL PROCESSING ARCHITECTURE FOR ATOMIC OPERATIONS
- Publication number 20220374286
- Publication date Nov 24, 2022
- Ascenium, Inc.
- Peter Foley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARALLEL PROCESSING ARCHITECTURE USING DISTRIBUTED REGISTER FILES
- Publication number 20220308872
- Publication date Sep 29, 2022
- Ascenium, Inc.
- Peter Foley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARALLEL PROCESSING ARCHITECTURE WITH DISTRIBUTED REGISTER FILES
- Publication number 20220291957
- Publication date Sep 15, 2022
- Ascenium, Inc.
- Peter Foley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARALLEL PROCESSING ARCHITECTURE USING SPECULATIVE ENCODING
- Publication number 20220214885
- Publication date Jul 7, 2022
- Ascenium, Inc.
- Peter Foley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIGHLY PARALLEL PROCESSING ARCHITECTURE USING DUAL BRANCH EXECUTION
- Publication number 20220107812
- Publication date Apr 7, 2022
- Ascenium, Inc.
- Peter Foley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIGHLY PARALLEL PROCESSING ARCHITECTURE WITH COMPILER
- Publication number 20220075651
- Publication date Mar 10, 2022
- Ascenium, Inc.
- Øyvind Harboe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIGHLY PARALLEL PROCESSING ARCHITECTURE WITH SHALLOW PIPELINE
- Publication number 20220075627
- Publication date Mar 10, 2022
- Ascenium, Inc.
- Peter Foley
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARALLEL PROCESSING ARCHITECTURE WITH BACKGROUND LOADS
- Publication number 20220075740
- Publication date Mar 10, 2022
- Ascenium, Inc.
- Peter Foley
- G06 - COMPUTING CALCULATING COUNTING

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Trademarklast 30 trademarks

Information Trademark
97580410 - REFIGUR
- Serial number 97580410
- Filing date Sep 6, 2022
- Ascenium Inc.
- 42 - Scientific and technological services and research and design relating thereto
Information Trademark
97580406 - REFIGUR
- Serial number 97580406
- Filing date Sep 6, 2022
- Ascenium Inc.
- 9 - Scientific, nautical, surveying, photographic, cinematographic, optical, weighing, measuring, signalling, checking (supervision), life-saving and teaching apparatus and instruments

Ascenium AS

Organization

Patents Applicationslast 30 patents

PARALLEL PROCESSING ARCHITECTURE WITH BLOCK MOVE BACKPRESSURE

PARALLEL PROCESSING ARCHITECTURE WITH BLOCK MOVE SUPPORT

PARALLEL PROCESSING ARCHITECTURE WITH SHADOW STATE

PARALLEL PROCESSING HAZARD MITIGATION AVOIDANCE

PARALLEL PROCESSING ARCHITECTURE FOR BRANCH PATH SUPPRESSION

PARALLEL PROCESSING WITH HAZARD DETECTION AND STORE PROBES

PARALLEL PROCESSING WITH SWITCH BLOCK EXECUTION

PARALLEL PROCESSING USING HAZARD DETECTION AND MITIGATION

PARALLEL PROCESSING ARCHITECTURE WITH BIN PACKING

PARALLEL PROCESSING ARCHITECTURE WITH MEMORY BLOCK TRANSFERS

PARALLEL PROCESSING ARCHITECTURE WITH DUAL LOAD BUFFERS

PARALLEL PROCESSING ARCHITECTURE WITH COUNTDOWN TAGGING

PARALLEL PROCESSING ARCHITECTURE WITH SPLIT CONTROL WORD CACHES

PARALLEL PROCESSING OF MULTIPLE LOOPS WITH LOADS AND STORES

HIGHLY PARALLEL PROCESSING ARCHITECTURE WITH OUT-OF-ORDER RESOLUTION

AUTONOMOUS COMPUTE ELEMENT OPERATION USING BUFFERS

COMPUTE ELEMENT PROCESSING USING CONTROL WORD TEMPLATES

LOAD LATENCY AMELIORATION USING BUNCH BUFFERS

PARALLEL PROCESSING ARCHITECTURE FOR ATOMIC OPERATIONS

PARALLEL PROCESSING ARCHITECTURE USING DISTRIBUTED REGISTER FILES

PARALLEL PROCESSING ARCHITECTURE WITH DISTRIBUTED REGISTER FILES

PARALLEL PROCESSING ARCHITECTURE USING SPECULATIVE ENCODING

HIGHLY PARALLEL PROCESSING ARCHITECTURE USING DUAL BRANCH EXECUTION

HIGHLY PARALLEL PROCESSING ARCHITECTURE WITH COMPILER

HIGHLY PARALLEL PROCESSING ARCHITECTURE WITH SHALLOW PIPELINE

PARALLEL PROCESSING ARCHITECTURE WITH BACKGROUND LOADS

Trademarklast 30 trademarks

97580410 - REFIGUR

97580406 - REFIGUR