Atoptech, Inc.

Organization

Santa Clara, CA, US

Business Address
11550 UPLAND WAY CUPERTINO CA 95014 4089739011
State Location
CA
State of Incorporation

Organizations

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Patents Grantslast 30 patents

Information Patent Grant
In-hierarchy circuit analysis and modification
- Patent number 9,536,036
- Issue date Jan 3, 2017
- Atoptech, Inc.
- Ping-San Tzeng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pass eco flow based on reduced timing scope timer
- Patent number 9,418,192
- Issue date Aug 16, 2016
- Atoptech, Inc.
- Geng Bai
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Statistical optimization in place-and-route
- Patent number 9,342,642
- Issue date May 17, 2016
- Atoptech, Inc.
- Yu-Cheng Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
In-hierarchy circuit analysis and modification for circuit instances
- Patent number 9,177,090
- Issue date Nov 3, 2015
- Atoptech, Inc.
- Ping-San Tzeng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Natively color-aware double patterning technology (DPT) compliant r...
- Patent number 8,935,639
- Issue date Jan 13, 2015
- Atoptech, Inc.
- Ping-San Tzeng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Statistical optimization in place-and-route
- Patent number 8,806,412
- Issue date Aug 12, 2014
- Atoptech, Inc.
- Yu-Cheng Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
In-hierarchy circuit analysis and modification
- Patent number 8,793,633
- Issue date Jul 29, 2014
- Atoptech, Inc.
- Ping-San Tzeng
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
In-hierarchy circuit analysis and modification
- Patent number 8,566,765
- Issue date Oct 22, 2013
- Atoptech, Inc.
- Ping-San Tzeng
- G06 - COMPUTING CALCULATING COUNTING

Atoptech, Inc.

Organization

Business Address

State Location

State of Incorporation

Patents Grantslast 30 patents

In-hierarchy circuit analysis and modification

Pass eco flow based on reduced timing scope timer

Statistical optimization in place-and-route

In-hierarchy circuit analysis and modification for circuit instances

Natively color-aware double patterning technology (DPT) compliant r...

Statistical optimization in place-and-route

In-hierarchy circuit analysis and modification

In-hierarchy circuit analysis and modification

Patents Applicationslast 30 patents

Trademarklast 30 trademarks