ESILICON COROPRATION

Organization

SAN JOSE, CA, US

Organizations

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Patents Grantslast 30 patents

Information Patent Grant
Baseline wander compensation in SerDes transceivers
- Patent number 10,554,449
- Issue date Feb 4, 2020
- eSilicon Corporation
- Nicola Ghittori
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Successive approximation register (SAR) analog to digital converter...
- Patent number 10,469,096
- Issue date Nov 5, 2019
- eSilicon Corporation
- Nicola Ghittori
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Successive approximation register (SAR) analog to digital converter...
- Patent number 10,454,491
- Issue date Oct 22, 2019
- eSilicon Corporation
- Nicola Ghittori
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Elongated pad structure
- Patent number 10,050,003
- Issue date Aug 14, 2018
- eSilicon Corporation
- Javier DeLaCruz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Duo content addressable memory (CAM) using a single CAM
- Patent number 10,032,516
- Issue date Jul 24, 2018
- eSilicon Corporation
- Dennis Dudeck
- G11 - INFORMATION STORAGE
Information Patent Grant
Wireless probes
- Patent number 10,018,670
- Issue date Jul 10, 2018
- eSilicon Corporation
- Javier DeLaCruz
- G01 - MEASURING TESTING
Information Patent Grant
Communication interface architecture using serializer/deserializer
- Patent number 9,984,997
- Issue date May 29, 2018
- eSilicon Corporation
- Javier DeLaCruz
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory optimization in VLSI design using generic memory models
- Patent number 9,852,250
- Issue date Dec 26, 2017
- eSilicon Corporation
- Prasad Subramaniam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Error detection and correction in ternary content addressable memor...
- Patent number 9,762,261
- Issue date Sep 12, 2017
- eSilicon Corporation
- Michael Anthony Zampaglione
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Generating specific memory models using generic memory models for d...
- Patent number 9,727,681
- Issue date Aug 8, 2017
- eSilicon Corporation
- Prasad Subramaniam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Designing memories in VLSI design using specific memory models gene...
- Patent number 9,727,682
- Issue date Aug 8, 2017
- eSilicon Corporation
- Prasad Subramaniam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Duo content addressable memory (CAM) using a single CAM
- Patent number 9,711,220
- Issue date Jul 18, 2017
- eSilicon Corporation
- Dennis Dudeck
- G11 - INFORMATION STORAGE
Information Patent Grant
Error detection and correction in binary content addressable memory...
- Patent number 9,529,669
- Issue date Dec 27, 2016
- eSilicon Corporation
- Michael Anthony Zampaglione
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scaling of integrated circuit design including logic and memory com...
- Patent number 9,460,255
- Issue date Oct 4, 2016
- eSilicon Corporation
- Prasad Subramaniam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scaling of integrated circuit design including high-level logic com...
- Patent number 9,460,257
- Issue date Oct 4, 2016
- eSilicon Corporation
- Prasad Subramaniam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit design scaling for recommending design point
- Patent number 9,460,256
- Issue date Oct 4, 2016
- eSilicon Corporation
- Prasad Subramaniam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Parallel signal via structure
- Patent number 9,461,000
- Issue date Oct 4, 2016
- eSilicon Corporation
- Javier DeLaCruz
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Scaling logic components of integrated circuit design
- Patent number 9,460,254
- Issue date Oct 4, 2016
- eSilicon Corporation
- Prasad Subramaniam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Scaling memory components of integrated circuit design
- Patent number 9,454,628
- Issue date Sep 27, 2016
- eSilicon Corporation
- Prasad Subramaniam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit design optimization
- Patent number 9,454,636
- Issue date Sep 27, 2016
- eSilicon Corporation
- Prasad Subramaniam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Testing of thru-silicon vias
- Patent number 9,435,846
- Issue date Sep 6, 2016
- eSilicon Corporation
- Javier DeLaCruz
- G01 - MEASURING TESTING
Information Patent Grant
Mixed-sized pillars that are probeable and routable
- Patent number 9,263,409
- Issue date Feb 16, 2016
- eSilicon Corporation
- Javier DeLaCruz
- G01 - MEASURING TESTING
Information Patent Grant
Variability-aware scheme for high-performance asynchronous circuit...
- Patent number 8,572,539
- Issue date Oct 29, 2013
- eSilicon Corporation
- Jordi Cortadella
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Network of tightly coupled performance monitors for determining the...
- Patent number 8,446,224
- Issue date May 21, 2013
- eSilicon Corporation
- Jordi Cortadella
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Asynchronous scheme for clock domain crossing
- Patent number 8,433,875
- Issue date Apr 30, 2013
- eSilicon Corporation
- Jordi Cortadella
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Pushed-rule bit cells with new functionality
- Patent number 8,355,269
- Issue date Jan 15, 2013
- eSilicon Corporation
- Michael Anthony Zampaglione
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method for automating integration of semiconductor work...
- Patent number 7,756,598
- Issue date Jul 13, 2010
- eSilicon Corporation
- Sabhapathi Naidu Annamaneni
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for automating integration of semiconductor work...
- Patent number 7,474,933
- Issue date Jan 6, 2009
- eSilicon Corporation
- Sabhapathi N. Annamaneni
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Prediction based optimization of a semiconductor supply chain using...
- Patent number 7,218,980
- Issue date May 15, 2007
- eSilicon Corporation
- Michael E. Orshansky
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adaptive real-time work-in -progress tracking, prediction, and opti...
- Patent number 6,748,287
- Issue date Jun 8, 2004
- eSilicon Corporation
- Klaus ten Hagen
- G06 - COMPUTING CALCULATING COUNTING

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Patents Applicationslast 30 patents

Information Patent Application
Duo Content Addressable Memory (CAM) Using A Single CAM
- Publication number 20170278569
- Publication date Sep 28, 2017
- eSilicon Corporation
- Dennis Dudeck
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Scaling of Integrated Circuit Design Including High-Level Logic Com...
- Publication number 20160371411
- Publication date Dec 22, 2016
- eSilicon Corporation
- Prasad Subramaniam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCALING MEMORY COMPONENTS OF INTEGRATED CIRCUIT DESIGN
- Publication number 20160292314
- Publication date Oct 6, 2016
- eSilicon Corporation
- Prasad Subramaniam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED CIRCUIT DESIGN SCALING FOR RECOMMENDING DESIGN POINT
- Publication number 20160292316
- Publication date Oct 6, 2016
- eSilicon Corporation
- Prasad Subramaniam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCALING OF INTEGRATED CIRCUIT DESIGN INCLUDING HIGH-LEVEL LOGIC COM...
- Publication number 20160292317
- Publication date Oct 6, 2016
- eSilicon Corporation
- Prasad Subramaniam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Integrated Circuit Design Optimization
- Publication number 20160292343
- Publication date Oct 6, 2016
- eSilicon Corporation
- Prasad Subramaniam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Scaling Logic Components of Integrated Circuit Design
- Publication number 20160292313
- Publication date Oct 6, 2016
- eSilicon Corporation
- Prasad Subramaniam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SCALING OF INTEGRATED CIRCUIT DESIGN INCLUDING LOGIC AND MEMORY COM...
- Publication number 20160292315
- Publication date Oct 6, 2016
- eSilicon Corporation
- Prasad Subramaniam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Generating Specific Memory Models Using Generic Memory Models for D...
- Publication number 20160246909
- Publication date Aug 25, 2016
- eSilicon Corporation
- Prasad Subramaniam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory Optimization in VLSI Design Using Generic Memory Models
- Publication number 20160246910
- Publication date Aug 25, 2016
- eSilicon Corporation
- Prasad Subramaniam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Designing Memories in VLSI Design Using Specific Memory Models Gene...
- Publication number 20160246911
- Publication date Aug 25, 2016
- eSilicon Corporation
- Prasad Subramaniam
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ELONGATED PAD STRUCTURE
- Publication number 20160163669
- Publication date Jun 9, 2016
- eSilicon Corporation
- Javier DeLaCruz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
WIRELESS PROBES
- Publication number 20160161554
- Publication date Jun 9, 2016
- eSilicon Corporation
- Javier DeLaCruz
- G01 - MEASURING TESTING
Information Patent Application
DUO CONTENT ADDRESSABLE MEMORY (CAM) USING A SINGLE CAM
- Publication number 20160163385
- Publication date Jun 9, 2016
- eSilicon Corporation
- Dennis Dudeck
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Communication Interface Architecture Using Serializer/Deserializer
- Publication number 20160027482
- Publication date Jan 28, 2016
- eSilicon Corporation
- Javier DeLaCruz
- G11 - INFORMATION STORAGE
Information Patent Application
Error Detection and Correction in Binary Content Addressable Memory...
- Publication number 20150095740
- Publication date Apr 2, 2015
- eSilicon Corporation
- Michael Anthony Zampaglione
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Error Detection and Correction in Ternary Content Addressable Memor...
- Publication number 20150095738
- Publication date Apr 2, 2015
- eSilicon Corporation
- Michael Anthony Zampaglione
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Testing of Thru-Silicon Vias
- Publication number 20140347089
- Publication date Nov 27, 2014
- eSilicon Corporation
- Javier DeLaCruz
- G01 - MEASURING TESTING
Information Patent Application
Mixed-Sized Pillars That Are Probeable and Routable
- Publication number 20140346513
- Publication date Nov 27, 2014
- eSilicon Corporation
- Javier DeLaCruz
- G01 - MEASURING TESTING
Information Patent Application
Parallel Signal Via Structure
- Publication number 20140346678
- Publication date Nov 27, 2014
- eSilicon Corporation
- Javier DeLaCruz
- H01 - BASIC ELECTRIC ELEMENTS

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Trademarklast 30 trademarks

Information Trademark
87950807 - NEUASIC
- Serial number 87950807
- Filing date Jun 6, 2018
- eSilicon Corporation
- 9 - Scientific, nautical, surveying, photographic, cinematographic, optical, weighing, measuring, signalling, checking (supervision), life-saving and teaching apparatus and instruments
Information Trademark
77222454 - ESILICON ACCESS
- Serial number 77222454
- Registration number 3603342
- Filing date Jul 5, 2007
- eSilicon Corporation
- 42 - Scientific and technological services and research and design relating thereto
Information Trademark
78256197 - ESILICON
- Serial number 78256197
- Registration number 2969847
- Filing date May 30, 2003
- eSilicon Corporation
- 9 - Scientific, nautical, surveying, photographic, cinematographic, optical, weighing, measuring, signalling, checking (supervision), life-saving and teaching apparatus and instruments
Information Trademark
76177028 - ESILICON
- Serial number 76177028
- Registration number 3591594
- Filing date Dec 6, 2000
- eSilicon Corporation
- 9 - Scientific, nautical, surveying, photographic, cinematographic, optical, weighing, measuring, signalling, checking (supervision), life-saving and teaching apparatus and instruments
Information Trademark
76978628 - ESILICON
- Serial number 76978628
- Registration number 3412021
- Filing date Dec 6, 2000
- eSilicon Corporation
- 9 - Scientific, nautical, surveying, photographic, cinematographic, optical, weighing, measuring, signalling, checking (supervision), life-saving and teaching apparatus and instruments
Information Trademark
75861913 - ESILICON
- Serial number 75861913
- Filing date Dec 2, 1999
- ESILICON CORPORATION
- 35 - Advertising

ESILICON COROPRATION

Organization

Patents Grantslast 30 patents

Baseline wander compensation in SerDes transceivers

Successive approximation register (SAR) analog to digital converter...

Successive approximation register (SAR) analog to digital converter...

Elongated pad structure

Duo content addressable memory (CAM) using a single CAM

Wireless probes

Communication interface architecture using serializer/deserializer

Memory optimization in VLSI design using generic memory models

Error detection and correction in ternary content addressable memor...

Generating specific memory models using generic memory models for d...

Designing memories in VLSI design using specific memory models gene...

Duo content addressable memory (CAM) using a single CAM

Error detection and correction in binary content addressable memory...

Scaling of integrated circuit design including logic and memory com...

Scaling of integrated circuit design including high-level logic com...

Integrated circuit design scaling for recommending design point

Parallel signal via structure

Scaling logic components of integrated circuit design

Scaling memory components of integrated circuit design

Integrated circuit design optimization

Testing of thru-silicon vias

Mixed-sized pillars that are probeable and routable

Variability-aware scheme for high-performance asynchronous circuit...

Network of tightly coupled performance monitors for determining the...

Asynchronous scheme for clock domain crossing

Pushed-rule bit cells with new functionality

System and method for automating integration of semiconductor work...

System and method for automating integration of semiconductor work...

Prediction based optimization of a semiconductor supply chain using...

Adaptive real-time work-in -progress tracking, prediction, and opti...

Patents Applicationslast 30 patents

Duo Content Addressable Memory (CAM) Using A Single CAM

Scaling of Integrated Circuit Design Including High-Level Logic Com...

SCALING MEMORY COMPONENTS OF INTEGRATED CIRCUIT DESIGN

INTEGRATED CIRCUIT DESIGN SCALING FOR RECOMMENDING DESIGN POINT

SCALING OF INTEGRATED CIRCUIT DESIGN INCLUDING HIGH-LEVEL LOGIC COM...

Integrated Circuit Design Optimization

Scaling Logic Components of Integrated Circuit Design

SCALING OF INTEGRATED CIRCUIT DESIGN INCLUDING LOGIC AND MEMORY COM...

Generating Specific Memory Models Using Generic Memory Models for D...

Memory Optimization in VLSI Design Using Generic Memory Models

Designing Memories in VLSI Design Using Specific Memory Models Gene...

ELONGATED PAD STRUCTURE

WIRELESS PROBES

DUO CONTENT ADDRESSABLE MEMORY (CAM) USING A SINGLE CAM

Communication Interface Architecture Using Serializer/Deserializer

Error Detection and Correction in Binary Content Addressable Memory...

Error Detection and Correction in Ternary Content Addressable Memor...

Testing of Thru-Silicon Vias

Mixed-Sized Pillars That Are Probeable and Routable

Parallel Signal Via Structure

Trademarklast 30 trademarks

87950807 - NEUASIC

77222454 - ESILICON ACCESS

78256197 - ESILICON

76177028 - ESILICON

76978628 - ESILICON

75861913 - ESILICON