HYPERION CORE, INC.

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Los Gatos, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
High performance processor
- Patent number 11,797,474
- Issue date Oct 24, 2023
- Hyperion Core, Inc.
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Providing code sections for matrix of arithmetic logic units in a p...
- Patent number 11,687,346
- Issue date Jun 27, 2023
- Hyperion Core, Inc.
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Issuing instructions to multiple execution units
- Patent number 10,908,914
- Issue date Feb 2, 2021
- Hyperion Core, Inc.
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Issuing instructions to multiple execution units
- Patent number 10,409,608
- Issue date Sep 10, 2019
- Hyperion Core, Inc.
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Optimization of loops and data flow sections in multi-core processo...
- Patent number 10,331,615
- Issue date Jun 25, 2019
- Hyperion Core, Inc.
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Parallel memory systems
- Patent number 10,031,888
- Issue date Jul 24, 2018
- Hyperion Core, Inc.
- Martin Vorbach
- G11 - INFORMATION STORAGE
Information Patent Grant
Issuing instructions to multiple execution units
- Patent number 9,898,297
- Issue date Feb 20, 2018
- Hyperion Core, Inc.
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for a cache in a multi-core processor
- Patent number 9,734,064
- Issue date Aug 15, 2017
- Hyperion Core, Inc.
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Tool-level and hardware-level code optimization and respective hard...
- Patent number 9,703,538
- Issue date Jul 11, 2017
- Hyperion Core, Inc.
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Optimization of loops and data flow sections in multi-core processo...
- Patent number 9,672,188
- Issue date Jun 6, 2017
- Hyperion Core, Inc.
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Providing code sections for matrix of arithmetic logic units in a p...
- Patent number 9,348,587
- Issue date May 24, 2016
- Hyperion Core, Inc.
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction issue to array of arithmetic cells coupled to load/stor...
- Patent number 9,152,427
- Issue date Oct 6, 2015
- Hyperion Core, Inc.
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for a cache in a multi-core processor
- Patent number 9,086,973
- Issue date Jul 21, 2015
- Hyperion Core, Inc.
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Optimization of loops and data flow sections in multi-core processo...
- Patent number 9,043,769
- Issue date May 26, 2015
- Hyperion Core Inc.
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
HIGH PERFORMANCE PROCESSOR
- Publication number 20240054097
- Publication date Feb 15, 2024
- HYPERION CORE, INC.
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROVIDING CODE SECTIONS FOR MATRIX OF ARITHMETIC LOGIC UNITS IN A P...
- Publication number 20230409334
- Publication date Dec 21, 2023
- HYPERION CORE, INC.
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADVANCED PROCESSOR ARCHITECTURE
- Publication number 20210406027
- Publication date Dec 30, 2021
- HYPERION CORE, INC.
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIGH PERFORMANCE PROCESSOR
- Publication number 20210286755
- Publication date Sep 16, 2021
- HYPERION CORE, INC.
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROVIDING CODE SECTIONS FOR MATRIX OF ARITHMETIC LOGIC UNITS IN A P...
- Publication number 20210026637
- Publication date Jan 28, 2021
- HYPERION CORE, INC.
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ISSUING INSTRUCTIONS TO MULTIPLE EXECUTION UNITS
- Publication number 20200241879
- Publication date Jul 30, 2020
- HYPERION CORE, INC.
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPTIMIZATION OF LOOPS AND DATA FLOW SECTIONS IN MULTI-CORE PROCESSO...
- Publication number 20200042492
- Publication date Feb 6, 2020
- HYPERION CORE, INC.
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EXECUTION OF INSTRUCTIONS BASED ON PROCESSOR AND DATA AVAILABILITY
- Publication number 20190377580
- Publication date Dec 12, 2019
- HYPERION CORE INC.
- Martin VORBACH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PARALLEL MEMORY SYSTEMS
- Publication number 20190197015
- Publication date Jun 27, 2019
- HYPERION CORE, INC.
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TOOL-LEVEL AND HARDWARE-LEVEL CODE OPTIMIZATION AND RESPECTIVE HARD...
- Publication number 20190171449
- Publication date Jun 6, 2019
- HYPERION CORE, INC.
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROVIDING CODE SECTIONS FOR MATRIX OF ARITHMETIC LOGIC UNITS IN A P...
- Publication number 20190079769
- Publication date Mar 14, 2019
- HYPERION CORE, INC.
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ISSUING INSTRUCTIONS TO MULTIPLE EXECUTION UNITS
- Publication number 20180181403
- Publication date Jun 28, 2018
- HYPERION CORE, INC.
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR A CACHE IN A MULTI-CORE PROCESSOR
- Publication number 20180039576
- Publication date Feb 8, 2018
- HYPERION CORE, INC.
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADVANCED PROCESSOR ARCHITECTURE
- Publication number 20180004530
- Publication date Jan 4, 2018
- HYPERION CORE, INC.
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TOOL-LEVEL AND HARDWARE-LEVEL CODE OPTIMIZATION AND RESPECTIVE HARD...
- Publication number 20170364338
- Publication date Dec 21, 2017
- HYPERION CORE, INC.
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPTIMIZATION OF LOOPS AND DATA FLOW SECTIONS IN MULTI-CORE PROCESSO...
- Publication number 20170262406
- Publication date Sep 14, 2017
- HYPERION CORE, INC.
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROVIDING CODE SECTIONS FOR MATRIX OF ARITHMETIC LOGIC UNITS IN A P...
- Publication number 20160306631
- Publication date Oct 20, 2016
- HYPERION CORE, INC.
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ISSUING INSTRUCTIONS TO MULTIPLE EXECUTION UNITS
- Publication number 20160048394
- Publication date Feb 18, 2016
- HYPERION CORE, INC.
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR A CACHE IN A MULTI-CORE PROCESSOR
- Publication number 20160004639
- Publication date Jan 7, 2016
- HYPERION CORE INC.
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
OPTIMIZATION OF LOOPS AND DATA FLOW SECTIONS IN MULTI-CORE PROCESSO...
- Publication number 20150301983
- Publication date Oct 22, 2015
- HYPERION CORE INC.
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADVANCED PROCESSOR ARCHITECTURE
- Publication number 20140351563
- Publication date Nov 27, 2014
- HYPERION CORE INC.
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TOOL-LEVEL AND HARDWARE-LEVEL CODE OPTIMIZATION AND RESPECTIVE HARD...
- Publication number 20140310696
- Publication date Oct 16, 2014
- HYPERION CORE INC.
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Optimisation of loops and data flow sections
- Publication number 20130191817
- Publication date Jul 25, 2013
- HYPERION CORE, INC.
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SEQUENTIAL PROCESSOR COMPRISING AN ALU ARRAY
- Publication number 20120216012
- Publication date Aug 23, 2012
- HYPERION CORE, INC.
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and Method for a Cache in a Multi-Core Processor
- Publication number 20120137075
- Publication date May 31, 2012
- HYPERION CORE, INC.
- Martin Vorbach
- G06 - COMPUTING CALCULATING COUNTING

HYPERION CORE, INC.

Organization

Patents Grantslast 30 patents

High performance processor

Providing code sections for matrix of arithmetic logic units in a p...

Issuing instructions to multiple execution units

Issuing instructions to multiple execution units

Optimization of loops and data flow sections in multi-core processo...

Parallel memory systems

Issuing instructions to multiple execution units

System and method for a cache in a multi-core processor

Tool-level and hardware-level code optimization and respective hard...

Optimization of loops and data flow sections in multi-core processo...

Providing code sections for matrix of arithmetic logic units in a p...

Instruction issue to array of arithmetic cells coupled to load/stor...

System and method for a cache in a multi-core processor

Optimization of loops and data flow sections in multi-core processo...

Patents Applicationslast 30 patents

HIGH PERFORMANCE PROCESSOR

PROVIDING CODE SECTIONS FOR MATRIX OF ARITHMETIC LOGIC UNITS IN A P...

ADVANCED PROCESSOR ARCHITECTURE

HIGH PERFORMANCE PROCESSOR

PROVIDING CODE SECTIONS FOR MATRIX OF ARITHMETIC LOGIC UNITS IN A P...

ISSUING INSTRUCTIONS TO MULTIPLE EXECUTION UNITS

OPTIMIZATION OF LOOPS AND DATA FLOW SECTIONS IN MULTI-CORE PROCESSO...

EXECUTION OF INSTRUCTIONS BASED ON PROCESSOR AND DATA AVAILABILITY

PARALLEL MEMORY SYSTEMS

TOOL-LEVEL AND HARDWARE-LEVEL CODE OPTIMIZATION AND RESPECTIVE HARD...

PROVIDING CODE SECTIONS FOR MATRIX OF ARITHMETIC LOGIC UNITS IN A P...

ISSUING INSTRUCTIONS TO MULTIPLE EXECUTION UNITS

SYSTEM AND METHOD FOR A CACHE IN A MULTI-CORE PROCESSOR

ADVANCED PROCESSOR ARCHITECTURE

TOOL-LEVEL AND HARDWARE-LEVEL CODE OPTIMIZATION AND RESPECTIVE HARD...

OPTIMIZATION OF LOOPS AND DATA FLOW SECTIONS IN MULTI-CORE PROCESSO...

PROVIDING CODE SECTIONS FOR MATRIX OF ARITHMETIC LOGIC UNITS IN A P...

ISSUING INSTRUCTIONS TO MULTIPLE EXECUTION UNITS

SYSTEM AND METHOD FOR A CACHE IN A MULTI-CORE PROCESSOR

OPTIMIZATION OF LOOPS AND DATA FLOW SECTIONS IN MULTI-CORE PROCESSO...

ADVANCED PROCESSOR ARCHITECTURE

TOOL-LEVEL AND HARDWARE-LEVEL CODE OPTIMIZATION AND RESPECTIVE HARD...

Optimisation of loops and data flow sections

SEQUENTIAL PROCESSOR COMPRISING AN ALU ARRAY

System and Method for a Cache in a Multi-Core Processor

Trademarklast 30 trademarks