ONNIVATION LLC

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SAN JOSE, CA, US

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Patents Grantslast 30 patents

Patents Applicationslast 30 patents

Information Patent Application
Computing Machine Using a Matrix Space And Matrix Pointer Registers...
- Publication number 20240004655
- Publication date Jan 4, 2024
- ONNIVATION LLC
- SITARAM YADAVALLI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SECURE MATRIX SPACE WITH PARTITIONS FOR CONCURRENT USE
- Publication number 20220156066
- Publication date May 19, 2022
- ONNIVATION LLC
- SITARAM YADAVALLI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION LENGTH BASED PARALLEL INSTRUCTION DEMARCATOR
- Publication number 20220137971
- Publication date May 5, 2022
- ONNIVATION LLC
- SITARAM YADAVALLI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION DEMARCATOR
- Publication number 20200387375
- Publication date Dec 10, 2020
- ONNIVATION LLC
- SITARAM YADAVALLI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Secure Matrix Space With Partitions For Concurrent Use
- Publication number 20200174787
- Publication date Jun 4, 2020
- Onnivation, LLC
- Sitaram Yadavalli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Computing Machine Using a Matrix Space For Matrix and Array Processing
- Publication number 20190250915
- Publication date Aug 15, 2019
- Onnivation, LLC
- Sitaram Yadavalli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTING MACHINE ARCHITECTURE FOR MATRIX AND ARRAY PROCESSING
- Publication number 20170337156
- Publication date Nov 23, 2017
- ONNIVATION LLC
- SITARAM YADAVALLI
- G06 - COMPUTING CALCULATING COUNTING

ONNIVATION LLC

Organization

Patents Grantslast 30 patents

Patents Applicationslast 30 patents

Computing Machine Using a Matrix Space And Matrix Pointer Registers...

SECURE MATRIX SPACE WITH PARTITIONS FOR CONCURRENT USE

INSTRUCTION LENGTH BASED PARALLEL INSTRUCTION DEMARCATOR

INSTRUCTION DEMARCATOR

Secure Matrix Space With Partitions For Concurrent Use

Computing Machine Using a Matrix Space For Matrix and Array Processing

COMPUTING MACHINE ARCHITECTURE FOR MATRIX AND ARRAY PROCESSING

Trademarklast 30 trademarks