P.A. Semi, Inc.

Organization

Santa Clara, CA, US

Organizations

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Patents Grantslast 30 patents

Information Patent Grant
Retry mechanism in cache coherent communication among agents
- Patent number 7,529,866
- Issue date May 5, 2009
- P.A. Semi, Inc.
- James B. Keller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Digital phase relationship lock loop
- Patent number 7,500,044
- Issue date Mar 3, 2009
- P.A. Semi, Inc.
- James Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Unified DMA
- Patent number 7,496,695
- Issue date Feb 24, 2009
- P.A. Semi, Inc.
- Dominic Go
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Prefetch unit
- Patent number 7,493,451
- Issue date Feb 17, 2009
- P.A. Semi, Inc.
- Sudarshan Kadambi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit with separate supply voltage for memory that is...
- Patent number 7,474,571
- Issue date Jan 6, 2009
- P.A. Semi, Inc.
- Brian J. Campbell
- G11 - INFORMATION STORAGE
Information Patent Grant
Early retirement of store operation past exception reporting pipeli...
- Patent number 7,472,260
- Issue date Dec 30, 2008
- P.A. Semi, Inc.
- Wei-Han Lien
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Non-blocking address switch with shallow per agent queues
- Patent number 7,461,190
- Issue date Dec 2, 2008
- P.A. Semi, Inc.
- Sridhar P. Subramanian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Digital jitter detector
- Patent number 7,454,674
- Issue date Nov 18, 2008
- P.A. Semi, Inc.
- Greg M. Hess
- G01 - MEASURING TESTING
Information Patent Grant
Segmented interconnect for connecting multiple agents in a system
- Patent number 7,426,601
- Issue date Sep 16, 2008
- P.A. Semi, Inc.
- Sridhar P. Subramanian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Ordering rule and fairness implementation
- Patent number 7,412,555
- Issue date Aug 12, 2008
- P.A. Semi, Inc.
- James Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Digital leakage detector that detects transistor leakage current in...
- Patent number 7,411,409
- Issue date Aug 12, 2008
- P.A. Semi, Inc.
- Edgardo F. Klass
- G01 - MEASURING TESTING
Information Patent Grant
Combined buffer for snoop, store merging, load miss, and writeback...
- Patent number 7,398,361
- Issue date Jul 8, 2008
- P.A. Semi, Inc.
- Ramesh Gunna
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Partial load/store forward prediction
- Patent number 7,376,817
- Issue date May 20, 2008
- P.A. Semi, Inc.
- Sudarshan Kadambi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Resonance limiter circuits for an integrated circuit
- Patent number 7,372,323
- Issue date May 13, 2008
- P.A. Semi, Inc.
- Vincent R. von Kaenel
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Pulsed flop with scan circuitry
- Patent number 7,373,569
- Issue date May 13, 2008
- P.A. Semi, Inc.
- Edgardo F. Klass
- G11 - INFORMATION STORAGE
Information Patent Grant
Partially decoded register renamer
- Patent number 7,373,486
- Issue date May 13, 2008
- P.A. Semi, Inc.
- Wei-Han Lien
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit with separate supply voltage for memory that is...
- Patent number 7,355,905
- Issue date Apr 8, 2008
- P.A. Semi, Inc.
- Brian J. Campbell
- G11 - INFORMATION STORAGE
Information Patent Grant
Pulsed flop with embedded logic
- Patent number 7,319,344
- Issue date Jan 15, 2008
- P.A. Semi, Inc.
- Edgardo F. Klass
- G01 - MEASURING TESTING
Information Patent Grant
Operating an integrated circuit at a minimum supply voltage
- Patent number 7,276,925
- Issue date Oct 2, 2007
- P.A. Semi, Inc.
- Daniel W. Dobberpuhl
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Register file
- Patent number 7,277,353
- Issue date Oct 2, 2007
- P.A. Semi, Inc.
- Rajat Goel
- G11 - INFORMATION STORAGE
Information Patent Grant
Voltage-controlled oscillator for low-voltage, wide frequency range...
- Patent number 7,268,633
- Issue date Sep 11, 2007
- P.A. Semi, Inc.
- Vincent R. von Kaenel
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Segmented interconnect for connecting multiple agents in a system
- Patent number 7,269,682
- Issue date Sep 11, 2007
- P.A. Semi, Inc.
- Sridhar P. Subramanian
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Combined multiplex or/flop
- Patent number 7,245,150
- Issue date Jul 17, 2007
- P.A. Semi, Inc.
- Rajat Goel
- G01 - MEASURING TESTING
Information Patent Grant
Recovering bit lines in a memory array after stopped clock operation
- Patent number 7,218,562
- Issue date May 15, 2007
- P.A. Semi, Inc.
- Brian J. Campbell
- G11 - INFORMATION STORAGE
Information Patent Grant
Read port circuit for register file
- Patent number 7,187,606
- Issue date Mar 6, 2007
- P.A. Semi, Inc.
- Rajat Goel
- G11 - INFORMATION STORAGE

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Patents Applicationslast 30 patents

Information Patent Application
Managed credit update
- Publication number 20080126606
- Publication date May 29, 2008
- P.A. Semi, Inc.
- James Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Strongly-ordered processor with early store retirement
- Publication number 20080086623
- Publication date Apr 10, 2008
- P.A. Semi, Inc.
- Wei-Han Lien
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Uncacheable load merging
- Publication number 20080086594
- Publication date Apr 10, 2008
- P.A. Semi, Inc.
- Po-Yung Chang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Replay reduction for power saving
- Publication number 20080086622
- Publication date Apr 10, 2008
- P.A. Semi, Inc.
- Po-Yung Chang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Fast L1 flush mechanism
- Publication number 20080077813
- Publication date Mar 27, 2008
- P.A. Semi, Inc.
- James B. Keller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Network direct memory access
- Publication number 20080043732
- Publication date Feb 21, 2008
- P.A. Semi, Inc.
- Shailendra S. Desai
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Prefetch unit
- Publication number 20070294482
- Publication date Dec 20, 2007
- P.A. Semi, Inc.
- Sudarshan Kadambi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Resonance limiter circuits for an integrated circuit
- Publication number 20070257721
- Publication date Nov 8, 2007
- P.A. Semi, Inc.
- Vincent R. von Kaenel
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Digital jitter detector
- Publication number 20070157057
- Publication date Jul 5, 2007
- P.A. Semi, Inc.
- Greg M. Hess
- G01 - MEASURING TESTING
Information Patent Application
Pulsed flop with embedded logic
- Publication number 20070139073
- Publication date Jun 21, 2007
- P.A. Semi, Inc.
- Edgardo F. Klass
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Combined multiplexor/flop
- Publication number 20070139075
- Publication date Jun 21, 2007
- P.A. Semi, Inc.
- Rajat Goel
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Wearout compensation mechanism using back bias technique
- Publication number 20070139098
- Publication date Jun 21, 2007
- P.A. Semi, Inc.
- Edgardo F. Klass
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Pulsed flop with scan circuitry
- Publication number 20070143647
- Publication date Jun 21, 2007
- P.A. Semi, Inc.
- Edgardo F. Klass
- G01 - MEASURING TESTING
Information Patent Application
Retry mechanism
- Publication number 20070130410
- Publication date Jun 7, 2007
- P.A. Semi, Inc.
- James B. Keller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Data cache block zero implementation
- Publication number 20070113020
- Publication date May 17, 2007
- P.A. Semi, Inc.
- Ramesh Gunna
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Floating point status/control register encodings for speculative re...
- Publication number 20070113060
- Publication date May 17, 2007
- P.A. Semi, Inc.
- Wei-Han Lien
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Digital leakage detector
- Publication number 20070109006
- Publication date May 17, 2007
- P.A. Semi, Inc.
- Edgardo F. Klass
- G01 - MEASURING TESTING
Information Patent Application
R and C bit update handling
- Publication number 20070106874
- Publication date May 10, 2007
- P.A. Semi, Inc.
- Jesse Pan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Functional DMA
- Publication number 20070073915
- Publication date Mar 29, 2007
- P.A. Semi, Inc.
- Dominic Go
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Ordering rule and fairness implementation
- Publication number 20070073954
- Publication date Mar 29, 2007
- P.A. Semi, Inc.
- James Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Unified DMA
- Publication number 20070073922
- Publication date Mar 29, 2007
- P.A. Semi, Inc.
- Dominic Go
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Checksum calculation
- Publication number 20070074091
- Publication date Mar 29, 2007
- P.A. Semi, Inc.
- Dominic Go
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Voltage-controlled oscillator for low-voltage, wide frequency range...
- Publication number 20070057735
- Publication date Mar 15, 2007
- P.A. Semi, Inc.
- Vincent R. von Kaenel
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Partially decoded register renamer
- Publication number 20070050602
- Publication date Mar 1, 2007
- P.A. Semi, Inc.
- Wei-Han Lien
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Channelized flow control
- Publication number 20070047443
- Publication date Mar 1, 2007
- P.A. Semi, Inc.
- Shailendra S. Desai
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Explicit flow control in Gigabit/10 Gigabit Ethernet system
- Publication number 20070047572
- Publication date Mar 1, 2007
- P.A. Semi, Inc.
- Shailendra S. Desai
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Combined buffer for snoop, store merging, load miss, and writeback...
- Publication number 20070050564
- Publication date Mar 1, 2007
- P.A. Semi, Inc.
- Ramesh Gunna
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
READ PORT CIRCUIT FOR REGISTER FILE
- Publication number 20070041250
- Publication date Feb 22, 2007
- P.A. Semi, Inc.
- Rajat Goel
- G11 - INFORMATION STORAGE
Information Patent Application
Register file
- Publication number 20070041262
- Publication date Feb 22, 2007
- P.A. Semi, Inc.
- Rajat Goel
- G11 - INFORMATION STORAGE
Information Patent Application
Partially populated, hierarchical crossbar
- Publication number 20070038796
- Publication date Feb 15, 2007
- P.A. Semi, Inc.
- Sridhar P. Subramanian
- G06 - COMPUTING CALCULATING COUNTING

P.A. Semi, Inc.

Organization

Patents Grantslast 30 patents

Retry mechanism in cache coherent communication among agents

Digital phase relationship lock loop

Unified DMA

Prefetch unit

Integrated circuit with separate supply voltage for memory that is...

Early retirement of store operation past exception reporting pipeli...

Non-blocking address switch with shallow per agent queues

Digital jitter detector

Segmented interconnect for connecting multiple agents in a system

Ordering rule and fairness implementation

Digital leakage detector that detects transistor leakage current in...

Combined buffer for snoop, store merging, load miss, and writeback...

Partial load/store forward prediction

Resonance limiter circuits for an integrated circuit

Pulsed flop with scan circuitry

Partially decoded register renamer

Integrated circuit with separate supply voltage for memory that is...

Pulsed flop with embedded logic

Operating an integrated circuit at a minimum supply voltage

Register file

Voltage-controlled oscillator for low-voltage, wide frequency range...

Segmented interconnect for connecting multiple agents in a system

Combined multiplex or/flop

Recovering bit lines in a memory array after stopped clock operation

Read port circuit for register file

Patents Applicationslast 30 patents

Managed credit update

Strongly-ordered processor with early store retirement

Uncacheable load merging

Replay reduction for power saving

Fast L1 flush mechanism

Network direct memory access

Prefetch unit

Resonance limiter circuits for an integrated circuit

Digital jitter detector

Pulsed flop with embedded logic

Combined multiplexor/flop

Wearout compensation mechanism using back bias technique

Pulsed flop with scan circuitry

Retry mechanism

Data cache block zero implementation

Floating point status/control register encodings for speculative re...

Digital leakage detector

R and C bit update handling

Functional DMA

Ordering rule and fairness implementation

Unified DMA

Checksum calculation

Voltage-controlled oscillator for low-voltage, wide frequency range...

Partially decoded register renamer

Channelized flow control

Explicit flow control in Gigabit/10 Gigabit Ethernet system

Combined buffer for snoop, store merging, load miss, and writeback...

READ PORT CIRCUIT FOR REGISTER FILE

Register file

Partially populated, hierarchical crossbar