Sicronic Remote KG, LLC

Organization

Wilmington, DE, US

Organizations

Please log in for detailed analytics

Patents Grantslast 30 patents

Information Patent Grant
Mapping of programmable logic devices
- Patent number RE43378
- Issue date May 8, 2012
- Sicronic Remote KG, LLC
- Sunil Kumar Sharma
- 716 - Computer-aided design and analysis of circuits and semiconductor masks
Information Patent Grant
Field programmable gate array
- Patent number 8,112,466
- Issue date Feb 7, 2012
- Sicronic Remote KG, LLC
- Deboleena Minz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and device for configuration of PLDS
- Patent number RE43081
- Issue date Jan 10, 2012
- Sicronic Remote KG, LLC
- Ashish Kumar Goel
- 326 - Electronic digital logic circuitry
Information Patent Grant
Mapping programmable logic devices
- Patent number 8,028,262
- Issue date Sep 27, 2011
- Sicronic Remote KG, LLC
- Ajay Tomar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technology mapping for programmable logic devices using replicating...
- Patent number 8,024,687
- Issue date Sep 20, 2011
- Sicronic Remote KG, LLC
- Hitanshu Dewan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
FPGA having a direct routing structure
- Patent number 7,961,004
- Issue date Jun 14, 2011
- Sicronic Remote KG, LLC
- Deboleena Minz
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Field programmable device
- Patent number RE42264
- Issue date Mar 29, 2011
- Sicronic Remote KG, LLC
- Deepak Agarwal
- 714 - Error detection/correction and fault detection/recovery
Information Patent Grant
FPGA having a direct routing structure
- Patent number 7,755,387
- Issue date Jul 13, 2010
- Sicronic Remote KG, LLC
- Deboleena Minz
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Rapid interconnect and logic testing of FPGA device
- Patent number 7,477,070
- Issue date Jan 13, 2009
- Sicronic Remote KG, LLC
- Pramod Kumar Singh
- G01 - MEASURING TESTING
Information Patent Grant
System for delay reduction during technology mapping in FPGA
- Patent number 7,430,726
- Issue date Sep 30, 2008
- Sicronic Remote KG, LLC
- Hitanshu Dewan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Optimal mapping of LUT based FPGA
- Patent number 7,415,681
- Issue date Aug 19, 2008
- Sicronic Remote KG, LLC
- Ajay Tomar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Interconnect structure enabling indirect routing in programmable logic
- Patent number 7,414,433
- Issue date Aug 19, 2008
- Sicronic Remote KG, LLC
- Nitin Deshmukh
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Configurable logic device providing enhanced flexibility, scalabili...
- Patent number 7,372,296
- Issue date May 13, 2008
- Sicronic Remote KG, LLC
- Vivek Kumar Sood
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus of reloading erroneous configuration data fram...
- Patent number 7,350,134
- Issue date Mar 25, 2008
- Sicronic Remote KG, LLC
- Ashish Kumar Goel
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
SYSTEM FOR DELAY REDUCTION DURING TECHNOLOGY MAPPING IN FPGA
- Publication number 20080295042
- Publication date Nov 27, 2008
- Sicronic Remote KG, LLC
- Hitanshu Dewan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Interconnect Structure Enabling Indirect Routing in Programmable Logic
- Publication number 20080258764
- Publication date Oct 23, 2008
- Sicronic Remote KG, LLC
- Nitin Deshmukh
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ADDING OR SUBTRACTING INPUTS USING A CARRY SIGNAL WITH A FIXED VALU...
- Publication number 20080252334
- Publication date Oct 16, 2008
- Sicronic Remote KG, LLC
- Vivek Kumar Sood
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Mapping Programmable Logic Devices
- Publication number 20080209385
- Publication date Aug 28, 2008
- Sicronic Remote KG
- Ajay Tomar
- G06 - COMPUTING CALCULATING COUNTING

Sicronic Remote KG, LLC

Organization

Patents Grantslast 30 patents

Mapping of programmable logic devices

Field programmable gate array

Method and device for configuration of PLDS

Mapping programmable logic devices

Technology mapping for programmable logic devices using replicating...

FPGA having a direct routing structure

Field programmable device

FPGA having a direct routing structure

Rapid interconnect and logic testing of FPGA device

System for delay reduction during technology mapping in FPGA

Optimal mapping of LUT based FPGA

Interconnect structure enabling indirect routing in programmable logic

Configurable logic device providing enhanced flexibility, scalabili...

Method and apparatus of reloading erroneous configuration data fram...

Patents Applicationslast 30 patents

SYSTEM FOR DELAY REDUCTION DURING TECHNOLOGY MAPPING IN FPGA

Interconnect Structure Enabling Indirect Routing in Programmable Logic

ADDING OR SUBTRACTING INPUTS USING A CARRY SIGNAL WITH A FIXED VALU...

Mapping Programmable Logic Devices

Trademarklast 30 trademarks