Telairity Semiconductor, Inc.

Organization

Santa Clara, CA, US

Organizations

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Patents Grantslast 30 patents

Information Patent Grant
Power grid layout techniques on integrated circuits
- Patent number 7,462,941
- Issue date Dec 9, 2008
- Telairity Semiconductor, Inc.
- John Campbell
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stream data interface for processing system
- Patent number 7,454,532
- Issue date Nov 18, 2008
- Telairity Semiconductor, Inc.
- Richard Dickson
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High speed data access memory arrays
- Patent number 7,280,401
- Issue date Oct 9, 2007
- Telairity Semiconductor, Inc.
- Luigi Di Gregorio
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuit group design methodologies
- Patent number 7,234,123
- Issue date Jun 19, 2007
- Telairity Semiconductor, Inc.
- Howard G. Sachs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System for repair of ROM programming errors or defects
- Patent number 7,103,736
- Issue date Sep 5, 2006
- Telairity Semiconductor, Inc.
- Howard G. Sachs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Idle power reduction for state machines
- Patent number 7,058,832
- Issue date Jun 6, 2006
- Telairity Semiconductor, Inc.
- Howard G. Sachs
- G05 - CONTROLLING REGULATING
Information Patent Grant
Power grid layout techniques on integrated circuits
- Patent number 6,998,719
- Issue date Feb 14, 2006
- Telairity Semiconductor, Inc.
- John Campbell
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Circuit group design methodologies
- Patent number 6,910,199
- Issue date Jun 21, 2005
- Telairity Semiconductor, Inc.
- Howard G. Sachs
- G06 - COMPUTING CALCULATING COUNTING

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Patents Applicationslast 30 patents

Information Patent Application
Minimized Table Lookup
- Publication number 20080186316
- Publication date Aug 7, 2008
- Telairity Semiconductor, Inc.
- Howard G. Sachs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Convolver Architecture for Vector Processor
- Publication number 20080059757
- Publication date Mar 6, 2008
- Telairity Semiconductor, Inc.
- Howard G. Sachs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Instructions for Vector Processor
- Publication number 20080059760
- Publication date Mar 6, 2008
- Telairity Semiconductor, Inc.
- Howard G. Sachs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory architecture for vector processor
- Publication number 20080059758
- Publication date Mar 6, 2008
- Telairity Semiconductor, Inc.
- Howard G. Sachs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Vector Processor Architecture
- Publication number 20080059759
- Publication date Mar 6, 2008
- Telairity Semiconductor, Inc.
- Howard G. Sachs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi-Pipe Vector Block Matching Operations
- Publication number 20080052489
- Publication date Feb 28, 2008
- Telairity Semiconductor, Inc.
- Howard G. Sachs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Vector processor with multi-pipe vector block matching
- Publication number 20070150697
- Publication date Jun 28, 2007
- Telairity Semiconductor, Inc.
- Howard G. Sachs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
High speed data access memory arrays
- Publication number 20060291300
- Publication date Dec 28, 2006
- Telairity Semiconductor, Inc.
- Luigi Di Gregorio
- G11 - INFORMATION STORAGE
Information Patent Application
Vector processor with special purpose registers and high speed memo...
- Publication number 20060259737
- Publication date Nov 16, 2006
- Telairity Semiconductor, Inc.
- Howard Sachs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for clock synchronization between a processor...
- Publication number 20060259807
- Publication date Nov 16, 2006
- Telairity Semiconductor, Inc.
- Howard G. Sachs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Direct memory access (DMA) method and apparatus and DMA for video p...
- Publication number 20060259657
- Publication date Nov 16, 2006
- Telairity Semiconductor, Inc.
- Howard G. Sachs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Power grid layout techniques on integrated circuits
- Publication number 20060081984
- Publication date Apr 20, 2006
- Telairity Semiconductor, Inc.
- John Campbell
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
System for repair of ROM programming errors or defects
- Publication number 20050039071
- Publication date Feb 17, 2005
- Telairity Semiconductor, Inc.
- Howard G. Sachs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Circuit group design methodologies
- Publication number 20050028128
- Publication date Feb 3, 2005
- Telairity Semiconductor, Inc.
- Howard G. Sachs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Power grid layout techniques on integrated circuits
- Publication number 20050023705
- Publication date Feb 3, 2005
- Telairity Semiconductor, Inc.
- John Campbell
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Circuit group design methodologies
- Publication number 20050022146
- Publication date Jan 27, 2005
- Telairity Semiconductor, Inc.
- Howard G. Sachs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Idle power reduction for state machines
- Publication number 20030140219
- Publication date Jul 24, 2003
- Telairity Semiconductor, Inc.
- Howard G. Sachs
- G05 - CONTROLLING REGULATING

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Trademarklast 30 trademarks

Information Trademark
78144682 - TELAIRITY
- Serial number 78144682
- Registration number 3121352
- Filing date Jul 17, 2002
- Telairity Semiconductor, Inc.
- 9 - Scientific, nautical, surveying, photographic, cinematographic, optical, weighing, measuring, signalling, checking (supervision), life-saving and teaching apparatus and instruments

Telairity Semiconductor, Inc.

Organization

Patents Grantslast 30 patents

Power grid layout techniques on integrated circuits

Stream data interface for processing system

High speed data access memory arrays

Circuit group design methodologies

System for repair of ROM programming errors or defects

Idle power reduction for state machines

Power grid layout techniques on integrated circuits

Circuit group design methodologies

Patents Applicationslast 30 patents

Minimized Table Lookup

Convolver Architecture for Vector Processor

Instructions for Vector Processor

Memory architecture for vector processor

Vector Processor Architecture

Multi-Pipe Vector Block Matching Operations

Vector processor with multi-pipe vector block matching

High speed data access memory arrays

Vector processor with special purpose registers and high speed memo...

Method and apparatus for clock synchronization between a processor...

Direct memory access (DMA) method and apparatus and DMA for video p...

Power grid layout techniques on integrated circuits

System for repair of ROM programming errors or defects

Circuit group design methodologies

Power grid layout techniques on integrated circuits

Circuit group design methodologies

Idle power reduction for state machines

Trademarklast 30 trademarks

78144682 - TELAIRITY