Ternarylogic LLC

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Morristown, NJ, US

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Patents Grantslast 30 patents

Information Patent Grant
Cryptographic machines characterized by a Finite Lab-Transform (FLT)
- Patent number 11,336,425
- Issue date May 17, 2022
- Ternarylogic LLC
- Peter Lablans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cryptographic computer machines with novel switching devices
- Patent number 11,093,213
- Issue date Aug 17, 2021
- Ternarylogic LLC
- Peter Lablans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for validating a transaction between a plurali...
- Patent number 10,650,373
- Issue date May 12, 2020
- Ternarylogic LLC
- Peter Lablans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cryptographic machines with N-state lab-transformed switching devices
- Patent number 10,515,567
- Issue date Dec 24, 2019
- Ternarylogic LLC
- Peter Lablans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for wirelessly activating a remote mechanism
- Patent number 10,375,252
- Issue date Aug 6, 2019
- Ternarylogic LLC
- Peter Lablans
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Apparatus for unconventional non-linear feedback shift registers (N...
- Patent number 10,084,593
- Issue date Sep 25, 2018
- Ternarylogic LLC
- Peter Lablans
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Methods and systems for determining characteristics of a sequence o...
- Patent number 9,298,423
- Issue date Mar 29, 2016
- Ternarylogic LLC
- Peter Lablans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
N-valued shift registers with inverter reduced feedback logic funct...
- Patent number 9,218,158
- Issue date Dec 22, 2015
- Ternarylogic LLC
- Peter Lablans
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Error correction by symbol reconstruction in binary and multi-value...
- Patent number 9,203,438
- Issue date Dec 1, 2015
- Ternarylogic LLC
- Peter Lablans
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Error correction in multi-valued (p,k) codes
- Patent number 9,203,436
- Issue date Dec 1, 2015
- Ternarylogic LLC
- Peter Lablans
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for rapid synchronization of shift register re...
- Patent number 9,100,166
- Issue date Aug 4, 2015
- Ternarylogic LLC
- Peter Lablans
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Multi-state symbol error correction in matrix based codes
- Patent number 8,832,523
- Issue date Sep 9, 2014
- Ternarylogic LLC
- Peter Lablans
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for rapid synchronization of shift register re...
- Patent number 8,817,928
- Issue date Aug 26, 2014
- Ternarylogic LLC
- Peter Lablans
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Methods and systems for rapid error correction by forward and rever...
- Patent number 8,645,803
- Issue date Feb 4, 2014
- Ternarylogic LLC
- Peter Lablans
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Ternary and multi-value digital signal scramblers, decramblers and...
- Patent number 8,589,466
- Issue date Nov 19, 2013
- Ternarylogic LLC
- Peter Lablans
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Methods and apparatus in alternate finite field based coders and de...
- Patent number 8,577,026
- Issue date Nov 5, 2013
- Ternarylogic LLC
- Peter Lablans
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Generation and detection of non-binary digital sequences
- Patent number 8,374,289
- Issue date Feb 12, 2013
- Ternarylogic LLC
- Peter Lablans
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Methods and systems for processing of n-state symbols with XOR and...
- Patent number 8,364,977
- Issue date Jan 29, 2013
- Ternarylogic LLC
- Peter Lablans
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Methods and systems for N-state signal processing with binary devices
- Patent number 8,345,873
- Issue date Jan 1, 2013
- Ternarylogic LLC
- Peter Lablans
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Multi-valued scrambling and descrambling of digital data on optical...
- Patent number 8,225,147
- Issue date Jul 17, 2012
- Ternarylogic LLC
- Peter Lablans
- G11 - INFORMATION STORAGE
Information Patent Grant
Multi-value digital calculating circuits, including multipliers
- Patent number 8,209,370
- Issue date Jun 26, 2012
- Ternarylogic LLC
- Peter Lablans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data encryption and decryption with a key by an N-state inverter mo...
- Patent number 8,149,143
- Issue date Apr 3, 2012
- Ternarylogic LLC
- Peter Lablans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Symbol reconstruction in Reed-Solomon codes
- Patent number 8,103,943
- Issue date Jan 24, 2012
- Ternarylogic LLC
- Peter Lablans
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Error correcting decoding for convolutional and recursive systemati...
- Patent number 7,877,670
- Issue date Jan 25, 2011
- Ternarylogic LLC
- Peter Lablans
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Ternary and higher multi-value digital scramblers/descramblers
- Patent number 7,864,079
- Issue date Jan 4, 2011
- Ternarylogic LLC
- Peter Lablans
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Methods and systems for modifying the statistical distribution of s...
- Patent number 7,864,087
- Issue date Jan 4, 2011
- Ternarylogic LLC
- Peter Lablans
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Multi-state latches from n-state reversible inverters
- Patent number 7,782,089
- Issue date Aug 24, 2010
- Ternarylogic LLC
- Peter Lablans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-valued scrambling and descrambling of digital data on optical...
- Patent number 7,725,779
- Issue date May 25, 2010
- Ternarylogic LLC
- Peter Lablans
- G11 - INFORMATION STORAGE
Information Patent Grant
Implementing logic functions with non-magnitude based physical phen...
- Patent number 7,696,785
- Issue date Apr 13, 2010
- Ternarylogic LLC
- Peter Lablans
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Methods and systems for modifying the statistical distribution of s...
- Patent number 7,659,839
- Issue date Feb 9, 2010
- Ternarylogic LLC
- Peter Lablans
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
Methods and Systems for Rapid Error Location in Reed-Solomon Codes
- Publication number 20130145237
- Publication date Jun 6, 2013
- Ternarylogic LLC
- Peter Lablans
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Methods and Systems for Rapid Error Location in Reed-Solomon Codes
- Publication number 20120233527
- Publication date Sep 13, 2012
- Ternarylogic LLC
- Peter Lablans
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Method and Apparatus for Rapid Synchronization of Shift Register Re...
- Publication number 20110293062
- Publication date Dec 1, 2011
- Ternarylogic LLC
- Peter Lablans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Methods and Systems for Rapid Error Correction by Forward and Rever...
- Publication number 20110276854
- Publication date Nov 10, 2011
- Ternarylogic LLC
- Peter Lablans
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Methods and Systems for Rapid Error Correction of Reed-Solomon Codes
- Publication number 20110214038
- Publication date Sep 1, 2011
- Ternarylogic LLC
- Peter Lablans
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
ENCIPHERMENT OF DIGITAL SEQUENCES BY REVERSIBLE TRANSPOSITION METHODS
- Publication number 20110182421
- Publication date Jul 28, 2011
- Ternarylogic LLC
- Peter Lablans
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Ternary and Multi-Value Digital Signal Scramblers, Decramblers and...
- Publication number 20110170697
- Publication date Jul 14, 2011
- Ternarylogic LLC
- Peter Lablans
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Methods and Apparatus in Alternate Finite Field Based Coders and De...
- Publication number 20110064214
- Publication date Mar 17, 2011
- Ternarylogic LLC
- Peter Lablans
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
TERNARY AND HIGHER MULTI-VALUE DIGITAL SCRAMBLERS/DESCRAMBLERS
- Publication number 20100322414
- Publication date Dec 23, 2010
- Ternarylogic LLC
- Peter Lablans
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Methods and Systems for Error-Correction in Convolutional and Syste...
- Publication number 20100299579
- Publication date Nov 25, 2010
- Ternarylogic LLC
- Peter Lablans
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
N-State Ripple Adder Scheme Coding with Corresponding N-State Rippl...
- Publication number 20100271243
- Publication date Oct 28, 2010
- Ternarylogic LLC
- Peter Lablans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi-Valued Scrambling and Descrambling of Digital Data on Optical...
- Publication number 20100211803
- Publication date Aug 19, 2010
- Ternarylogic LLC
- Peter Lablans
- G11 - INFORMATION STORAGE
Information Patent Application
Generation and Self-Synchronizing Detection of Sequences Using Addr...
- Publication number 20100180097
- Publication date Jul 15, 2010
- Ternarylogic LLC
- Peter Lablans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Implementing Logic Functions With Non-Magnitude Based Physical Phen...
- Publication number 20100164548
- Publication date Jul 1, 2010
- Ternarylogic LLC
- Peter Lablans
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Multi-Value Digital Calculating Circuits, Including Multipliers
- Publication number 20090234900
- Publication date Sep 17, 2009
- Ternarylogic LLC
- Peter Lablans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multi-State Symbol Error Correction in Matrix Based Codes
- Publication number 20090172501
- Publication date Jul 2, 2009
- Ternarylogic LLC
- Peter Lablans
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Ternary and Multi-Value Digital Signal Scramblers, Descramblers and...
- Publication number 20070110229
- Publication date May 17, 2007
- Ternarylogic, LLC
- Peter Lablans
- H03 - BASIC ELECTRONIC CIRCUITRY

Ternarylogic LLC

Organization

Patents Grantslast 30 patents

Cryptographic machines characterized by a Finite Lab-Transform (FLT)

Cryptographic computer machines with novel switching devices

Method and apparatus for validating a transaction between a plurali...

Cryptographic machines with N-state lab-transformed switching devices

Method and apparatus for wirelessly activating a remote mechanism

Apparatus for unconventional non-linear feedback shift registers (N...

Methods and systems for determining characteristics of a sequence o...

N-valued shift registers with inverter reduced feedback logic funct...

Error correction by symbol reconstruction in binary and multi-value...

Error correction in multi-valued (p,k) codes

Method and apparatus for rapid synchronization of shift register re...

Multi-state symbol error correction in matrix based codes

Method and apparatus for rapid synchronization of shift register re...

Methods and systems for rapid error correction by forward and rever...

Ternary and multi-value digital signal scramblers, decramblers and...

Methods and apparatus in alternate finite field based coders and de...

Generation and detection of non-binary digital sequences

Methods and systems for processing of n-state symbols with XOR and...

Methods and systems for N-state signal processing with binary devices

Multi-valued scrambling and descrambling of digital data on optical...

Multi-value digital calculating circuits, including multipliers

Data encryption and decryption with a key by an N-state inverter mo...

Symbol reconstruction in Reed-Solomon codes

Error correcting decoding for convolutional and recursive systemati...

Ternary and higher multi-value digital scramblers/descramblers

Methods and systems for modifying the statistical distribution of s...

Multi-state latches from n-state reversible inverters

Multi-valued scrambling and descrambling of digital data on optical...

Implementing logic functions with non-magnitude based physical phen...

Methods and systems for modifying the statistical distribution of s...

Patents Applicationslast 30 patents

Methods and Systems for Rapid Error Location in Reed-Solomon Codes

Methods and Systems for Rapid Error Location in Reed-Solomon Codes

Method and Apparatus for Rapid Synchronization of Shift Register Re...

Methods and Systems for Rapid Error Correction by Forward and Rever...

Methods and Systems for Rapid Error Correction of Reed-Solomon Codes

ENCIPHERMENT OF DIGITAL SEQUENCES BY REVERSIBLE TRANSPOSITION METHODS

Ternary and Multi-Value Digital Signal Scramblers, Decramblers and...

Methods and Apparatus in Alternate Finite Field Based Coders and De...

TERNARY AND HIGHER MULTI-VALUE DIGITAL SCRAMBLERS/DESCRAMBLERS

Methods and Systems for Error-Correction in Convolutional and Syste...

N-State Ripple Adder Scheme Coding with Corresponding N-State Rippl...

Multi-Valued Scrambling and Descrambling of Digital Data on Optical...

Generation and Self-Synchronizing Detection of Sequences Using Addr...

Implementing Logic Functions With Non-Magnitude Based Physical Phen...

Multi-Value Digital Calculating Circuits, Including Multipliers

Multi-State Symbol Error Correction in Matrix Based Codes

Ternary and Multi-Value Digital Signal Scramblers, Descramblers and...

Trademarklast 30 trademarks