WAFER-LEVEL PACKAGING PORTFOLIO LLC

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Cupertino, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
Method for packing semiconductor components and product produced ac...
- Patent number 8,420,445
- Issue date Apr 16, 2013
- Wafer-Level Packaging Portfolio LLC
- Juergen Leib
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for packaging electronic devices and integrated circuits
- Patent number 8,399,293
- Issue date Mar 19, 2013
- Wafer-Level Packaging Portfolio LLC
- Juergen Leib
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Process for making contact with and housing integrated circuits
- Patent number 8,349,707
- Issue date Jan 8, 2013
- Wafer-Level Packaging Portfolio LLC
- Dipl.-Ing. Florian Bieck
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Process for packaging components, and packaged components
- Patent number 8,309,384
- Issue date Nov 13, 2012
- Wafer-Level Packaging Portfolio LLC
- Juergen Leib
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for producing electronic components
- Patent number 8,114,304
- Issue date Feb 14, 2012
- Wafer-Level Packaging Portfolio LLC
- Jürgen Leib
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method for packaging electronic devices and integrated circuits
- Patent number 8,017,435
- Issue date Sep 13, 2011
- Wafer-Level Packaging Portfolio LLC
- Juergen Leib
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Grant
Process for making contact with and housing integrated circuits
- Patent number 7,880,179
- Issue date Feb 1, 2011
- Wafer-Level Packaging Portfolio LLC
- Dipl.-Ing. Florian Bieck
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor with bottom-side wrap-around flange contact
- Patent number 7,858,512
- Issue date Dec 28, 2010
- Wafer-Level Packaging Portfolio LLC
- Phil P. Marcoux
- C07 - ORGANIC CHEMISTRY

Patents Applicationslast 30 patents

Information Patent Application
Process for Making Contact with and Housing Integrated Circuits
- Publication number 20130137259
- Publication date May 30, 2013
- WAFER-LEVEL PACKAGING PORTFOLIO LLC
- Florian Bieck
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for Packaging Electronic Devices and Integrated Circuits
- Publication number 20120003791
- Publication date Jan 5, 2012
- WAFER-LEVEL PACKAGING PORTFOLIO LLC
- Juergen Leib
- B81 - MICRO-STRUCTURAL TECHNOLOGY
Information Patent Application
Dual Interconnection in Stacked Memory and Controller Module
- Publication number 20110169171
- Publication date Jul 14, 2011
- WAFER-LEVEL PACKAGING PORTFOLIO LLC
- Phil P. Marcoux
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Semiconductor with Bottom-Side Wrap-Around Flange Contact
- Publication number 20100327448
- Publication date Dec 30, 2010
- WAFER-LEVEL PACKAGING PORTFOLIO LLC
- Phil P. Marcoux
- C08 - ORGANIC MACROMOLECULAR COMPOUNDS THEIR PREPARATION OR CHEMICAL WORKING-...
Information Patent Application
Dual Interconnection in Stacked Memory and Controller Module
- Publication number 20100270668
- Publication date Oct 28, 2010
- WAFER-LEVEL PACKAGING PORTFOLIO LLC
- Phil P. Marcoux
- H01 - BASIC ELECTRIC ELEMENTS

WAFER-LEVEL PACKAGING PORTFOLIO LLC

Organization

Patents Grantslast 30 patents

Method for packing semiconductor components and product produced ac...

Method for packaging electronic devices and integrated circuits

Process for making contact with and housing integrated circuits

Process for packaging components, and packaged components

Method for producing electronic components

Method for packaging electronic devices and integrated circuits

Process for making contact with and housing integrated circuits

Semiconductor with bottom-side wrap-around flange contact

Patents Applicationslast 30 patents

Process for Making Contact with and Housing Integrated Circuits

Method for Packaging Electronic Devices and Integrated Circuits

Dual Interconnection in Stacked Memory and Controller Module

Semiconductor with Bottom-Side Wrap-Around Flange Contact

Dual Interconnection in Stacked Memory and Controller Module

Trademarklast 30 trademarks