Aamir A. Farooqui

Person

Mountain View, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method and apparatus for a low energy programmable vector processin...
- Patent number 10,884,736
- Issue date Jan 5, 2021
- Cadence Design Systems, Inc.
- Aamir Alam Farooqui
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for a low-power processing architecture
- Patent number 10,162,632
- Issue date Dec 25, 2018
- Cadence Design Systems, Inc.
- Aamir A. Farooqui
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Universal shifter and rotator and methods for implementing a univer...
- Patent number 9,880,810
- Issue date Jan 30, 2018
- Cadence Design Systems, Inc.
- David L. Heine
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Universal single instruction multiple data multiplier and wide accu...
- Patent number 9,519,460
- Issue date Dec 13, 2016
- Cadence Design Systems, Inc.
- Aamir A. Farooqui
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Encryption processor for performing accelerated computations to est...
- Patent number 7,509,486
- Issue date Mar 24, 2009
- Broadcom Corporation
- David K. Chin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High performance universal multiplier circuit
- Patent number 6,353,843
- Issue date Mar 5, 2002
- Sony Corporation of Japan
- Farzad Chehrazi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiplier circuit having an optimized booth encoder/selector
- Patent number 6,301,599
- Issue date Oct 9, 2001
- Sony Corporation of Japan
- Farzad Chehrazi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Partitioned shift right logic circuit having rounding support
- Patent number 6,243,728
- Issue date Jun 5, 2001
- Sony Corporation of Japan
- Aamir Alam Farooqui
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
SAME INSTRUCTION DIFFERENT OPERATION (SIDO) COMPUTER WITH SHORT INS...
- Publication number 20090031117
- Publication date Jan 29, 2009
- Aamir A. Farooqui
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTICORE WIRELESS AND MEDIA SIGNAL PROCESSOR (MSP)
- Publication number 20080288728
- Publication date Nov 20, 2008
- Aamir A. Farooqui
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multiplexer based parallel n-bit adder circuit for high speed proce...
- Publication number 20020143841
- Publication date Oct 3, 2002
- Sony Corporation and Sony Electronics, Inc.
- Aamir A. Farooqui
- G06 - COMPUTING CALCULATING COUNTING

Aamir A. Farooqui

Person

Patents Grantslast 30 patents

Method and apparatus for a low energy programmable vector processin...

System and method for a low-power processing architecture

Universal shifter and rotator and methods for implementing a univer...

Universal single instruction multiple data multiplier and wide accu...

Encryption processor for performing accelerated computations to est...

High performance universal multiplier circuit

Multiplier circuit having an optimized booth encoder/selector

Partitioned shift right logic circuit having rounding support

Patents Applicationslast 30 patents

SAME INSTRUCTION DIFFERENT OPERATION (SIDO) COMPUTER WITH SHORT INS...

MULTICORE WIRELESS AND MEDIA SIGNAL PROCESSOR (MSP)

Multiplexer based parallel n-bit adder circuit for high speed proce...