Aaron D. LILAK

Person

Beaverton, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Fin doping and integrated circuit structures resulting therefrom
- Patent number 12,199,098
- Issue date Jan 14, 2025
- Intel Corporation
- Aaron D. Lilak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stacked source-drain-gate connection and process for forming such
- Patent number 12,148,806
- Issue date Nov 19, 2024
- Intel Corporation
- Ehren Mannebach
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interconnect techniques for electrically connecting source/drain re...
- Patent number 12,107,085
- Issue date Oct 1, 2024
- Intel Corporation
- Aaron D. Lilak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Vertically stacked finFETs and shared gate patterning
- Patent number 12,100,623
- Issue date Sep 24, 2024
- Intel Corporation
- Aaron Lilak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Backside contacts for semiconductor devices
- Patent number 12,080,605
- Issue date Sep 3, 2024
- Intel Corporation
- Aaron D. Lilak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stacked transistors
- Patent number 12,057,494
- Issue date Aug 6, 2024
- Intel Corporation
- Patrick Morrow
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
PN-body-tied field effect transistors
- Patent number 12,051,723
- Issue date Jul 30, 2024
- Intel Corporation
- Aaron D. Lilak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Isolation wall stressor structures to improve channel stress and th...
- Patent number 12,033,896
- Issue date Jul 9, 2024
- Intel Corporation
- Aaron D. Lilak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Epitaxial layer with substantially parallel sides
- Patent number 12,020,929
- Issue date Jun 25, 2024
- Intel Corporation
- Cheng-Ying Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Leave-behind protective layer having secondary purpose
- Patent number 11,996,408
- Issue date May 28, 2024
- Intel Corporation
- Aaron D. Lilak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Sideways vias in isolation areas to contact interior layers in stac...
- Patent number 11,942,416
- Issue date Mar 26, 2024
- Intel Corporation
- Ehren Mannebach
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Non-silicon N-type and P-type stacked transistors for integrated ci...
- Patent number 11,935,891
- Issue date Mar 19, 2024
- Intel Corporation
- Gilbert Dewey
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Backside contact structures and fabrication for metal on both sides...
- Patent number 11,935,933
- Issue date Mar 19, 2024
- Intel Corporation
- Patrick Morrow
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stacked source-drain-gate connection and process for forming such
- Patent number 11,916,118
- Issue date Feb 27, 2024
- Intel Corporation
- Ehren Mannebach
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stacked trigate transistors with dielectric isolation and process f...
- Patent number 11,894,372
- Issue date Feb 6, 2024
- Intel Corporation
- Willy Rachmady
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Back side processing of integrated circuit structures to form insul...
- Patent number 11,894,262
- Issue date Feb 6, 2024
- Intel Corporation
- Aaron D. Lilak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Metallization structures for stacked device connectivity and their...
- Patent number 11,869,894
- Issue date Jan 9, 2024
- Intel Corporation
- Aaron D. Lilak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Gate-all-around integrated circuit structures having insulator FIN...
- Patent number 11,862,702
- Issue date Jan 2, 2024
- Intel Corporation
- Aaron D. Lilak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
3D 1T1C stacked DRAM structure and method to fabricate
- Patent number 11,849,572
- Issue date Dec 19, 2023
- Intel Corporation
- Aaron Lilak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Gate-all-around integrated circuit structures having depopulated ch...
- Patent number 11,830,933
- Issue date Nov 28, 2023
- Intel Corporation
- Willy Rachmady
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Amorphization and regrowth of source-drain regions from the bottom-...
- Patent number 11,798,991
- Issue date Oct 24, 2023
- Intel Corporation
- Aaron Lilak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Capacitance reduction for semiconductor devices based on wafer bonding
- Patent number 11,798,838
- Issue date Oct 24, 2023
- Intel Corporation
- Ehren Mannebach
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Subfin leakage suppression using fixed charge
- Patent number 11,784,239
- Issue date Oct 10, 2023
- Intel Corporation
- Sean T. Ma
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Sidewall interconnect metallization structures for integrated circu...
- Patent number 11,776,898
- Issue date Oct 3, 2023
- Intel Corporation
- Aaron Lilak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Device including air gapping of gate spacers and other dielectrics...
- Patent number 11,769,814
- Issue date Sep 26, 2023
- Intel Corporation
- Ehren Mannebach
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Gate-all-around integrated circuit structures having depopulated ch...
- Patent number 11,764,263
- Issue date Sep 19, 2023
- Intel Corporation
- Ehren Mannebach
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Forming an oxide volume within a fin
- Patent number 11,764,104
- Issue date Sep 19, 2023
- Intel Corporation
- Cheng-Ying Huang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Interconnect techniques for electrically connecting source/drain re...
- Patent number 11,742,346
- Issue date Aug 29, 2023
- Intel Corporation
- Aaron D. Lilak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Stress compensation for wafer to wafer bonding
- Patent number 11,721,554
- Issue date Aug 8, 2023
- Intel Corporation
- Anant Jahagirdar
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Thin film transistors having U-shaped features
- Patent number 11,721,735
- Issue date Aug 8, 2023
- Intel Corporation
- Gilbert Dewey
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
BACKSIDE CONTACTS FOR SEMICONDUCTOR DEVICES
- Publication number 20240371700
- Publication date Nov 7, 2024
- Intel Corporation
- Aaron D. LILAK
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STACKED TRANSISTORS
- Publication number 20240332403
- Publication date Oct 3, 2024
- Intel Corporation
- Patrick MORROW
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT STRUCTURES WITH CAVITY SPACERS
- Publication number 20240186398
- Publication date Jun 6, 2024
- Intel Corporation
- Aaron D. LILAK
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
SIDEWAYS VIAS IN ISOLATION AREAS TO CONTACT INTERIOR LAYERS IN STAC...
- Publication number 20240162141
- Publication date May 16, 2024
- Intel Corporation
- Ehren MANNEBACH
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BACKSIDE CONTACT STRUCTURES AND FABRICATION FOR METAL ON BOTH SIDES...
- Publication number 20240154011
- Publication date May 9, 2024
- Intel Corporation
- Patrick MORROW
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STACKED SOURCE-DRAIN-GATE CONNECTION AND PROCESS FOR FORMING SUCH
- Publication number 20240145557
- Publication date May 2, 2024
- Intel Corporation
- Ehren MANNEBACH
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING INSULATOR FIN...
- Publication number 20240088254
- Publication date Mar 14, 2024
- Intel Corporation
- Aaron D. LILAK
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
3D 1T1C STACKED DRAM STRUCTURE AND METHOD TO FABRICATE
- Publication number 20240064958
- Publication date Feb 22, 2024
- Intel Corporation
- Aaron LILAK
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING DEPOPULATED CH...
- Publication number 20240047559
- Publication date Feb 8, 2024
- Intel Corporation
- Willy RACHMADY
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
AMORPHIZATION AND REGROWTH OF SOURCE-DRAIN REGIONS FROM THE BOTTOM-...
- Publication number 20240006489
- Publication date Jan 4, 2024
- Intel Corporation
- Aaron LILAK
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FORMING AN OXIDE VOLUME WITHIN A FIN
- Publication number 20230377947
- Publication date Nov 23, 2023
- Intel Corporation
- Cheng-Ying HUANG
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING DEPOPULATED CH...
- Publication number 20230369399
- Publication date Nov 16, 2023
- Intel Corporation
- Ehren Mannebach
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTERCONNECT TECHNIQUES FOR ELECTRICALLY CONNECTING SOURCE/DRAIN RE...
- Publication number 20230352481
- Publication date Nov 2, 2023
- Intel Corporation
- AARON D. LILAK
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BACKSIDE CONTACT STRUCTURES AND FABRICATION FOR METAL ON BOTH SIDES...
- Publication number 20230275135
- Publication date Aug 31, 2023
- Intel Corporation
- Patrick MORROW
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STACKED SOURCE-DRAIN-GATE CONNECTION AND PROCESS FOR FORMING SUCH
- Publication number 20230238436
- Publication date Jul 27, 2023
- Intel Corporation
- Ehren MANNEBACH
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STACKED TRIGATE TRANSISTORS WITH DIELECTRIC ISOLATION AND PROCESS F...
- Publication number 20230170350
- Publication date Jun 1, 2023
- Intel Corporation
- Willy RACHMADY
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BACK SIDE PROCESSING OF INTEGRATED CIRCUIT STRUCTURES TO FORM INSUL...
- Publication number 20230132053
- Publication date Apr 27, 2023
- Intel Corporation
- Aaron D. LILAK
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT STRUCTURES HAVING METAL-CONTAINING SOURCE OR DRA...
- Publication number 20230095007
- Publication date Mar 30, 2023
- Intel Corporation
- Rishabh MEHANDRU
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TRANSISTOR STRUCTURES WITH REDUCED SOURCE/DRAIN LEAKAGE THROUGH BAC...
- Publication number 20230097948
- Publication date Mar 30, 2023
- Intel Corporation
- Rishabh Mehandru
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
CMOS ARCHITECTURE WITH THERMALLY STABLE SILICIDE GATE WORKFUNCTION...
- Publication number 20230090092
- Publication date Mar 23, 2023
- Aaron D. Lilak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING DOPED SUBFIN
- Publication number 20230088753
- Publication date Mar 23, 2023
- Intel Corporation
- Stephen M. Cea
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
STACKED MEMORY STRUCTURE WITH DUAL-CHANNEL TRANSISTOR
- Publication number 20230081882
- Publication date Mar 16, 2023
- Intel Corporation
- Sean T. Ma
- G11 - INFORMATION STORAGE
Information Patent Application
STRUCTURES AND METHODS FOR MEMORY CELLS
- Publication number 20230057464
- Publication date Feb 23, 2023
- Intel Corporation
- Sean T. Ma
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
TRANSISTORS WITH SOURCE & DRAIN ETCH STOP
- Publication number 20220415708
- Publication date Dec 29, 2022
- Intel Corporation
- Rishabh Mehandru
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
BACKSIDE CONTACTS FOR SEMICONDUCTOR DEVICES
- Publication number 20220352032
- Publication date Nov 3, 2022
- Intel Corporation
- Aaron D. LILAK
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
ISOLATION WALL STRESSOR STRUCTURES TO IMPROVE CHANNEL STRESS AND TH...
- Publication number 20220352029
- Publication date Nov 3, 2022
- Intel Corporation
- Aaron D. Lilak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
METALLIZATION STRUCTURES FOR STACKED DEVICE CONNECTIVITY AND THEIR...
- Publication number 20220344376
- Publication date Oct 27, 2022
- Intel Corporation
- Aaron D. Lilak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
VERTICALLY STACKED FINFETS & SHARED GATE PATTERNING
- Publication number 20220336284
- Publication date Oct 20, 2022
- Intel Corporation
- Aaron Lilak
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
NON-SILICON N-TYPE AND P-TYPE STACKED TRANSISTORS FOR INTEGRATED CI...
- Publication number 20220310605
- Publication date Sep 29, 2022
- Intel Corporation
- Gilbert Dewey
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
FIN DOPING AND INTEGRATED CIRCUIT STRUCTURES RESULTING THEREFROM
- Publication number 20220310601
- Publication date Sep 29, 2022
- Intel Corporation
- Aaron D. LILAK
- H01 - BASIC ELECTRIC ELEMENTS

Aaron D. LILAK

Person

Patents Grantslast 30 patents

Fin doping and integrated circuit structures resulting therefrom

Stacked source-drain-gate connection and process for forming such

Interconnect techniques for electrically connecting source/drain re...

Vertically stacked finFETs and shared gate patterning

Backside contacts for semiconductor devices

Stacked transistors

PN-body-tied field effect transistors

Isolation wall stressor structures to improve channel stress and th...

Epitaxial layer with substantially parallel sides

Leave-behind protective layer having secondary purpose

Sideways vias in isolation areas to contact interior layers in stac...

Non-silicon N-type and P-type stacked transistors for integrated ci...

Backside contact structures and fabrication for metal on both sides...

Stacked source-drain-gate connection and process for forming such

Stacked trigate transistors with dielectric isolation and process f...

Back side processing of integrated circuit structures to form insul...

Metallization structures for stacked device connectivity and their...

Gate-all-around integrated circuit structures having insulator FIN...

3D 1T1C stacked DRAM structure and method to fabricate

Gate-all-around integrated circuit structures having depopulated ch...

Amorphization and regrowth of source-drain regions from the bottom-...

Capacitance reduction for semiconductor devices based on wafer bonding

Subfin leakage suppression using fixed charge

Sidewall interconnect metallization structures for integrated circu...

Device including air gapping of gate spacers and other dielectrics...

Gate-all-around integrated circuit structures having depopulated ch...

Forming an oxide volume within a fin

Interconnect techniques for electrically connecting source/drain re...

Stress compensation for wafer to wafer bonding

Thin film transistors having U-shaped features

Patents Applicationslast 30 patents

BACKSIDE CONTACTS FOR SEMICONDUCTOR DEVICES

STACKED TRANSISTORS

INTEGRATED CIRCUIT STRUCTURES WITH CAVITY SPACERS

SIDEWAYS VIAS IN ISOLATION AREAS TO CONTACT INTERIOR LAYERS IN STAC...

BACKSIDE CONTACT STRUCTURES AND FABRICATION FOR METAL ON BOTH SIDES...

STACKED SOURCE-DRAIN-GATE CONNECTION AND PROCESS FOR FORMING SUCH

GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING INSULATOR FIN...

3D 1T1C STACKED DRAM STRUCTURE AND METHOD TO FABRICATE

GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING DEPOPULATED CH...

AMORPHIZATION AND REGROWTH OF SOURCE-DRAIN REGIONS FROM THE BOTTOM-...

FORMING AN OXIDE VOLUME WITHIN A FIN

GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING DEPOPULATED CH...

INTERCONNECT TECHNIQUES FOR ELECTRICALLY CONNECTING SOURCE/DRAIN RE...

BACKSIDE CONTACT STRUCTURES AND FABRICATION FOR METAL ON BOTH SIDES...

STACKED SOURCE-DRAIN-GATE CONNECTION AND PROCESS FOR FORMING SUCH

STACKED TRIGATE TRANSISTORS WITH DIELECTRIC ISOLATION AND PROCESS F...

BACK SIDE PROCESSING OF INTEGRATED CIRCUIT STRUCTURES TO FORM INSUL...

INTEGRATED CIRCUIT STRUCTURES HAVING METAL-CONTAINING SOURCE OR DRA...

TRANSISTOR STRUCTURES WITH REDUCED SOURCE/DRAIN LEAKAGE THROUGH BAC...

CMOS ARCHITECTURE WITH THERMALLY STABLE SILICIDE GATE WORKFUNCTION...

GATE-ALL-AROUND INTEGRATED CIRCUIT STRUCTURES HAVING DOPED SUBFIN

STACKED MEMORY STRUCTURE WITH DUAL-CHANNEL TRANSISTOR

STRUCTURES AND METHODS FOR MEMORY CELLS

TRANSISTORS WITH SOURCE & DRAIN ETCH STOP

BACKSIDE CONTACTS FOR SEMICONDUCTOR DEVICES

ISOLATION WALL STRESSOR STRUCTURES TO IMPROVE CHANNEL STRESS AND TH...

METALLIZATION STRUCTURES FOR STACKED DEVICE CONNECTIVITY AND THEIR...

VERTICALLY STACKED FINFETS & SHARED GATE PATTERNING

NON-SILICON N-TYPE AND P-TYPE STACKED TRANSISTORS FOR INTEGRATED CI...

FIN DOPING AND INTEGRATED CIRCUIT STRUCTURES RESULTING THEREFROM