Abhay S. Dixit

Person

Boise, ID, US

People

Patents Grantslast 30 patents

Information Patent Grant
Data communication apparatus with receiver employing transmitter su...
- Patent number 12,362,841
- Issue date Jul 15, 2025
- QUALCOMM Incorporated
- Ying Duan
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Radio frequency interference common mode injection in a C-PHY receiver
- Patent number 12,353,350
- Issue date Jul 8, 2025
- QUALCOMM Incorporated
- Panchami Devashya Shivarama
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
C-PHY receiver with self-regulated common mode servo loop
- Patent number 11,764,733
- Issue date Sep 19, 2023
- QUALCOMM Incorporated
- Shih-Wei Chou
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
C-PHY data-triggered edge generation with intrinsic half-rate opera...
- Patent number 11,327,914
- Issue date May 10, 2022
- QUALCOMM Incorporated
- Da Ying
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Seperation of low-power and high-speed analog front-end receivers
- Patent number 11,106,610
- Issue date Aug 31, 2021
- QUALCOMM Incorporated
- Ying Duan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Open-loop, super fast, half-rate clock and data recovery for next g...
- Patent number 11,038,666
- Issue date Jun 15, 2021
- QUALCOMM Incorporated
- Ying Duan
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Fully compensated complementary duty cycle correction circuits
- Patent number 10,615,785
- Issue date Apr 7, 2020
- QUALCOMM Incorporated
- Shih-Wei Chou
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
C-PHY training pattern for adaptive equalization, adaptive edge tra...
- Patent number 10,419,246
- Issue date Sep 17, 2019
- QUALCOMM Incorporated
- Ying Duan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Calibration pattern and duty-cycle distortion correction for clock...
- Patent number 10,333,690
- Issue date Jun 25, 2019
- QUALCOMM Incorporated
- Ying Duan
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
C-PHY half-rate clock and data recovery adaptive edge tracking
- Patent number 10,033,519
- Issue date Jul 24, 2018
- QUALCOMM Incorporated
- Ying Duan
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus to serialize parallel data input values
- Patent number 8,405,426
- Issue date Mar 26, 2013
- QUALCOMM Incorporated
- Chulkyu Lee
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Low voltage differential signaling driver with programmable on-chip...
- Patent number 8,008,944
- Issue date Aug 30, 2011
- QUALCOMM Incorporated
- Abhay S. Dixit
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Techniques for reducing leakage current in memory devices
- Patent number 7,746,720
- Issue date Jun 29, 2010
- Micron Technology, Inc.
- Scott J. Derner
- G11 - INFORMATION STORAGE
Information Patent Grant
Systems and methods for performing off-chip data communications at...
- Patent number 7,692,565
- Issue date Apr 6, 2010
- QUALCOMM Incorporated
- Vivek Mohan
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Current mode interface for off-chip high speed communication
- Patent number 7,471,110
- Issue date Dec 30, 2008
- QUALCOMM Incorporated
- Abhay Dixit
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Circuit and method for reading an antifuse
- Patent number 7,327,628
- Issue date Feb 5, 2008
- Micron Technology, Inc.
- Dong Pan
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuit and method for reading an antifuse
- Patent number 7,327,629
- Issue date Feb 5, 2008
- Micron Technology, Inc.
- Dong Pan
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuit and method for reading an antifuse
- Patent number 7,277,349
- Issue date Oct 2, 2007
- Micron Technology, Inc.
- Dong Pan
- G11 - INFORMATION STORAGE
Information Patent Grant
Techniques for reducing leakage current in memory devices
- Patent number 7,245,548
- Issue date Jul 17, 2007
- Micron Technology, Inc.
- Scott J. Derner
- G11 - INFORMATION STORAGE
Information Patent Grant
Circuit and method for reading an antifuse
- Patent number 7,190,629
- Issue date Mar 13, 2007
- Micron Technology, Inc.
- Dong Pan
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
RADIO FREQUENCY INTERFERENCE COMMON MODE INJECTION IN A C-PHY RECEIVER
- Publication number 20250077462
- Publication date Mar 6, 2025
- QUALCOMM Incorporated
- Panchami DEVASHYA SHIVARAMA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DATA COMMUNICATION APPARATUS WITH RECEIVER EMPLOYING TRANSMITTER SU...
- Publication number 20250007628
- Publication date Jan 2, 2025
- QUALCOMM Incorporated
- Ying DUAN
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
C-PHY RECEIVER WITH SELF-REGULATED COMMON MODE SERVO LOOP
- Publication number 20230087897
- Publication date Mar 23, 2023
- QUALCOMM Incorporated
- Shih-Wei CHOU
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
OPEN-LOOP, SUPER FAST, HALF-RATE CLOCK AND DATA RECOVERY FOR NEXT G...
- Publication number 20210184829
- Publication date Jun 17, 2021
- QUALCOMM Incorporated
- Ying DUAN
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
ANALOG FRONT-END RECEIVERS
- Publication number 20210081339
- Publication date Mar 18, 2021
- QUALCOMM Incorporated
- Ying DUAN
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
C-PHY HALF-RATE CLOCK AND DATA RECOVERY ADAPTIVE EDGE TRACKING
- Publication number 20180131503
- Publication date May 10, 2018
- QUALCOMM Incorporated
- Ying Duan
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
C-PHY TRAINING PATTERN FOR ADAPTIVE EQUALIZATION, ADAPTIVE EDGE TRA...
- Publication number 20180062883
- Publication date Mar 1, 2018
- QUALCOMM Incorporated
- Ying Duan
- G01 - MEASURING TESTING
Information Patent Application
METHOD AND APPARATUS TO SERIALIZE PARALLEL DATA INPUT VALUES
- Publication number 20130181742
- Publication date Jul 18, 2013
- QUALCOMM Incorporated
- Chulkyu Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus to Sterialize Parallel Data Input Values
- Publication number 20110291703
- Publication date Dec 1, 2011
- QUALCOMM Incorporated
- Chulkyu Lee
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW VOLTAGE DIFFERENTIAL SIGNALING DRIVER WITH PROGRAMMABLE ON-CHIP...
- Publication number 20100127736
- Publication date May 27, 2010
- QUALCOMM Incorporated
- ABHAY S. DIXIT
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SYSTEMS AND METHODS FOR PERFORMING OFF-CHIP DATA COMMUNICATIONS AT...
- Publication number 20090021405
- Publication date Jan 22, 2009
- QUALCOMM Incorporated
- Vivek Mohan
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Techniques for reducing leakage current in memory devices
- Publication number 20070263470
- Publication date Nov 15, 2007
- Micron Technology, Inc.
- Scott J. Derner
- G11 - INFORMATION STORAGE
Information Patent Application
Current mode interface for off-chip high speed communication
- Publication number 20070099564
- Publication date May 3, 2007
- Abhay Dixit
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Circuit and method for reading an antifuse
- Publication number 20060285415
- Publication date Dec 21, 2006
- Dong Pan
- G11 - INFORMATION STORAGE
Information Patent Application
Circuit and method for reading an antifuse
- Publication number 20060285416
- Publication date Dec 21, 2006
- Dong Pan
- G11 - INFORMATION STORAGE
Information Patent Application
Circuit and method for reading an antifuse
- Publication number 20060280017
- Publication date Dec 14, 2006
- Dong Pan
- G11 - INFORMATION STORAGE
Information Patent Application
Circuit and method for reading an antifuse
- Publication number 20060176750
- Publication date Aug 10, 2006
- Dong Pan
- G11 - INFORMATION STORAGE
Information Patent Application
Techniques for reducing leakage current in memory devices
- Publication number 20060023542
- Publication date Feb 2, 2006
- Scott J. Derner
- G11 - INFORMATION STORAGE

Abhay S. Dixit

Person

Patents Grantslast 30 patents

Data communication apparatus with receiver employing transmitter su...

Radio frequency interference common mode injection in a C-PHY receiver

C-PHY receiver with self-regulated common mode servo loop

C-PHY data-triggered edge generation with intrinsic half-rate opera...

Seperation of low-power and high-speed analog front-end receivers

Open-loop, super fast, half-rate clock and data recovery for next g...

Fully compensated complementary duty cycle correction circuits

C-PHY training pattern for adaptive equalization, adaptive edge tra...

Calibration pattern and duty-cycle distortion correction for clock...

C-PHY half-rate clock and data recovery adaptive edge tracking

Method and apparatus to serialize parallel data input values

Low voltage differential signaling driver with programmable on-chip...

Techniques for reducing leakage current in memory devices

Systems and methods for performing off-chip data communications at...

Current mode interface for off-chip high speed communication

Circuit and method for reading an antifuse

Circuit and method for reading an antifuse

Circuit and method for reading an antifuse

Techniques for reducing leakage current in memory devices

Circuit and method for reading an antifuse

Patents Applicationslast 30 patents

RADIO FREQUENCY INTERFERENCE COMMON MODE INJECTION IN A C-PHY RECEIVER

DATA COMMUNICATION APPARATUS WITH RECEIVER EMPLOYING TRANSMITTER SU...

C-PHY RECEIVER WITH SELF-REGULATED COMMON MODE SERVO LOOP

OPEN-LOOP, SUPER FAST, HALF-RATE CLOCK AND DATA RECOVERY FOR NEXT G...

ANALOG FRONT-END RECEIVERS

C-PHY HALF-RATE CLOCK AND DATA RECOVERY ADAPTIVE EDGE TRACKING

C-PHY TRAINING PATTERN FOR ADAPTIVE EQUALIZATION, ADAPTIVE EDGE TRA...

METHOD AND APPARATUS TO SERIALIZE PARALLEL DATA INPUT VALUES

Method and Apparatus to Sterialize Parallel Data Input Values

LOW VOLTAGE DIFFERENTIAL SIGNALING DRIVER WITH PROGRAMMABLE ON-CHIP...

SYSTEMS AND METHODS FOR PERFORMING OFF-CHIP DATA COMMUNICATIONS AT...

Techniques for reducing leakage current in memory devices

Current mode interface for off-chip high speed communication

Circuit and method for reading an antifuse

Circuit and method for reading an antifuse

Circuit and method for reading an antifuse

Circuit and method for reading an antifuse

Techniques for reducing leakage current in memory devices