Adalberto G. Yanes

Person

Sugar Land, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Increased garbage collection granularity for non-volatile memory
- Patent number 12,204,444
- Issue date Jan 21, 2025
- International Business Machines Corporation
- Adalberto Guillermo Yanes
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Generating multi-plane reads to read pages on planes of a storage d...
- Patent number 11,880,300
- Issue date Jan 23, 2024
- International Business Machines Corporation
- Adalberto Guillermo Yanes
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Increased read performance for implementations having multiple inte...
- Patent number 11,816,046
- Issue date Nov 14, 2023
- International Business Machines Corporation
- Adalberto Guillermo Yanes
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Mirroring data in write caches of a controller of a non-volatile me...
- Patent number 11,656,792
- Issue date May 23, 2023
- International Business Machines Corporation
- Roman Alexander Pletka
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reducing effects of read array operations of read apparent voltage
- Patent number 11,086,565
- Issue date Aug 10, 2021
- International Business Machines Corporation
- Kevin E. Sallese
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Determining a read apparent voltage infector page and infected page
- Patent number 10,770,155
- Issue date Sep 8, 2020
- International Business Machines Corporation
- Timothy Fisher
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reducing read errors by performing mitigation reads to blocks of no...
- Patent number 10,489,086
- Issue date Nov 26, 2019
- International Business Machines Corporation
- Adalberto G. Yanes
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Peripheral component interconnect express (PCIE) pseudo-virtual cha...
- Patent number 10,229,076
- Issue date Mar 12, 2019
- International Business Machines Corporation
- Eric N. Lais
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Peripheral component interconnect express (PCIE) pseudo-virtual cha...
- Patent number 10,133,694
- Issue date Nov 20, 2018
- International Business Machines Corporation
- Eric N. Lais
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Accelerated non-volatile memory recirculation processing
- Patent number 9,971,517
- Issue date May 15, 2018
- International Business Machines Corporation
- Timothy J. Fisher
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Validation bits and offsets to represent logical pages split betwee...
- Patent number 9,946,594
- Issue date Apr 17, 2018
- International Business Machines Corporation
- Charles J. Camp
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Validation bits and offsets to represent logical pages split betwee...
- Patent number 9,875,153
- Issue date Jan 23, 2018
- International Business Machines Corporation
- Charles J. Camp
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Validation bits and offsets to represent logical pages split betwee...
- Patent number 9,811,419
- Issue date Nov 7, 2017
- International Business Machines Corporation
- Charles J. Camp
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Accelerated non-volatile memory recirculation processing
- Patent number 9,652,157
- Issue date May 16, 2017
- International Business Machines Corporation
- Timothy J. Fisher
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Flash memory codeword architectures
- Patent number 9,483,350
- Issue date Nov 1, 2016
- International Business Machines Corporation
- Charles J. Camp
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Stalling of DMA operations in order to do memory migration using a...
- Patent number 8,621,120
- Issue date Dec 31, 2013
- International Business Machines Corporation
- Carl Alfred Bender
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hierarchical to physical bus translation
- Patent number 8,606,984
- Issue date Dec 10, 2013
- International Busines Machines Corporation
- William J. Armstrong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hierarchical to physical memory mapped input/output translation
- Patent number 8,364,879
- Issue date Jan 29, 2013
- International Business Machines Corporation
- William J. Armstrong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Translating a requester identifier to a chip identifier
- Patent number 8,327,055
- Issue date Dec 4, 2012
- International Business Machines Corporation
- William J. Armstrong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Physical to hierarchical bus translation
- Patent number 8,316,169
- Issue date Nov 20, 2012
- International Business Machines Corporation
- William J. Armstrong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for protocol enhancement of PCI express using a continue bit
- Patent number 8,135,923
- Issue date Mar 13, 2012
- International Business Machines Corporation
- Ryan S. Haraden
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Computer-implemented method, apparatus, and computer program produc...
- Patent number 7,734,843
- Issue date Jun 8, 2010
- International Business Machines Corporation
- Carl Alfred Bender
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data forwarding by host/PCI-X bridges with buffered packet size det...
- Patent number 6,968,418
- Issue date Nov 22, 2005
- International Business Machines Corporation
- Curtis Carl Wollbrink
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Clock generation for multiple secondary buses of a PCI bridge
- Patent number 6,963,990
- Issue date Nov 8, 2005
- International Business Machines Corporation
- Jonathan Michael Allen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Split completion performance of PCI-X bridges based on data transfe...
- Patent number 6,957,293
- Issue date Oct 18, 2005
- International Business Machines Corporation
- Daniel Frank Moertl
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data transfer via Host/PCI-X bridges
- Patent number 6,931,473
- Issue date Aug 16, 2005
- International Business Machines Corporation
- Charles S. Graham
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Packet memory system
- Patent number 6,925,086
- Issue date Aug 2, 2005
- International Business Machines Corporation
- Michael William Curtis
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Accelerated error detection in a bus bridge circuit
- Patent number 6,766,405
- Issue date Jul 20, 2004
- International Business Machines Corporation
- Daniel Frank Moertl
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Transaction routing system
- Patent number 6,687,240
- Issue date Feb 3, 2004
- International Business Machines Corporation
- Daniel Frank Moertl
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Performance enhancement implementation through buffer management/br...
- Patent number 6,665,753
- Issue date Dec 16, 2003
- International Business Machines Corporation
- Pat Allen Buckland
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
INCREASED GARBAGE COLLECTION GRANULARITY FOR NON-VOLATILE MEMORY
- Publication number 20230281121
- Publication date Sep 7, 2023
- International Business Machines Corporation
- Adalberto Guillermo Yanes
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GENERATING MULTI-PLANE READS TO READ PAGES ON PLANES OF A STORAGE D...
- Publication number 20230281119
- Publication date Sep 7, 2023
- International Business Machines Corporation
- Adalberto Guillermo Yanes
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INCREASED READ PERFORMANCE FOR IMPLEMENTATIONS HAVING MULTIPLE INTE...
- Publication number 20230273886
- Publication date Aug 31, 2023
- International Business Machines Corporation
- Adalberto Guillermo Yanes
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MIRRORING DATA IN WRITE CACHES OF A CONTROLLER OF A NON-VOLATILE ME...
- Publication number 20220413762
- Publication date Dec 29, 2022
- International Business Machines Corporation
- ROMAN ALEXANDER PLETKA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DETERMINING A READ APPARENT VOLTAGE INFECTOR PAGE AND INFECTED PAGE
- Publication number 20200117371
- Publication date Apr 16, 2020
- Timothy Fisher
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REDUCING EFFECTS OF READ ARRAY OPERATIONS OF READ APPARENT VOLTAGE
- Publication number 20200104071
- Publication date Apr 2, 2020
- International Business Machines Corporation
- Kevin E. Sallese
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REDUCING READ ERRORS BY PERFORMING MITIGATION READS TO BLOCKS OF NO...
- Publication number 20190339902
- Publication date Nov 7, 2019
- International Business Machines Corporation
- ADALBERTO G. YANES
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ACCELERATED NON-VOLATILE MEMORY RECIRCULATION PROCESSING
- Publication number 20170192677
- Publication date Jul 6, 2017
- International Business Machines Corporation
- Timothy J. Fisher
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FLASH MEMORY CODEWORD ARCHITECTURES
- Publication number 20170123893
- Publication date May 4, 2017
- International Business Machines Corporation
- Charles J. Camp
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FLASH MEMORY CODEWORD ARCHITECTURES
- Publication number 20170123895
- Publication date May 4, 2017
- International Business Machines Corporation
- Charles J. Camp
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PERIPHERAL COMPONENT INTERCONNECT EXPRESS (PCIE) PSEUDO-VIRTUAL CHA...
- Publication number 20170068637
- Publication date Mar 9, 2017
- International Business Machines Corporation
- Eric N. LAIS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PERIPHERAL COMPONENT INTERCONNECT EXPRESS (PCIE) PSEUDO-VIRTUAL CHA...
- Publication number 20170068626
- Publication date Mar 9, 2017
- International Business Machines Corporation
- Eric N. LAIS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FLASH MEMORY CODEWORD ARCHITECTURES
- Publication number 20170052844
- Publication date Feb 23, 2017
- International Business Machines Corporation
- Charles J. Camp
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ACCELERATED NON-VOLATILE MEMORY RECIRCULATION PROCESSING
- Publication number 20160274801
- Publication date Sep 22, 2016
- International Business Machines Corporation
- Timothy J. Fisher
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PHYSICAL TO HIERARCHICAL BUS TRANSLATION
- Publication number 20110252167
- Publication date Oct 13, 2011
- International Business Machines Corporation
- William J. Armstrong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIERARCHICAL TO PHYSICAL BUS TRANSLATION
- Publication number 20110252170
- Publication date Oct 13, 2011
- International Business Machines Corporation
- William J. Armstrong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TRANSLATING A REQUESTER IDENTIFIER TO A CHIP IDENTIFIER
- Publication number 20110252173
- Publication date Oct 13, 2011
- International Business Machines Corporation
- William J. Armstrong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIERARCHICAL TO PHYSICAL MEMORY MAPPED INPUT/OUTPUT TRANSLATION
- Publication number 20110252174
- Publication date Oct 13, 2011
- International Business Machines Corporation
- William J. Armstrong
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for Creating Data Transfer Packets With Embedded Management...
- Publication number 20080313240
- Publication date Dec 18, 2008
- Ronald E. Freking
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Protocol Enhancement for PCI Express
- Publication number 20080267001
- Publication date Oct 30, 2008
- Ryan S. Haraden
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Apparatus for Enabling Virtual Channels Within A Periphe...
- Publication number 20080052431
- Publication date Feb 28, 2008
- Ronald E. Freking
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPUTER-IMPLEMENTED METHOD, APPARATUS, AND COMPUTER PROGRAM PRODUC...
- Publication number 20080005383
- Publication date Jan 3, 2008
- Carl Alfred Bender
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
STALLING OF DMA OPERATIONS IN ORDER TO DO MEMORY MIGRATION USING A...
- Publication number 20070260768
- Publication date Nov 8, 2007
- Carl Alfred Bender
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Data transfer via Host/PXCI-X bridges
- Publication number 20040015636
- Publication date Jan 22, 2004
- International Business Machines Corporation
- Charles S. Graham
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Split completion performance of PCI-X bridges
- Publication number 20030196019
- Publication date Oct 16, 2003
- International Business Machines Corporation
- Daniel Frank Moertl
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Data forwarding by host/PCI-X bridges
- Publication number 20030196020
- Publication date Oct 16, 2003
- International Business Machines Corporation
- Curtis Carl Wollbrink
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Accelerated error detection in a bus bridge circuit
- Publication number 20030188055
- Publication date Oct 2, 2003
- International Business Machines Corporation
- Daniel Frank Moertl
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Clock generation for multiple secondary buses of a PCI bridge
- Publication number 20030149825
- Publication date Aug 7, 2003
- International Business Machines Corporation
- Jonathan Michael Allen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Packet memory system
- Publication number 20020071441
- Publication date Jun 13, 2002
- Michael William Curtis
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Adalberto G. Yanes

Person

Patents Grantslast 30 patents

Increased garbage collection granularity for non-volatile memory

Generating multi-plane reads to read pages on planes of a storage d...

Increased read performance for implementations having multiple inte...

Mirroring data in write caches of a controller of a non-volatile me...

Reducing effects of read array operations of read apparent voltage

Determining a read apparent voltage infector page and infected page

Reducing read errors by performing mitigation reads to blocks of no...

Peripheral component interconnect express (PCIE) pseudo-virtual cha...

Peripheral component interconnect express (PCIE) pseudo-virtual cha...

Accelerated non-volatile memory recirculation processing

Validation bits and offsets to represent logical pages split betwee...

Validation bits and offsets to represent logical pages split betwee...

Validation bits and offsets to represent logical pages split betwee...

Accelerated non-volatile memory recirculation processing

Flash memory codeword architectures

Stalling of DMA operations in order to do memory migration using a...

Hierarchical to physical bus translation

Hierarchical to physical memory mapped input/output translation

Translating a requester identifier to a chip identifier

Physical to hierarchical bus translation

Method for protocol enhancement of PCI express using a continue bit

Computer-implemented method, apparatus, and computer program produc...

Data forwarding by host/PCI-X bridges with buffered packet size det...

Clock generation for multiple secondary buses of a PCI bridge

Split completion performance of PCI-X bridges based on data transfe...

Data transfer via Host/PCI-X bridges

Packet memory system

Accelerated error detection in a bus bridge circuit

Transaction routing system

Performance enhancement implementation through buffer management/br...

Patents Applicationslast 30 patents

INCREASED GARBAGE COLLECTION GRANULARITY FOR NON-VOLATILE MEMORY

GENERATING MULTI-PLANE READS TO READ PAGES ON PLANES OF A STORAGE D...

INCREASED READ PERFORMANCE FOR IMPLEMENTATIONS HAVING MULTIPLE INTE...

MIRRORING DATA IN WRITE CACHES OF A CONTROLLER OF A NON-VOLATILE ME...

DETERMINING A READ APPARENT VOLTAGE INFECTOR PAGE AND INFECTED PAGE

REDUCING EFFECTS OF READ ARRAY OPERATIONS OF READ APPARENT VOLTAGE

REDUCING READ ERRORS BY PERFORMING MITIGATION READS TO BLOCKS OF NO...

ACCELERATED NON-VOLATILE MEMORY RECIRCULATION PROCESSING

FLASH MEMORY CODEWORD ARCHITECTURES

FLASH MEMORY CODEWORD ARCHITECTURES

PERIPHERAL COMPONENT INTERCONNECT EXPRESS (PCIE) PSEUDO-VIRTUAL CHA...

PERIPHERAL COMPONENT INTERCONNECT EXPRESS (PCIE) PSEUDO-VIRTUAL CHA...

FLASH MEMORY CODEWORD ARCHITECTURES

ACCELERATED NON-VOLATILE MEMORY RECIRCULATION PROCESSING

PHYSICAL TO HIERARCHICAL BUS TRANSLATION

HIERARCHICAL TO PHYSICAL BUS TRANSLATION

TRANSLATING A REQUESTER IDENTIFIER TO A CHIP IDENTIFIER

HIERARCHICAL TO PHYSICAL MEMORY MAPPED INPUT/OUTPUT TRANSLATION

Method for Creating Data Transfer Packets With Embedded Management...

Protocol Enhancement for PCI Express

Method and Apparatus for Enabling Virtual Channels Within A Periphe...

COMPUTER-IMPLEMENTED METHOD, APPARATUS, AND COMPUTER PROGRAM PRODUC...

STALLING OF DMA OPERATIONS IN ORDER TO DO MEMORY MIGRATION USING A...

Data transfer via Host/PXCI-X bridges

Split completion performance of PCI-X bridges

Data forwarding by host/PCI-X bridges

Accelerated error detection in a bus bridge circuit

Clock generation for multiple secondary buses of a PCI bridge

Packet memory system