Adam D. Eldredge

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Fail safe clock buffer and clock generator
- Patent number 10,320,509
- Issue date Jun 11, 2019
- Silicon Laboratories Inc.
- Yunteng Huang
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Higher-order phase noise modulator to reduce spurs and quantization...
- Patent number 8,994,420
- Issue date Mar 31, 2015
- Silicon Laboratories Inc.
- Adam B. Eldredge
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Cascaded PLL for reducing low-frequency drift in holdover mode
- Patent number 8,791,734
- Issue date Jul 29, 2014
- Silicon Laboratories Inc.
- Susumu Hara
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Interpolative divider linearity enhancement techniques
- Patent number 8,692,599
- Issue date Apr 8, 2014
- Silicon Laboratories Inc.
- Xue-Mei Gong
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Mutual inductance circuits
- Patent number 8,648,664
- Issue date Feb 11, 2014
- Silicon Laboratories Inc.
- Adam B. Eldredge
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Sigma-delta modulation with reduction of spurs using a dither signal
- Patent number 8,514,118
- Issue date Aug 20, 2013
- Silicon Laboratories Inc.
- Adam B. Eldredge
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
PLL using interpolative divider as digitally controlled oscillator
- Patent number 8,441,291
- Issue date May 14, 2013
- Silicon Laboratories Inc.
- Susumu Hara
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Calibrating a phase detector and analog-to-digital converter offset...
- Patent number 8,130,888
- Issue date Mar 6, 2012
- Silicon Laboratories Inc.
- Adam B. Eldredge
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Calibrating a phase detector and analog-to-digital converter offset...
- Patent number 7,609,798
- Issue date Oct 27, 2009
- Silicon Laboratories Inc.
- Adam B. Eldredge
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Reducing phase offsets in a phase detector
- Patent number 7,577,224
- Issue date Aug 18, 2009
- Silicon Laboratories Inc.
- Adam B. Eldredge
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Data cleaning with an asynchronous reference clock
- Patent number 7,512,203
- Issue date Mar 31, 2009
- Silicon Laboratories Inc.
- Adam B. Eldredge
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Robust false locking prevention in referenceless frequency acquisition
- Patent number 7,375,591
- Issue date May 20, 2008
- Silicon Laboratories Inc.
- Zhuo Fu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Input buffer
- Patent number 7,348,809
- Issue date Mar 25, 2008
- Silicon Laboratories Inc.
- Adam B. Eldredge
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Determining signal quality and selecting a slice level via a forbid...
- Patent number 7,281,176
- Issue date Oct 9, 2007
- Silicon Laboratories Inc.
- Adam B. Eldredge
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
COMBINATION OSCILLATOR FOR CLOCK GENERATORS
- Publication number 20240077905
- Publication date Mar 7, 2024
- Aeonsemi, Inc.
- Yunteng Huang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FAIL SAFE CLOCK BUFFER AND CLOCK GENERATOR
- Publication number 20170187481
- Publication date Jun 29, 2017
- Silicon Laboratories Inc.
- Yunteng Huang
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
CASCADED PLL FOR REDUCING LOW-FREQUENCY DRIFT IN HOLDOVER MODE
- Publication number 20140225653
- Publication date Aug 14, 2014
- Silicon Laboratories Inc.
- Susumu Hara
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
INTERPOLATIVE DIVIDER LINEARITY ENHANCEMENT TECHNIQUES
- Publication number 20140055179
- Publication date Feb 27, 2014
- Xue-Mei Gong
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
HIGHER-ORDER PHASE NOISE MODULATOR TO REDUCE SPURS AND QUANTIZATION...
- Publication number 20130300467
- Publication date Nov 14, 2013
- Adam B. Eldredge
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Mutual Inductance Circuits
- Publication number 20130082793
- Publication date Apr 4, 2013
- Adam B. Eldredge
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Sigma-Delta Modulation with Reduction of Spurs Using a Dither Signal
- Publication number 20130076547
- Publication date Mar 28, 2013
- Adam B. Eldredge
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
PLL USING INTERPOLATIVE DIVIDER AS DIGITALLY CONTROLLED OSCILLATOR
- Publication number 20130076415
- Publication date Mar 28, 2013
- Susumu Hara
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Calibrating A Phase Detector And Analog-To-Digital Converter Offset...
- Publication number 20100008459
- Publication date Jan 14, 2010
- Adam B. Eldredge
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
ROBUST FALSE LOCKING PREVENTION IN REFERENCELESS FREQUENCY ACQUISITION
- Publication number 20080042757
- Publication date Feb 21, 2008
- Zhuo Fu
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Input buffer
- Publication number 20070222484
- Publication date Sep 27, 2007
- Adam B. Eldredge
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Data cleaning with an asynchronous reference clock
- Publication number 20060222134
- Publication date Oct 5, 2006
- Adam B. Eldredge
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Calibrating a phase detector and analog-to-digital converter offset...
- Publication number 20060140319
- Publication date Jun 29, 2006
- Adam B. Eldredge
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Reducing phase offsets in a phase detector
- Publication number 20060140323
- Publication date Jun 29, 2006
- Adam B. Eldredge
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Determining signal quality and selecting a slice level via a forbid...
- Publication number 20060095814
- Publication date May 4, 2006
- Adam B. Eldredge
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Redistribution layer shielding of a circuit element
- Publication number 20040222478
- Publication date Nov 11, 2004
- Silicon Laboratories, Inc.
- Ligang Zhang
- H01 - BASIC ELECTRIC ELEMENTS

Adam D. Eldredge

Person

Patents Grantslast 30 patents

Fail safe clock buffer and clock generator

Higher-order phase noise modulator to reduce spurs and quantization...

Cascaded PLL for reducing low-frequency drift in holdover mode

Interpolative divider linearity enhancement techniques

Mutual inductance circuits

Sigma-delta modulation with reduction of spurs using a dither signal

PLL using interpolative divider as digitally controlled oscillator

Calibrating a phase detector and analog-to-digital converter offset...

Calibrating a phase detector and analog-to-digital converter offset...

Reducing phase offsets in a phase detector

Data cleaning with an asynchronous reference clock

Robust false locking prevention in referenceless frequency acquisition

Input buffer

Determining signal quality and selecting a slice level via a forbid...

Patents Applicationslast 30 patents

COMBINATION OSCILLATOR FOR CLOCK GENERATORS

FAIL SAFE CLOCK BUFFER AND CLOCK GENERATOR

CASCADED PLL FOR REDUCING LOW-FREQUENCY DRIFT IN HOLDOVER MODE

INTERPOLATIVE DIVIDER LINEARITY ENHANCEMENT TECHNIQUES

HIGHER-ORDER PHASE NOISE MODULATOR TO REDUCE SPURS AND QUANTIZATION...

Mutual Inductance Circuits

Sigma-Delta Modulation with Reduction of Spurs Using a Dither Signal

PLL USING INTERPOLATIVE DIVIDER AS DIGITALLY CONTROLLED OSCILLATOR

Calibrating A Phase Detector And Analog-To-Digital Converter Offset...

ROBUST FALSE LOCKING PREVENTION IN REFERENCELESS FREQUENCY ACQUISITION

Input buffer

Data cleaning with an asynchronous reference clock

Calibrating a phase detector and analog-to-digital converter offset...

Reducing phase offsets in a phase detector

Determining signal quality and selecting a slice level via a forbid...

Redistribution layer shielding of a circuit element