Adebabay M. Bekele

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Wide frequency range voltage controlled oscillators
- Patent number 11,689,207
- Issue date Jun 27, 2023
- Xilinx, Inc.
- Adebabay M. Bekele
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Wide frequency range voltage controlled oscillators
- Patent number 11,637,528
- Issue date Apr 25, 2023
- Xilinx, Inc.
- Adebabay M. Bekele
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Flexible wide-range and high bandwidth auxiliary clock and data rec...
- Patent number 10,868,663
- Issue date Dec 15, 2020
- Xilinx, Inc.
- Didem Z. Turker Melek
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Multi-port inductors and transformers for accurately predicting vol...
- Patent number 10,715,153
- Issue date Jul 14, 2020
- Xilinx, Inc.
- Adebabay M. Bekele
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Temperature-dependent phase-locked loop (PLL) reset for clock synth...
- Patent number 10,630,301
- Issue date Apr 21, 2020
- Xilinx, Inc.
- Adebabay M. Bekele
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Reconfigurable fractional-N frequency generation for a phase-locked...
- Patent number 10,623,008
- Issue date Apr 14, 2020
- Xilinx, Inc.
- Parag Upadhyaya
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Phase-locked loop having sampling phase detector
- Patent number 9,742,380
- Issue date Aug 22, 2017
- Xilinx, Inc.
- Mayank Raj
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Phase-locked loop having sub-sampling phase detector
- Patent number 9,608,644
- Issue date Mar 28, 2017
- Xilinx, Inc.
- Mayank Raj
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Voltage controlled oscillator including MuGFETS
- Patent number 9,325,277
- Issue date Apr 26, 2016
- Xilinx, Inc.
- Adebabay M. Bekele
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for powering down a dual supply current source
- Patent number 8,614,599
- Issue date Dec 24, 2013
- Xilinx, Inc.
- Adebabay M. Bekele
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for dividing clock frequencies
- Patent number 8,218,712
- Issue date Jul 10, 2012
- Xilinx, Inc.
- Xuewen Jiang
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Integrated circuit having embedded differential clock tree
- Patent number 7,759,973
- Issue date Jul 20, 2010
- Xilinx, Inc.
- Vasisht Mantra Vadi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Differential clock tree in an integrated circuit
- Patent number 7,518,401
- Issue date Apr 14, 2009
- Xilinx, Inc.
- Vasisht Mantra Vadi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable logic device having an embedded differential clock tree
- Patent number 7,414,430
- Issue date Aug 19, 2008
- Xilinx, Inc.
- Vasisht Mantra Vadi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Differential clock tree in an integrated circuit
- Patent number 7,372,299
- Issue date May 13, 2008
- Xilinx, Inc.
- Vasisht Mantra Vadi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
High speed configurable transceiver architecture
- Patent number 7,187,709
- Issue date Mar 6, 2007
- Xilinx, Inc.
- Suresh M. Menon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Differential clocking scheme in an integrated circuit having digita...
- Patent number 7,142,033
- Issue date Nov 28, 2006
- Xilinx, Inc.
- Atul V. Ghia
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Differential clock tree in an integrated circuit
- Patent number 7,129,765
- Issue date Oct 31, 2006
- Xilinx, Inc.
- Vasisht Mantra Vadi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable logic device having an embedded differential clock tree
- Patent number 7,126,406
- Issue date Oct 24, 2006
- Xilinx, Inc.
- Vasisht Mantra Vadi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Differential clock driver circuit
- Patent number 7,061,283
- Issue date Jun 13, 2006
- Xilinx, Inc.
- Atul V. Ghia
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Low jitter clock for a physical media access sublayer on a field pr...
- Patent number 6,911,842
- Issue date Jun 28, 2005
- Xilinx, Inc.
- Atul V. Ghia
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
METHODS AND APPARATUSES FOR WAVELENGTH LOCKING FOR OPTICAL WAVELENG...
- Publication number 20240405882
- Publication date Dec 5, 2024
- Xilinx, Inc.
- Adebabay M. BEKELE
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
METHODS AND APPARATUSES FOR MAXIMIZING OUTPUT MODULATION AMPLITUDE...
- Publication number 20240396638
- Publication date Nov 28, 2024
- Xilinx, Inc.
- Adebabay M. BEKELE
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
RECONFIGURABLE FRACTIONAL-N FREQUENCY GENERATION FOR A PHASE-LOCKED...
- Publication number 20160322979
- Publication date Nov 3, 2016
- Xilinx, Inc.
- Parag Upadhyaya
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Differential clock tree in an integrated circuit
- Publication number 20070013428
- Publication date Jan 18, 2007
- Xilinx, Inc.
- Vasisht Mantra Vadi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Differential clock tree in an integrated circuit
- Publication number 20060290403
- Publication date Dec 28, 2006
- Xilinx, Inc.
- Vasisht Mantra Vadi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Programmable logic device having an embedded differential clock tree
- Publication number 20060290402
- Publication date Dec 28, 2006
- Xilinx, Inc.
- Vasisht Mantra Vadi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Differential clock tree in an integrated circuit
- Publication number 20050242865
- Publication date Nov 3, 2005
- Xilinx, Inc.
- Vasisht Mantra Vadi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Differential clocking scheme in an integrated circuit having digita...
- Publication number 20050242867
- Publication date Nov 3, 2005
- Xilinx, Inc.
- Atul V. Ghia
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Programmable logic device having an embedded differential clock tree
- Publication number 20050242866
- Publication date Nov 3, 2005
- Xilinx, Inc.
- Vasisht Mantra Vadi
- G06 - COMPUTING CALCULATING COUNTING

Adebabay M. Bekele

Person

Patents Grantslast 30 patents

Wide frequency range voltage controlled oscillators

Wide frequency range voltage controlled oscillators

Flexible wide-range and high bandwidth auxiliary clock and data rec...

Multi-port inductors and transformers for accurately predicting vol...

Temperature-dependent phase-locked loop (PLL) reset for clock synth...

Reconfigurable fractional-N frequency generation for a phase-locked...

Phase-locked loop having sampling phase detector

Phase-locked loop having sub-sampling phase detector

Voltage controlled oscillator including MuGFETS

Method and apparatus for powering down a dual supply current source

Method and apparatus for dividing clock frequencies

Integrated circuit having embedded differential clock tree

Differential clock tree in an integrated circuit

Programmable logic device having an embedded differential clock tree

Differential clock tree in an integrated circuit

High speed configurable transceiver architecture

Differential clocking scheme in an integrated circuit having digita...

Differential clock tree in an integrated circuit

Programmable logic device having an embedded differential clock tree

Differential clock driver circuit

Low jitter clock for a physical media access sublayer on a field pr...

Patents Applicationslast 30 patents

METHODS AND APPARATUSES FOR WAVELENGTH LOCKING FOR OPTICAL WAVELENG...

METHODS AND APPARATUSES FOR MAXIMIZING OUTPUT MODULATION AMPLITUDE...

RECONFIGURABLE FRACTIONAL-N FREQUENCY GENERATION FOR A PHASE-LOCKED...

Differential clock tree in an integrated circuit

Differential clock tree in an integrated circuit

Programmable logic device having an embedded differential clock tree

Differential clock tree in an integrated circuit

Differential clocking scheme in an integrated circuit having digita...

Programmable logic device having an embedded differential clock tree