Adee O. Ran

Person

Maayan Baruch, IL

People

Patents Grantslast 30 patents

Information Patent Grant
Transmitter equalization optimization for ethernet chip-to-module (...
- Patent number 12,113,651
- Issue date Oct 8, 2024
- Cisco Technology, Inc.
- Tomer Geva
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Component firmware interaction using hardware registers
- Patent number 11,809,353
- Issue date Nov 7, 2023
- Intel Corporation
- Kevan A. Lillie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adaptation of at least one transmit equalizer setting
- Patent number 11,706,059
- Issue date Jul 18, 2023
- Intel Corporation
- Adee Ofir Ran
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Transmitter equalization
- Patent number 11,546,007
- Issue date Jan 3, 2023
- Cisco Technology, Inc.
- Adee O. Ran
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus for synchronous signaling between link partner...
- Patent number 11,424,901
- Issue date Aug 23, 2022
- Intel Corporation
- Adee Ofir Ran
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Technologies for cooperative link equalization without disruption t...
- Patent number 11,356,306
- Issue date Jun 7, 2022
- Intel Corporation
- Nishantkumar Shah
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Technologies for autonegotiating 10G and 1G serial communications o...
- Patent number 11,277,308
- Issue date Mar 15, 2022
- Intel Corporation
- Kent C. Lusted
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Adaptation of a transmit equalizer using management registers
- Patent number 11,240,072
- Issue date Feb 1, 2022
- Intel Corporation
- Adee Ofir Ran
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Techniques for link partner error reporting
- Patent number 11,190,208
- Issue date Nov 30, 2021
- Intel Corporation
- Adee Ofir Ran
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Techniques for link partner error reporting
- Patent number 10,924,132
- Issue date Feb 16, 2021
- Intel Corporation
- Adee Ofir Ran
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Adaptation of a transmit equalizer using management registers
- Patent number 10,715,357
- Issue date Jul 14, 2020
- Intel Corporation
- Adee Ofir Ran
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Variable impedance communication terminal
- Patent number 10,666,230
- Issue date May 26, 2020
- Intel Corporation
- Adee Ofir Ran
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Technologies for autonegotiating 10G and 1G serial communications o...
- Patent number 10,623,263
- Issue date Apr 14, 2020
- Intel Corporation
- Kent C. Lusted
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
On-chip jitter tolerance testing
- Patent number 10,498,469
- Issue date Dec 3, 2019
- Intel Corporation
- Mor Cohen
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Increasing communication safety by preventing false packet acceptan...
- Patent number 10,374,751
- Issue date Aug 6, 2019
- Intel Corporation
- Adee O. Ran
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Technologies for autonegotiating 10G and 1G serial communications o...
- Patent number 10,374,897
- Issue date Aug 6, 2019
- Intel Corporation
- Kent C. Lusted
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Ethernet auto-negotiation with parallel detect for 10G DAC or other...
- Patent number 10,164,912
- Issue date Dec 25, 2018
- Intel Corporation
- Adee O. Ran
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Transmitter noise in system budget
- Patent number 10,069,606
- Issue date Sep 4, 2018
- Intel Corporation
- Adee O. Ran
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Technologies for autonegotiating 10G and 1G serial communications o...
- Patent number 10,033,586
- Issue date Jul 24, 2018
- Intel Corporation
- Kent C. Lusted
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Slicer and decision feedback equalization circuitry
- Patent number 9,973,356
- Issue date May 15, 2018
- Intel Corporation
- Ram Livne
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Determining the signal quality of an electrical interconnect
- Patent number 9,906,267
- Issue date Feb 27, 2018
- Intel Corporation
- Richard Mellitz
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Technologies for configuring transmitter equalization in a communic...
- Patent number 9,882,748
- Issue date Jan 30, 2018
- Intel Corporation
- Adee O. Ran
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Transmitter noise in system budget
- Patent number 9,825,736
- Issue date Nov 21, 2017
- Intel Corporation
- Adee O. Ran
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Technologies for ethernet link robustness for deep sleep low power...
- Patent number 9,722,717
- Issue date Aug 1, 2017
- Intel Corporation
- Yoni Landau
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Technologies for high-speed PCS supporting FEC block synchronizatio...
- Patent number 9,602,401
- Issue date Mar 21, 2017
- Intel Corporation
- Adee O. Ran
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Active cable testing
- Patent number 9,568,530
- Issue date Feb 14, 2017
- Intel Corporation
- Ehud Udi Shoor
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method, apparatus, and system for measurement of noise statistics a...
- Patent number 9,374,202
- Issue date Jun 21, 2016
- Intel Corporation
- Adee O. Ran
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
De-correlating training pattern sequences between lanes in high-spe...
- Patent number 9,344,146
- Issue date May 17, 2016
- Intel Corporation
- Kent C. Lusted
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Distortion measurement for limiting jitter in PAM transmitters
- Patent number 9,344,203
- Issue date May 17, 2016
- Intel Corporation
- Adee O. Ran
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Increasing communication safety by preventing false packet acceptan...
- Patent number 9,344,219
- Issue date May 17, 2016
- Intel Corporation
- Adee O. Ran
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Patents Applicationslast 30 patents

Information Patent Application
SYMBOL MULTIPLEXING PHYSICAL MEDIUM ATTACHMENT (PMA)
- Publication number 20240097949
- Publication date Mar 21, 2024
- Cisco Technology, Inc.
- Adee Ran
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
TRANSMITTER EQUALIZATION OPTIMIZATION FOR ETHERNET CHIP-TO-MODULE (...
- Publication number 20240022458
- Publication date Jan 18, 2024
- Cisco Technology, Inc.
- Tomer GEVA
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
COMPONENT FIRMWARE INTERACTION USING HARDWARE REGISTERS
- Publication number 20240020256
- Publication date Jan 18, 2024
- Intel Corporation
- Kevan A. Lillie
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PHYSICAL CODING SUBLAYER WITH MODIFIED BIT ORDERING TO IMPROVE ERRO...
- Publication number 20240014927
- Publication date Jan 11, 2024
- Cisco Technology, Inc.
- Adee O. Ran
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SCALABLE RECEIVER ARCHITECTURE FOR SILICON PHOTONIC LINKS
- Publication number 20230198631
- Publication date Jun 22, 2023
- Intel Corporation
- Itamar Levin
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
ADAPTATION OF A TRANSMIT EQUALIZER USING MANAGEMENT REGISTERS
- Publication number 20220141055
- Publication date May 5, 2022
- Intel Corporation
- Adee Ofir RAN
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
ADAPTATION OF A TRANSMIT EQUALIZER USING MANAGEMENT REGISTERS
- Publication number 20200374159
- Publication date Nov 26, 2020
- Intel Corporation
- Adee Ofir RAN
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Techniques For Link Partner Error Reporting
- Publication number 20200321978
- Publication date Oct 8, 2020
- Intel Corporation
- Adee Ofir Ran
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
TECHNOLOGIES FOR AUTONEGOTIATING 10G AND 1G SERIAL COMMUNICATIONS O...
- Publication number 20200244535
- Publication date Jul 30, 2020
- Intel Corporation
- Kent C. Lusted
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
METHOD AND APPARATUS FOR SYNCHRONOUS SIGNALING BETWEEN LINK PARTNER...
- Publication number 20200052872
- Publication date Feb 13, 2020
- Intel Corporation
- Adee Ofir RAN
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
TECHNOLOGIES FOR AUTONEGOTIATING 10G AND 1G SERIAL COMMUNICATIONS O...
- Publication number 20190280929
- Publication date Sep 12, 2019
- Intel Corporation
- Kent C. Lusted
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
ADAPTATION OF A TRANSMIT EQUALIZER USING MANAGEMENT REGISTERS
- Publication number 20190260615
- Publication date Aug 22, 2019
- Intel Corporation
- Adee Ofir RAN
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
TECHNIQUES FOR LINK PARTNER ERROR REPORTING
- Publication number 20190215008
- Publication date Jul 11, 2019
- Intel Corporation
- Adee Ofir Ran
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
BIT ERROR RATE PREDICTION
- Publication number 20190108111
- Publication date Apr 11, 2019
- Intel Corporation
- Itamar Fredi Levin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
VARIABLE IMPEDANCE COMMUNICATION TERMINAL
- Publication number 20190058457
- Publication date Feb 21, 2019
- Intel Corporation
- Adee Ofir Ran
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
TECHNOLOGIES FOR COOPERATIVE LINK EQUALIZATION WITHOUT DISRUPTION T...
- Publication number 20190044763
- Publication date Feb 7, 2019
- Intel Corporation
- Nishantkumar Shah
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
ON-CHIP JITTER TOLERANCE TESTING
- Publication number 20190044627
- Publication date Feb 7, 2019
- Intel Corporation
- Mor COHEN
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
TECHNOLOGIES FOR AUTONEGOTIATING 10G AND 1G SERIAL COMMUNICATIONS O...
- Publication number 20180331907
- Publication date Nov 15, 2018
- Intel Corporation
- Kent C. Lusted
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
COMPONENT FIRMWARE INTERACTION USING HARDWARE REGISTERS
- Publication number 20180285298
- Publication date Oct 4, 2018
- KEVAN A. LILLIE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Transmitter Noise in System Budget
- Publication number 20180139015
- Publication date May 17, 2018
- Intel Corporation
- Adee O. Ran
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
ETHERNET AUTO-NEGOTIATION WITH PARALLEL DETECT FOR 10G DAC OR OTHER...
- Publication number 20180026917
- Publication date Jan 25, 2018
- Adee O. Ran
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
INCREASING COMMUNICATION SAFETY BY PREVENTING FALSE PACKET ACCEPTAN...
- Publication number 20160337079
- Publication date Nov 17, 2016
- Intel Corporation
- Adee O. Ran
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
TECHNOLOGIES FOR ETHERNET LINK ROBUSTNESS FOR DEEP SLEEP LOW POWER...
- Publication number 20160182175
- Publication date Jun 23, 2016
- Yoni Landau
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
DETERMINING THE SIGNAL QUALITY OF AN ELECTRICAL INTERCONNECT
- Publication number 20160182124
- Publication date Jun 23, 2016
- Intel Corporation
- RICHARD MELLITZ
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Technologies for Autonegotiating 10G and 1G Serial Communications O...
- Publication number 20160164736
- Publication date Jun 9, 2016
- Kent C. Lusted
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Transmitter Noise in System Budget
- Publication number 20160149675
- Publication date May 26, 2016
- Intel Corporation
- Adee O. Ran
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
ACTIVE CABLE TESTING
- Publication number 20160124034
- Publication date May 5, 2016
- Ehud Udi Shoor
- G01 - MEASURING TESTING
Information Patent Application
TECHNOLOGIES FOR EXCHANGING HOST LOSS AND FORWARD ERROR CORRECTION...
- Publication number 20160099795
- Publication date Apr 7, 2016
- Kent C. Lusted
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNOLOGIES FOR HIGH-SPEED PCS SUPPORTING FEC BLOCK SYNCHRONIZATIO...
- Publication number 20160087753
- Publication date Mar 24, 2016
- Adee O. Ran
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNOLOGIES FOR CONFIGURING TRANSMITTER EQUALIZATION IN A COMMUNIC...
- Publication number 20150256366
- Publication date Sep 10, 2015
- Adee O. Ran
- H04 - ELECTRIC COMMUNICATION TECHNIQUE

Adee O. Ran

Person

Patents Grantslast 30 patents

Transmitter equalization optimization for ethernet chip-to-module (...

Component firmware interaction using hardware registers

Adaptation of at least one transmit equalizer setting

Transmitter equalization

Method and apparatus for synchronous signaling between link partner...

Technologies for cooperative link equalization without disruption t...

Technologies for autonegotiating 10G and 1G serial communications o...

Adaptation of a transmit equalizer using management registers

Techniques for link partner error reporting

Techniques for link partner error reporting

Adaptation of a transmit equalizer using management registers

Variable impedance communication terminal

Technologies for autonegotiating 10G and 1G serial communications o...

On-chip jitter tolerance testing

Increasing communication safety by preventing false packet acceptan...

Technologies for autonegotiating 10G and 1G serial communications o...

Ethernet auto-negotiation with parallel detect for 10G DAC or other...

Transmitter noise in system budget

Technologies for autonegotiating 10G and 1G serial communications o...

Slicer and decision feedback equalization circuitry

Determining the signal quality of an electrical interconnect

Technologies for configuring transmitter equalization in a communic...

Transmitter noise in system budget

Technologies for ethernet link robustness for deep sleep low power...

Technologies for high-speed PCS supporting FEC block synchronizatio...

Active cable testing

Method, apparatus, and system for measurement of noise statistics a...

De-correlating training pattern sequences between lanes in high-spe...

Distortion measurement for limiting jitter in PAM transmitters

Increasing communication safety by preventing false packet acceptan...

Patents Applicationslast 30 patents

SYMBOL MULTIPLEXING PHYSICAL MEDIUM ATTACHMENT (PMA)

TRANSMITTER EQUALIZATION OPTIMIZATION FOR ETHERNET CHIP-TO-MODULE (...

COMPONENT FIRMWARE INTERACTION USING HARDWARE REGISTERS

PHYSICAL CODING SUBLAYER WITH MODIFIED BIT ORDERING TO IMPROVE ERRO...

SCALABLE RECEIVER ARCHITECTURE FOR SILICON PHOTONIC LINKS

ADAPTATION OF A TRANSMIT EQUALIZER USING MANAGEMENT REGISTERS

ADAPTATION OF A TRANSMIT EQUALIZER USING MANAGEMENT REGISTERS

Techniques For Link Partner Error Reporting

TECHNOLOGIES FOR AUTONEGOTIATING 10G AND 1G SERIAL COMMUNICATIONS O...

METHOD AND APPARATUS FOR SYNCHRONOUS SIGNALING BETWEEN LINK PARTNER...

TECHNOLOGIES FOR AUTONEGOTIATING 10G AND 1G SERIAL COMMUNICATIONS O...

ADAPTATION OF A TRANSMIT EQUALIZER USING MANAGEMENT REGISTERS

TECHNIQUES FOR LINK PARTNER ERROR REPORTING

BIT ERROR RATE PREDICTION

VARIABLE IMPEDANCE COMMUNICATION TERMINAL

TECHNOLOGIES FOR COOPERATIVE LINK EQUALIZATION WITHOUT DISRUPTION T...

ON-CHIP JITTER TOLERANCE TESTING

TECHNOLOGIES FOR AUTONEGOTIATING 10G AND 1G SERIAL COMMUNICATIONS O...

COMPONENT FIRMWARE INTERACTION USING HARDWARE REGISTERS

Transmitter Noise in System Budget

ETHERNET AUTO-NEGOTIATION WITH PARALLEL DETECT FOR 10G DAC OR OTHER...

INCREASING COMMUNICATION SAFETY BY PREVENTING FALSE PACKET ACCEPTAN...

TECHNOLOGIES FOR ETHERNET LINK ROBUSTNESS FOR DEEP SLEEP LOW POWER...

DETERMINING THE SIGNAL QUALITY OF AN ELECTRICAL INTERCONNECT

Technologies for Autonegotiating 10G and 1G Serial Communications O...

Transmitter Noise in System Budget

ACTIVE CABLE TESTING

TECHNOLOGIES FOR EXCHANGING HOST LOSS AND FORWARD ERROR CORRECTION...

TECHNOLOGIES FOR HIGH-SPEED PCS SUPPORTING FEC BLOCK SYNCHRONIZATIO...

TECHNOLOGIES FOR CONFIGURING TRANSMITTER EQUALIZATION IN A COMMUNIC...