Aditya Sreenivas

Person

Folsom, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Isochronous agent data pinning in a multi-level memory system
- Patent number 9,542,336
- Issue date Jan 10, 2017
- Intel Corporation
- Marc Torrant
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Optimized memory addressing
- Patent number 7,612,780
- Issue date Nov 3, 2009
- Intel Corporation
- David E. Freker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Image rendering
- Patent number 7,348,986
- Issue date Mar 25, 2008
- Intel Corporation
- Peter L. Doyle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for synchronizing processing of multiple async...
- Patent number 7,321,369
- Issue date Jan 22, 2008
- Intel Corporation
- David A. Wyatt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Optimized memory addressing
- Patent number 7,230,627
- Issue date Jun 12, 2007
- Intel Corporation
- David E. Freker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus, method and system with a graphics-rendering engine havin...
- Patent number 7,173,627
- Issue date Feb 6, 2007
- Intel Corporation
- Peter L. Doyle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus, method and system with a graphics-rendering engine havin...
- Patent number 7,164,427
- Issue date Jan 16, 2007
- Intel Corporation
- Peter L. Doyle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient management of memory access requests from a video data st...
- Patent number 7,120,774
- Issue date Oct 10, 2006
- Intel Corporation
- Todd M. Witter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method, system, and apparatus for reducing power consumption of a m...
- Patent number 7,103,730
- Issue date Sep 5, 2006
- Intel Corporation
- Alankar Saxena
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory arbiter with intelligent page gathering logic
- Patent number 7,051,172
- Issue date May 23, 2006
- Intel Corporation
- Josh B. Mastronarde
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory arbiter with grace and ceiling periods and intelligent page...
- Patent number 7,035,984
- Issue date Apr 25, 2006
- Intel Corporation
- Josh B. Mastronarde
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dual memory channel interleaving for graphics and video
- Patent number 6,999,091
- Issue date Feb 14, 2006
- Intel Corporation
- Alankar Saxena
- G09 - EDUCATION CRYPTOGRAPHY DISPLAY ADVERTISING SEALS
Information Patent Grant
Automatic memory management
- Patent number 6,995,773
- Issue date Feb 7, 2006
- Intel Corporation
- Peter L. Doyle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Depth write disable for rendering
- Patent number 6,954,208
- Issue date Oct 11, 2005
- Intel Corporation
- Peter L. Doyle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus, method and system with a graphics-rendering engine havin...
- Patent number 6,885,374
- Issue date Apr 26, 2005
- Intel Corporation
- Peter L. Doyle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Image rendering
- Patent number 6,867,779
- Issue date Mar 15, 2005
- Intel Corporation
- Peter L. Doyle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory arbiter with intelligent page gathering logic
- Patent number 6,792,516
- Issue date Sep 14, 2004
- Intel Corporation
- Josh B. Mastronarde
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Depth write disable for zone rendering
- Patent number 6,747,657
- Issue date Jun 8, 2004
- Intel Corporation
- Peter L. Doyle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Automatic memory management for zone rendering
- Patent number 6,747,658
- Issue date Jun 8, 2004
- Intel Corporation
- Peter L. Doyle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiplexing digital video out on an accelerated graphics port inte...
- Patent number 6,724,389
- Issue date Apr 20, 2004
- Intel Corporation
- Adam H. Wilen
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for implementing dynamic display memory
- Patent number 6,650,332
- Issue date Nov 18, 2003
- Intel Corporation
- Peter Doyle
- G09 - EDUCATION CRYPTOGRAPHY DISPLAY ADVERTISING SEALS
Information Patent Grant
Method and apparatus for implementing smart allocation policies for...
- Patent number 6,633,299
- Issue date Oct 14, 2003
- Intel Corporation
- Krishnan Sreenivas
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System for efficient management of memory access requests from a pl...
- Patent number 6,629,253
- Issue date Sep 30, 2003
- Intel Corporation
- Todd M. Witter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Prefetching of virtual-to-physical address translation for display...
- Patent number 6,628,294
- Issue date Sep 30, 2003
- Intel Corporation
- Jonathan B. Sadowsky
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for controlling peripheral devices
- Patent number 6,560,657
- Issue date May 6, 2003
- Intel Corporation
- Wishwesh Gandhi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient TLB entry management for the render operands residing in...
- Patent number 6,538,650
- Issue date Mar 25, 2003
- Intel Corporation
- Surti B. Prasoonkumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for fast loading of texture data into a tiled...
- Patent number 6,496,193
- Issue date Dec 17, 2002
- Intel Corporation
- Prasoonkumar B. Surti
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory bandwidth utilization through multiple priority request poli...
- Patent number 6,449,702
- Issue date Sep 10, 2002
- Intel Corporation
- Todd M. Witter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for implementing dynamic display memory
- Patent number 6,362,826
- Issue date Mar 26, 2002
- Intel Corporation
- Peter Doyle
- G09 - EDUCATION CRYPTOGRAPHY DISPLAY ADVERTISING SEALS
Information Patent Grant
Arbitration mechanism for a computer system having a unified memory...
- Patent number 6,330,646
- Issue date Dec 11, 2001
- Intel Corporation
- Steve J. Clohset
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
ISOCHRONOUS AGENT DATA PINNING IN A MULTI-LEVEL MEMORY SYSTEM
- Publication number 20150169439
- Publication date Jun 18, 2015
- Marc Torrant
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHODS FOR AUTHENTICATING A HARDWARE DEVICE AND PROVIDING A SECURE...
- Publication number 20100027790
- Publication date Feb 4, 2010
- Balaji Vembu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Securing content for playback
- Publication number 20090172331
- Publication date Jul 2, 2009
- Balaji Vembu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Optimized memory addressing
- Publication number 20070188508
- Publication date Aug 16, 2007
- David E. Freker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus and method for protected execution of graphics applications
- Publication number 20050283602
- Publication date Dec 22, 2005
- Balaji Vembu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Image rendering
- Publication number 20050212805
- Publication date Sep 29, 2005
- Intel Corporation
- Peter L. Doyle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Optimized memory addressing
- Publication number 20050195202
- Publication date Sep 8, 2005
- David E. Freker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus, method and system with a graphics-rendering engine havin...
- Publication number 20050174354
- Publication date Aug 11, 2005
- Peter L. Doyle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Efficient management of memory access requests from a video data st...
- Publication number 20050044334
- Publication date Feb 24, 2005
- Todd M. Witter
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory arbiter with intelligent page gathering logic
- Publication number 20050033906
- Publication date Feb 10, 2005
- Josh B. Mastronarde
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Depth write disable for zone rendering
- Publication number 20040257373
- Publication date Dec 23, 2004
- Peter L. Doyle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Automatic memory management
- Publication number 20040222998
- Publication date Nov 11, 2004
- Peter L. Doyle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for synchronizing processing of multiple async...
- Publication number 20040041814
- Publication date Mar 4, 2004
- David A. Wyatt
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method, system, and apparatus for reducing power consumption of a m...
- Publication number 20030191915
- Publication date Oct 9, 2003
- Alankar Saxena
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Automatic memory management for zone rendering
- Publication number 20030122836
- Publication date Jul 3, 2003
- Peter L. Doyle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Depth write disable for zone rendering
- Publication number 20030122835
- Publication date Jul 3, 2003
- Peter L. Doyle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory arbiter with intelligent page gathering logic
- Publication number 20030122834
- Publication date Jul 3, 2003
- Josh B. Mastronarde
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory arbiter with grace and ceiling periods and intelligent page...
- Publication number 20030126380
- Publication date Jul 3, 2003
- Josh B. Mastronarde
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Dual memory channel interleaving for graphics and MPEG
- Publication number 20030122837
- Publication date Jul 3, 2003
- Alankar Saxena
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Apparatus, method and system with a graphics-rendering engine havin...
- Publication number 20030001848
- Publication date Jan 2, 2003
- Peter L. Doyle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Apparatus, method and system with a graphics-rendering engine havin...
- Publication number 20030001847
- Publication date Jan 2, 2003
- Peter L. Doyle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for implementing dynamic display memory
- Publication number 20020075271
- Publication date Jun 20, 2002
- Peter Doyle
- G09 - EDUCATION CRYPTOGRAPHY DISPLAY ADVERTISING SEALS

Aditya Sreenivas

Person

Patents Grantslast 30 patents

Isochronous agent data pinning in a multi-level memory system

Optimized memory addressing

Image rendering

Method and apparatus for synchronizing processing of multiple async...

Optimized memory addressing

Apparatus, method and system with a graphics-rendering engine havin...

Apparatus, method and system with a graphics-rendering engine havin...

Efficient management of memory access requests from a video data st...

Method, system, and apparatus for reducing power consumption of a m...

Memory arbiter with intelligent page gathering logic

Memory arbiter with grace and ceiling periods and intelligent page...

Dual memory channel interleaving for graphics and video

Automatic memory management

Depth write disable for rendering

Apparatus, method and system with a graphics-rendering engine havin...

Image rendering

Memory arbiter with intelligent page gathering logic

Depth write disable for zone rendering

Automatic memory management for zone rendering

Multiplexing digital video out on an accelerated graphics port inte...

Method and apparatus for implementing dynamic display memory

Method and apparatus for implementing smart allocation policies for...

System for efficient management of memory access requests from a pl...

Prefetching of virtual-to-physical address translation for display...

System and method for controlling peripheral devices

Efficient TLB entry management for the render operands residing in...

Method and apparatus for fast loading of texture data into a tiled...

Memory bandwidth utilization through multiple priority request poli...

Method and apparatus for implementing dynamic display memory

Arbitration mechanism for a computer system having a unified memory...

Patents Applicationslast 30 patents

ISOCHRONOUS AGENT DATA PINNING IN A MULTI-LEVEL MEMORY SYSTEM

METHODS FOR AUTHENTICATING A HARDWARE DEVICE AND PROVIDING A SECURE...

Securing content for playback

Optimized memory addressing

Apparatus and method for protected execution of graphics applications

Image rendering

Optimized memory addressing

Apparatus, method and system with a graphics-rendering engine havin...

Efficient management of memory access requests from a video data st...

Memory arbiter with intelligent page gathering logic

Depth write disable for zone rendering

Automatic memory management

Method and apparatus for synchronizing processing of multiple async...

Method, system, and apparatus for reducing power consumption of a m...

Automatic memory management for zone rendering

Depth write disable for zone rendering

Memory arbiter with intelligent page gathering logic

Memory arbiter with grace and ceiling periods and intelligent page...

Dual memory channel interleaving for graphics and MPEG

Apparatus, method and system with a graphics-rendering engine havin...

Apparatus, method and system with a graphics-rendering engine havin...

Method and apparatus for implementing dynamic display memory