Adrian Moga

Person

Portland, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Processor and method implementing a cacheline demote machine instru...
- Patent number 11,513,957
- Issue date Nov 29, 2022
- Intel Corporation
- Ren Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hardware/software co-optimization to improve performance and energy...
- Patent number 10,817,425
- Issue date Oct 27, 2020
- Intel Corporation
- Ren Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processors having virtually clustered cores and cache slices
- Patent number 10,725,920
- Issue date Jul 28, 2020
- Intel Corporation
- Herbert H. Hum
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processors having virtually clustered cores and cache slices
- Patent number 10,725,919
- Issue date Jul 28, 2020
- Intel Corporation
- Herbert H. Hum
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processors having virtually clustered cores and cache slices
- Patent number 10,705,960
- Issue date Jul 7, 2020
- Intel Corporation
- Herbert H. Hum
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processors having virtually clustered cores and cache slices
- Patent number 10,073,779
- Issue date Sep 11, 2018
- Intel Corporation
- Herbert H. Hum
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Virtual shared cache mechanism in a processing device
- Patent number 9,792,212
- Issue date Oct 17, 2017
- Intel Corporation
- Yen-Cheng Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache coherency apparatus and method minimizing memory writeback op...
- Patent number 9,436,605
- Issue date Sep 6, 2016
- Intel Corporation
- Jeffrey D. Chamberlain
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Inclusive and non-inclusive tracking of local cache lines to avoid...
- Patent number 9,418,009
- Issue date Aug 16, 2016
- Intel Corporation
- Adrian C. Moga
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Obtaining data for redundant multithreading (RMT) execution
- Patent number 9,081,688
- Issue date Jul 14, 2015
- Intel Corporation
- Glenn J. Hinton
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-processor computing system having fast processor response to...
- Patent number 9,015,415
- Issue date Apr 21, 2015
- Intel Corporation
- Ankush Varma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus, method, and system for implementing micro page tables
- Patent number 8,838,935
- Issue date Sep 16, 2014
- Intel Corporation
- Glenn Hinton
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Allocation and write policy for a glueless area-efficient directory...
- Patent number 8,631,210
- Issue date Jan 14, 2014
- Intel Corporation
- Adrian C. Moga
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Allocation and write policy for a glueless area-efficient directory...
- Patent number 8,392,665
- Issue date Mar 5, 2013
- Intel Corporation
- Adrian C. Moga
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method, system and apparatus for reducing memory traffic in a distr...
- Patent number 8,041,898
- Issue date Oct 18, 2011
- Intel Corporation
- Adrian Moga
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Increased computer peripheral throughput by using data available wi...
- Patent number 7,552,247
- Issue date Jun 23, 2009
- International Business Machines Corporation
- Thomas B. Berg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Caching memory contents into cache partitions based on memory locat...
- Patent number 6,848,026
- Issue date Jan 25, 2005
- International Business Machines Corporation
- Donald R. DeSota
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Increased computer peripheral throughput by using data available wi...
- Patent number 6,807,586
- Issue date Oct 19, 2004
- International Business Machines Corporation
- Thomas B. Berg
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
DE-PRIORITIZING SPECULATIVE CODE LINES IN ON-CHIP CACHES
- Publication number 20230185718
- Publication date Jun 15, 2023
- Intel Corporation
- Anant Vithal Nori
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MEMORY SIDE PREFETCH ARCHITECTURE FOR IMPROVED MEMORY BANDWIDTH
- Publication number 20230091205
- Publication date Mar 23, 2023
- Intel Corporation
- Adrian Moga
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM, APPARATUS, AND METHOD FOR SCHEDULING METADATA REQUESTS
- Publication number 20220308791
- Publication date Sep 29, 2022
- Intel Corporation
- RAMYA JAYARAM MASTI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTEGRATED THREE-DIMENSIONAL (3D) DRAM CACHE
- Publication number 20220308995
- Publication date Sep 29, 2022
- Intel Corporation
- Wilfred GOMES
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HARDWARE/SOFTWARE CO-OPTIMIZATION TO IMPROVE PERFORMANCE AND ENERGY...
- Publication number 20210004328
- Publication date Jan 7, 2021
- Ren Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSORS HAVING VIRTUALLY CLUSTERED CORES AND CACHE SLICES
- Publication number 20180225212
- Publication date Aug 9, 2018
- Intel Corporation
- Herbert H. HUM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSORS HAVING VIRTUALLY CLUSTERED CORES AND CACHE SLICES
- Publication number 20180225213
- Publication date Aug 9, 2018
- Intel Corporation
- Herbert H. HUM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSORS HAVING VIRTUALLY CLUSTERED CORES AND CACHE SLICES
- Publication number 20180225211
- Publication date Aug 9, 2018
- Intel Corporation
- Herbert H. HUM
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HARDWARE/SOFTWARE CO-OPTIMIZATION TO IMPROVE PERFORMANCE AND ENERGY...
- Publication number 20160188474
- Publication date Jun 30, 2016
- Intel Corporation
- Ren Wang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Virtual Shared Cache Mechanism in a Processing Device
- Publication number 20160077970
- Publication date Mar 17, 2016
- Intel Corporation
- Yen-Cheng Liu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Inclusive/Non Inclusive Tracking of Local Cache Lines To Avoid Near...
- Publication number 20150186275
- Publication date Jul 2, 2015
- Adrian C. Moga
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE COHERENCY APPARATUS AND METHOD MINIMIZING MEMORY WRITEBACK OP...
- Publication number 20150178206
- Publication date Jun 25, 2015
- Jeffrey D. Chamberlain
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSORS HAVING VIRTUALLY CLUSTERED CORES AND CACHE SLICES
- Publication number 20140189239
- Publication date Jul 3, 2014
- Herbert H. Hum
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ALLOCATION AND WRITE POLICY FOR A GLUELESS AREA-EFFICIENT DIRECTORY...
- Publication number 20130185522
- Publication date Jul 18, 2013
- ADRIAN C. MOGA
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-PROCESSOR COMPUTING SYSTEM HAVING FAST PROCESSOR RESPONSE TO...
- Publication number 20120079186
- Publication date Mar 29, 2012
- Ankush Varma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ALLOCATION AND WRITE POLICY FOR A GLUELESS AREA-EFFICIENT DIRECTORY...
- Publication number 20120079214
- Publication date Mar 29, 2012
- Adrian C. Moga
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS, METHOD, AND SYSTEM FOR IMPLEMENTING MICRO PAGE TABLES
- Publication number 20120079232
- Publication date Mar 29, 2012
- Glenn Hinton
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DIRECTORY CACHE ALLOCATION BASED ON SNOOP RESPONSE INFORMATION
- Publication number 20100332762
- Publication date Dec 30, 2010
- Adrian C. Moga
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Obtaining data for redundant multithreading (RMT) execution
- Publication number 20100169582
- Publication date Jul 1, 2010
- Glenn J. Hinton
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD, SYSTEM AND APPARATUS FOR REDUCING MEMORY TRAFFIC IN A DISTR...
- Publication number 20090276581
- Publication date Nov 5, 2009
- Intel Corporation
- Adrian Moga
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Selectively transmitting cache misses within coherence protocol
- Publication number 20050193177
- Publication date Sep 1, 2005
- Adrian C. Moga
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Increased computer peripheral throughput by using data available wi...
- Publication number 20050015520
- Publication date Jan 20, 2005
- Thomas B. Berg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Increased computer peripheral throughput by using data available wi...
- Publication number 20030131158
- Publication date Jul 10, 2003
- International Business Machines Corporation
- Thomas B. Berg
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Caching memory contents into cache partitions baesed on memory loca...
- Publication number 20030093622
- Publication date May 15, 2003
- International Business Machines Corporation
- Donald R. Desota
- G06 - COMPUTING CALCULATING COUNTING

Adrian Moga

Person

Patents Grantslast 30 patents

Processor and method implementing a cacheline demote machine instru...

Hardware/software co-optimization to improve performance and energy...

Processors having virtually clustered cores and cache slices

Processors having virtually clustered cores and cache slices

Processors having virtually clustered cores and cache slices

Processors having virtually clustered cores and cache slices

Virtual shared cache mechanism in a processing device

Cache coherency apparatus and method minimizing memory writeback op...

Inclusive and non-inclusive tracking of local cache lines to avoid...

Obtaining data for redundant multithreading (RMT) execution

Multi-processor computing system having fast processor response to...

Apparatus, method, and system for implementing micro page tables

Allocation and write policy for a glueless area-efficient directory...

Allocation and write policy for a glueless area-efficient directory...

Method, system and apparatus for reducing memory traffic in a distr...

Increased computer peripheral throughput by using data available wi...

Caching memory contents into cache partitions based on memory locat...

Increased computer peripheral throughput by using data available wi...

Patents Applicationslast 30 patents

DE-PRIORITIZING SPECULATIVE CODE LINES IN ON-CHIP CACHES

MEMORY SIDE PREFETCH ARCHITECTURE FOR IMPROVED MEMORY BANDWIDTH

SYSTEM, APPARATUS, AND METHOD FOR SCHEDULING METADATA REQUESTS

INTEGRATED THREE-DIMENSIONAL (3D) DRAM CACHE

HARDWARE/SOFTWARE CO-OPTIMIZATION TO IMPROVE PERFORMANCE AND ENERGY...

PROCESSORS HAVING VIRTUALLY CLUSTERED CORES AND CACHE SLICES

PROCESSORS HAVING VIRTUALLY CLUSTERED CORES AND CACHE SLICES

PROCESSORS HAVING VIRTUALLY CLUSTERED CORES AND CACHE SLICES

HARDWARE/SOFTWARE CO-OPTIMIZATION TO IMPROVE PERFORMANCE AND ENERGY...

Virtual Shared Cache Mechanism in a Processing Device

Inclusive/Non Inclusive Tracking of Local Cache Lines To Avoid Near...

CACHE COHERENCY APPARATUS AND METHOD MINIMIZING MEMORY WRITEBACK OP...

PROCESSORS HAVING VIRTUALLY CLUSTERED CORES AND CACHE SLICES

ALLOCATION AND WRITE POLICY FOR A GLUELESS AREA-EFFICIENT DIRECTORY...

MULTI-PROCESSOR COMPUTING SYSTEM HAVING FAST PROCESSOR RESPONSE TO...

ALLOCATION AND WRITE POLICY FOR A GLUELESS AREA-EFFICIENT DIRECTORY...

APPARATUS, METHOD, AND SYSTEM FOR IMPLEMENTING MICRO PAGE TABLES

DIRECTORY CACHE ALLOCATION BASED ON SNOOP RESPONSE INFORMATION

Obtaining data for redundant multithreading (RMT) execution

METHOD, SYSTEM AND APPARATUS FOR REDUCING MEMORY TRAFFIC IN A DISTR...

Selectively transmitting cache misses within coherence protocol

Increased computer peripheral throughput by using data available wi...

Increased computer peripheral throughput by using data available wi...

Caching memory contents into cache partitions baesed on memory loca...