Ahmad Hamzehdoost

Person

Sacramento, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method of fabricating a BGA package using PCB and tape in a die-up...
- Patent number 6,468,834
- Issue date Oct 22, 2002
- Ahmad Hamzehdoost
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reinforced sealing technique for an integrated circuit package
- Patent number 6,264,778
- Issue date Jul 24, 2001
- Philips Electronics North America Corporation
- Ahmad Hamzehdoost
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
BGA package using PCB and tape in a die-up configuration
- Patent number 6,069,407
- Issue date May 30, 2000
- VLSI Technology, Inc.
- Ahmad Hamzehdoost
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Printed circuit board layout to minimize the clock delay caused by...
- Patent number 6,047,467
- Issue date Apr 11, 2000
- VLSI Technology, Inc.
- Ahmad B. Hamzehdoost
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
BGA package using PCB and tape in a die-down configuration
- Patent number 5,999,415
- Issue date Dec 7, 1999
- VLSI Technology, Inc.
- Ahmad Hamzehdoost
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Cavity down HBGA package structure
- Patent number 5,910,686
- Issue date Jun 8, 1999
- VLSI Technology, Inc.
- Ahmad Hamzehdoost
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Printed circuit board layout to minimize the clock delay caused by...
- Patent number 5,742,009
- Issue date Apr 21, 1998
- VLSI Technology Corporation
- Ahmad Hamzehdoost
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Method of assembling and cooling a package structure with accessibl...
- Patent number 5,687,474
- Issue date Nov 18, 1997
- VLSI Technology, Inc.
- Ahmad Hamzehdoost
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Multi-layer substrate structure
- Patent number 5,689,091
- Issue date Nov 18, 1997
- VLSI Technology, Inc.
- Ahmad Hamzehdoost
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reinforced sealing technique for an integrated-circuit package
- Patent number 5,539,151
- Issue date Jul 23, 1996
- VLSI Technology, Inc.
- Ahmad Hamzehdoost
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package structure having accessible chip
- Patent number 5,491,362
- Issue date Feb 13, 1996
- VLSI Technology, Inc.
- Ahmad Hamzehdoost
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Plastic encapsulated integrated circuit package having an embedded...
- Patent number 5,430,331
- Issue date Jul 4, 1995
- VLSI Technology, Inc.
- Ahmad Hamzehdoost
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Package structure and method for reducing bond wire inductance
- Patent number 5,371,321
- Issue date Dec 6, 1994
- VLSI Technology, Inc.
- Ahmad Hamzehdoost
- H01 - BASIC ELECTRIC ELEMENTS

Ahmad Hamzehdoost

Person

Patents Grantslast 30 patents

Method of fabricating a BGA package using PCB and tape in a die-up...

Reinforced sealing technique for an integrated circuit package

BGA package using PCB and tape in a die-up configuration

Printed circuit board layout to minimize the clock delay caused by...

BGA package using PCB and tape in a die-down configuration

Cavity down HBGA package structure

Printed circuit board layout to minimize the clock delay caused by...

Method of assembling and cooling a package structure with accessibl...

Multi-layer substrate structure

Reinforced sealing technique for an integrated-circuit package

Package structure having accessible chip

Plastic encapsulated integrated circuit package having an embedded...

Package structure and method for reducing bond wire inductance