Ajay Bhatia

Person

Santa Clara, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Memory device with split power switch
- Patent number 7,952,910
- Issue date May 31, 2011
- Oracle America, Inc.
- Yolin Lih
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory cells with power switch circuit for improved low voltage ope...
- Patent number 7,872,935
- Issue date Jan 18, 2011
- Oracle America, Inc.
- Ajay Bhatia
- G11 - INFORMATION STORAGE
Information Patent Grant
Elastic power for read margin
- Patent number 7,869,263
- Issue date Jan 11, 2011
- Oracle America, Inc.
- Yolin Lih
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic dual output latch
- Patent number 7,710,155
- Issue date May 4, 2010
- Oracle America, Inc.
- Ajay Bhatia
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Elastic power for read and write margins
- Patent number 7,672,187
- Issue date Mar 2, 2010
- Sun Microsystems, Inc.
- Yolin Lih
- G11 - INFORMATION STORAGE
Information Patent Grant
Dynamic voltage scaling for self-timed or racing paths
- Patent number 7,622,979
- Issue date Nov 24, 2009
- Sun Microsytems, Inc.
- Ajay Bhatia
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory cells with power switch circuit for improved low voltage ope...
- Patent number 7,570,537
- Issue date Aug 4, 2009
- Sun Microsystems, Inc.
- Ajay Bhatia
- G11 - INFORMATION STORAGE
Information Patent Grant
Hybrid dual match line architecture for content addressable memorie...
- Patent number 7,474,546
- Issue date Jan 6, 2009
- Sun Microsystems, Inc.
- Shashank Shastry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Race condition improvements in dual match line architectures
- Patent number 7,203,082
- Issue date Apr 10, 2007
- Sun Microsystems, Inc.
- Ajay Bhatia
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Dual match line architecture for content addressable memories and o...
- Patent number 7,200,019
- Issue date Apr 3, 2007
- Sun Microsystems, Inc.
- Ajay Bhatia
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for repairing a memory column
- Patent number 6,724,669
- Issue date Apr 20, 2004
- Silicon Graphics, Inc.
- Ajay Bhatia
- G11 - INFORMATION STORAGE
Information Patent Grant
System and method for a self-calibrating sense-amplifier strobe
- Patent number 6,714,464
- Issue date Mar 30, 2004
- Silicon Graphics, Inc.
- Ajay Bhatia
- G11 - INFORMATION STORAGE

Patents Applicationslast 30 patents

Information Patent Application
MEMORY CELLS WITH POWER SWITCH CIRCUIT FOR IMPROVED LOW VOLTAGE OPE...
- Publication number 20090262594
- Publication date Oct 22, 2009
- SUN MICROSYSTEMS, INC.
- Ajay Bhatia
- G11 - INFORMATION STORAGE
Information Patent Application
DYNAMIC VOLTAGE SCALING FOR SELF-TIMED OR RACING PATHS
- Publication number 20090108899
- Publication date Apr 30, 2009
- Ajay Bhatia
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
MEMORY CELLS WITH POWER SWITCH CIRCUIT FOR IMPROVED LOW VOLTAGE OPE...
- Publication number 20090016138
- Publication date Jan 15, 2009
- Ajay Bhatia
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY DEVICE WITH SPLIT POWER SWITCH
- Publication number 20080273412
- Publication date Nov 6, 2008
- Yolin Lih
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD OF SELECTIVELY POWERING MEMORY DEVICE
- Publication number 20080266995
- Publication date Oct 30, 2008
- Yolin Lih
- G11 - INFORMATION STORAGE
Information Patent Application
DYNAMIC DUAL OUTPUT LATCH
- Publication number 20080258788
- Publication date Oct 23, 2008
- Ajay Bhatia
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
HYBRID DUAL MATCH LINE ARCHITECTURE FOR CONTENT ADDRESSABLE MEMORIE...
- Publication number 20080239778
- Publication date Oct 2, 2008
- Shashank Shastry
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Elastic Power for Read and Write Margins
- Publication number 20080186791
- Publication date Aug 7, 2008
- Montalvo Systems, Inc.
- Yolin Lih
- G11 - INFORMATION STORAGE
Information Patent Application
Elastic Power for Read Margins
- Publication number 20080186795
- Publication date Aug 7, 2008
- Yolin Lih
- G11 - INFORMATION STORAGE
Information Patent Application
SYSTEM AND METHOD FOR A SELF-CALIBRATING SENSE-AMPLIFIER STROBE
- Publication number 20040001364
- Publication date Jan 1, 2004
- Silicon Graphics, Inc.
- Ajay Bhatia
- G11 - INFORMATION STORAGE

Ajay Bhatia

Person

Patents Grantslast 30 patents

Memory device with split power switch

Memory cells with power switch circuit for improved low voltage ope...

Elastic power for read margin

Dynamic dual output latch

Elastic power for read and write margins

Dynamic voltage scaling for self-timed or racing paths

Memory cells with power switch circuit for improved low voltage ope...

Hybrid dual match line architecture for content addressable memorie...

Race condition improvements in dual match line architectures

Dual match line architecture for content addressable memories and o...

System and method for repairing a memory column

System and method for a self-calibrating sense-amplifier strobe

Patents Applicationslast 30 patents

MEMORY CELLS WITH POWER SWITCH CIRCUIT FOR IMPROVED LOW VOLTAGE OPE...

DYNAMIC VOLTAGE SCALING FOR SELF-TIMED OR RACING PATHS

MEMORY CELLS WITH POWER SWITCH CIRCUIT FOR IMPROVED LOW VOLTAGE OPE...

MEMORY DEVICE WITH SPLIT POWER SWITCH

METHOD OF SELECTIVELY POWERING MEMORY DEVICE

DYNAMIC DUAL OUTPUT LATCH

HYBRID DUAL MATCH LINE ARCHITECTURE FOR CONTENT ADDRESSABLE MEMORIE...

Elastic Power for Read and Write Margins

Elastic Power for Read Margins

SYSTEM AND METHOD FOR A SELF-CALIBRATING SENSE-AMPLIFIER STROBE