Ajay Harikumar

Person

Bangalore, IN

People

Patents Grantslast 30 patents

Information Patent Grant
Technologies for scalable translation caching for binary translatio...
- Patent number 10,789,056
- Issue date Sep 29, 2020
- Intel Corporation
- Koichi Yamada
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method, system and apparatus for handling events for partitions in...
- Patent number 8,850,081
- Issue date Sep 30, 2014
- Intel Corporation
- Ajay Harikumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method, system and apparatus for handling events for partitions in...
- Patent number 8,635,380
- Issue date Jan 21, 2014
- Intel Corporation
- Ajay Harikumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method, system and apparatus for main memory access subsystem usage...
- Patent number 8,370,508
- Issue date Feb 5, 2013
- Intel Corporation
- Ajay Harikumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method, apparatus, and system for shared cache usage to different p...
- Patent number 8,296,522
- Issue date Oct 23, 2012
- Intel Corporation
- Ajay Harikumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method, system and apparatus for memory address mapping for sub-soc...
- Patent number 8,151,081
- Issue date Apr 3, 2012
- Intel Corporation
- Ajay Harikumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Booting with sub socket partitioning
- Patent number 7,987,352
- Issue date Jul 26, 2011
- Intel Corporation
- Ajay Harikumar
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
TECHNOLOGIES FOR SCALABLE TRANSLATION CACHING FOR BINARY TRANSLATIO...
- Publication number 20180011696
- Publication date Jan 11, 2018
- Koichi Yamada
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD, SYSTEM AND APPARATUS FOR HANDLING EVENTS FOR PARTITIONS IN...
- Publication number 20140089943
- Publication date Mar 27, 2014
- Ajay Harikumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method,apparatus,and system for shared cache usage to different par...
- Publication number 20090164730
- Publication date Jun 25, 2009
- Ajay Harikumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method,system and apparatus for memory address mapping for sub-sock...
- Publication number 20090164747
- Publication date Jun 25, 2009
- Ajay Harikumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method,system and apparatus for handling events for partitions in a...
- Publication number 20090164739
- Publication date Jun 25, 2009
- Ajay Harikumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method,system and apparatus for main memory access subsystem usage...
- Publication number 20090164751
- Publication date Jun 25, 2009
- Ajay Harikumar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BOOTING WITH SUB SOCKET PARTITIONING
- Publication number 20090144531
- Publication date Jun 4, 2009
- Ajay Harikumar
- G06 - COMPUTING CALCULATING COUNTING

Ajay Harikumar

Person

Patents Grantslast 30 patents

Technologies for scalable translation caching for binary translatio...

Method, system and apparatus for handling events for partitions in...

Method, system and apparatus for handling events for partitions in...

Method, system and apparatus for main memory access subsystem usage...

Method, apparatus, and system for shared cache usage to different p...

Method, system and apparatus for memory address mapping for sub-soc...

Booting with sub socket partitioning

Patents Applicationslast 30 patents

TECHNOLOGIES FOR SCALABLE TRANSLATION CACHING FOR BINARY TRANSLATIO...

METHOD, SYSTEM AND APPARATUS FOR HANDLING EVENTS FOR PARTITIONS IN...

Method,apparatus,and system for shared cache usage to different par...

Method,system and apparatus for memory address mapping for sub-sock...

Method,system and apparatus for handling events for partitions in a...

Method,system and apparatus for main memory access subsystem usage...

BOOTING WITH SUB SOCKET PARTITIONING