Ajay Tomar

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Uttar Pradash, IN

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Patents Grantslast 30 patents

Information Patent Grant
Mapping programmable logic devices
- Patent number 8,028,262
- Issue date Sep 27, 2011
- Sicronic Remote KG, LLC
- Ajay Tomar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Optimal mapping of LUT based FPGA
- Patent number 7,415,681
- Issue date Aug 19, 2008
- Sicronic Remote KG, LLC
- Ajay Tomar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for mapping a logic circuit to a programmable look up table...
- Patent number 7,191,427
- Issue date Mar 13, 2007
- STMicroelectonics PVT Ltd.
- Sunil Kumar Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for finding maximum volume and minimum cut in a network of i...
- Patent number 7,188,328
- Issue date Mar 6, 2007
- STMicroelectronics Pvt. Ltd.
- Sunil Kumar Sharma
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Mapping Programmable Logic Devices
- Publication number 20080209385
- Publication date Aug 28, 2008
- Sicronic Remote KG
- Ajay Tomar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for finding maximum volume and minimum cut in a network of i...
- Publication number 20050235236
- Publication date Oct 20, 2005
- STMicroelectronics Pvt. Ltd.
- Sunil Kumar Sharma
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Optimal mapping of LUT based FPGA
- Publication number 20050156626
- Publication date Jul 21, 2005
- STMicroelectronics Pvt. Ltd.
- Ajay Tomar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for mapping a logic circuit to a programmable look up table...
- Publication number 20050039157
- Publication date Feb 17, 2005
- STMicroelectronics Pvt. Ltd.
- Sunil Kumar Sharma
- G06 - COMPUTING CALCULATING COUNTING