Ajit K. Medhekar

Person

San Jose, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Enhanced binary content addressable memory for longest prefix addre...
- Patent number 6,266,262
- Issue date Jul 24, 2001
- Lara Technology, Inc.
- James G. Washburn
- G11 - INFORMATION STORAGE
Information Patent Grant
Ternary content addressable memory (CAM) having fast insertion and...
- Patent number 6,081,440
- Issue date Jun 27, 2000
- Lara Technology, Inc.
- James G. Washburn
- G11 - INFORMATION STORAGE
Information Patent Grant
Fusible link structure for semiconductor devices
- Patent number 6,025,214
- Issue date Feb 15, 2000
- Alliance Semiconductor Corporation
- Chitranjan N. Reddy
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Laser fusible link structure for semiconductor devices
- Patent number 5,747,868
- Issue date May 5, 1998
- Alliance Semiconductor Corporation
- Chitranjan N. Reddy
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Output buffer circuit with low power pre-output drive
- Patent number 5,654,648
- Issue date Aug 5, 1997
- Alliance Semiconductor Corporation
- Ajit K. Medhekar
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Timing delay modulation scheme for integrated circuits
- Patent number 5,550,500
- Issue date Aug 27, 1996
- Alliance Semiconductor Corporation
- Michael C. Stephens
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Phase shift correction circuit for monolithic random access memory
- Patent number 5,550,783
- Issue date Aug 27, 1996
- Alliance Semiconductor Corporation
- Michael C. Stephens
- G11 - INFORMATION STORAGE
Information Patent Grant
Synchronous static random access memory having asynchronous test mode
- Patent number 5,548,560
- Issue date Aug 20, 1996
- Alliance Semiconductor Corporation
- Michael C. Stephens
- G11 - INFORMATION STORAGE
Information Patent Grant
High speed and hierarchical address transition detection circuit
- Patent number 5,448,529
- Issue date Sep 5, 1995
- Alliance Semiconductor Corporation
- Chitranjan N. Reddy
- G11 - INFORMATION STORAGE
Information Patent Grant
Compact multiplexer circuit
- Patent number 5,428,306
- Issue date Jun 27, 1995
- Alliance Semiconductor Corporation
- Eric Voelkel
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Hierarchical redundancy scheme for high density monolithic memories
- Patent number 5,377,146
- Issue date Dec 27, 1994
- Alliance Semiconductor Corporation
- Chitranjan N. Reddy
- G11 - INFORMATION STORAGE
Information Patent Grant
Segmented bus architecture for improving speed in integrated circui...
- Patent number 5,375,097
- Issue date Dec 20, 1994
- Chitranjan N. Reddy
- G11 - INFORMATION STORAGE
Information Patent Grant
High-speed address transition detection circuit
- Patent number 5,306,958
- Issue date Apr 26, 1994
- Alliance Semiconductor Corporation
- Chitranjan N. Reddy
- G11 - INFORMATION STORAGE

Ajit K. Medhekar

Person

Patents Grantslast 30 patents

Enhanced binary content addressable memory for longest prefix addre...

Ternary content addressable memory (CAM) having fast insertion and...

Fusible link structure for semiconductor devices

Laser fusible link structure for semiconductor devices

Output buffer circuit with low power pre-output drive

Timing delay modulation scheme for integrated circuits

Phase shift correction circuit for monolithic random access memory

Synchronous static random access memory having asynchronous test mode

High speed and hierarchical address transition detection circuit

Compact multiplexer circuit

Hierarchical redundancy scheme for high density monolithic memories

Segmented bus architecture for improving speed in integrated circui...

High-speed address transition detection circuit