Ajit Kumar Verma

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San Jose, CA, US

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Patents Grantslast 30 patents

Information Patent Grant
Verification of embedded test structures in circuit designs
- Patent number 7,103,860
- Issue date Sep 5, 2006
- LogicVision, Inc.
- Paul Price
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Verification of embedded test structures in circuit designs
- Publication number 20030149949
- Publication date Aug 7, 2003
- Paul Price
- G06 - COMPUTING CALCULATING COUNTING