Ajoy Mandal

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Bangalore, IN

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Patents Grantslast 30 patents

Information Patent Grant
Method for designing a semiconductor device based on leakage curren...
- Patent number 8,296,701
- Issue date Oct 23, 2012
- Texas Instruments Incorporated
- Palkesh Jain
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fabricating IC with NBTI path delay within timing constraints
- Patent number 8,255,850
- Issue date Aug 28, 2012
- Texas Instruments Incorporated
- Palkesh Jain
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for determining electro-migration in integrate...
- Patent number 7,752,582
- Issue date Jul 6, 2010
- Texas Instruments Incorporated
- Palkesh Jain
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
METHOD AND SYSTEM FOR AGING AWARE MODELING AND STATIC TIMING ANALYS...
- Publication number 20240330555
- Publication date Oct 3, 2024
- INDIAN INSTITUTE OF TECHNOLOGY KHARAGPUR
- Anand Bulusu
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR TIMING SIGNOFF IN MIXED-TRANSISTOR DESIGNS
- Publication number 20230195984
- Publication date Jun 22, 2023
- TEXAS INSTRUMENTS INCORPORATED
- Ajoy MANDAL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD FOR DESIGNING A SEMICONDUCTOR DEVICE BASED ON LEAKAGE CURREN...
- Publication number 20120167031
- Publication date Jun 28, 2012
- TEXAS INSTRUMENTS INCORPORATED
- Palkesh Jain
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DESIGN OF INTEGRATED CIRCUITS LESS SUSCEPTIBLE TO DEGRADATIONS IN T...
- Publication number 20090187868
- Publication date Jul 23, 2009
- TEXAS INSTRUMENTS INCORPORATED
- Palkesh Jain
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND APPARATUS FOR DETERMINING ELECTRO-MIGRATION IN INTEGRAT...
- Publication number 20090132972
- Publication date May 21, 2009
- PALKESH JAIN
- G06 - COMPUTING CALCULATING COUNTING