TREA

Akio Shimano

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  • Takatsuki, JP
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Patents Grantslast 30 patents

  • Information Patent Grant

    Mesfet latch circuit
    • Patent number 4,883,985
    • Issue date Nov 28, 1989
    • Matsushita Electric Industrial Co., Ltd.
    • Shin Katsu
    • H03 - BASIC ELECTRONIC CIRCUITRY
  • Information Patent Grant

    Buffered FET logic gate using depletion-mode MESFET's.
    • Patent number 4,712,023
    • Issue date Dec 8, 1987
    • Matsushita Electric Industrial Co., Ltd.
    • Tatsuo Otsuki
    • H03 - BASIC ELECTRONIC CIRCUITRY
  • Information Patent Grant

    Method of making semiconductor device
    • Patent number 4,247,373
    • Issue date Jan 27, 1981
    • Matsushita Electric Industrial Co., Ltd.
    • Akio Shimano
    • H01 - BASIC ELECTRIC ELEMENTS