Alan R. Bormann

Person

Austin, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
BICMOS output buffer circuit having overshoot protection
- Patent number 5,497,106
- Issue date Mar 5, 1996
- Motorola Inc.
- Donovan Raatz
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Output buffer for improving di/dt
- Patent number 4,906,866
- Issue date Mar 6, 1990
- Motorola, Inc.
- Samuel E. Alexander
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Output buffer for improving di/dt
- Patent number 4,800,298
- Issue date Jan 24, 1989
- Motorola, Inc.
- Ruey J. Yu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Low power MOS RAM address decode circuit
- Patent number 4,048,629
- Issue date Sep 13, 1977
- Motorola, Inc.
- Alan Richard Bormann
- G11 - INFORMATION STORAGE
Information Patent Grant
Static storage technique for four transistor IGFET memory cell
- Patent number 4,023,149
- Issue date May 10, 1977
- Motorola, Inc.
- Alan R. Bormann
- G11 - INFORMATION STORAGE
Information Patent Grant
Low power output disable circuit for random access memory
- Patent number 4,019,068
- Issue date Apr 19, 1977
- Motorola, Inc.
- Alan Richard Bormann
- G11 - INFORMATION STORAGE
Information Patent Grant
Select line hold down circuit for MOS memory decoder
- Patent number 4,011,549
- Issue date Mar 8, 1977
- Motorola, Inc.
- Alan Richard Bormann
- G11 - INFORMATION STORAGE
Information Patent Grant
Read-write circuitry for one transistor per bit random access memory
- Patent number 4,004,285
- Issue date Jan 18, 1977
- Motorola, Inc.
- Alan Richard Bormann
- G11 - INFORMATION STORAGE

Alan R. Bormann

Person

Patents Grantslast 30 patents

BICMOS output buffer circuit having overshoot protection

Output buffer for improving di/dt

Output buffer for improving di/dt

Low power MOS RAM address decode circuit

Static storage technique for four transistor IGFET memory cell

Low power output disable circuit for random access memory

Select line hold down circuit for MOS memory decoder

Read-write circuitry for one transistor per bit random access memory