Alan S. Krech

Person

Fort Collions, CO, US

People

Patents Grantslast 30 patents

Information Patent Grant
Automated test equipment for testing one or more devices under test...
- Patent number 11,913,990
- Issue date Feb 27, 2024
- Advantest Corporation
- Olaf Pöppe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Automated test equipment for testing one or more devices under test...
- Patent number 11,415,628
- Issue date Aug 16, 2022
- Advantest Corporation
- Olaf Pöppe
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated protocol analyzer configured within automated test equip...
- Patent number 10,948,540
- Issue date Mar 16, 2021
- Advantest Corporation
- Jesse Hobbs
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Adapting serdes receivers to a UFS receiver protocol
- Patent number 10,693,568
- Issue date Jun 23, 2020
- Advantest Corporation
- Sivanarayana Pandian Rajadurai
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus to provide both high speed and low speed signa...
- Patent number 10,652,131
- Issue date May 12, 2020
- Advantest Corporation
- Michael Jones
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and system for advanced fail data transfer mechanisms
- Patent number 9,842,038
- Issue date Dec 12, 2017
- Advantest Corporation
- Xinguo Zhang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Testing memory devices with parallel processing operations
- Patent number 9,612,272
- Issue date Apr 4, 2017
- Advantest Corporation
- Xinguo Zhang
- G11 - INFORMATION STORAGE
Information Patent Grant
Staged buffer caching in a system for testing a device under test
- Patent number 9,281,080
- Issue date Mar 8, 2016
- Advantest Corporation
- Michael Jones
- G11 - INFORMATION STORAGE
Information Patent Grant
Flexible test site synchronization
- Patent number 9,267,965
- Issue date Feb 23, 2016
- Advantest Corporation
- Michael Jones
- G01 - MEASURING TESTING
Information Patent Grant
Mapping logic for loading control of crossbar multiplexer select RAM
- Patent number 7,404,122
- Issue date Jul 22, 2008
- Agilent Technologies, Inc.
- Alan Starr Krech
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Algorithmically programmable memory tester with breakpoint trigger,...
- Patent number 6,834,364
- Issue date Dec 21, 2004
- Agilent Technologies, Inc.
- Alan S Krech
- G11 - INFORMATION STORAGE
Information Patent Grant
Simultaneous display of data gathered using multiple data gathering...
- Patent number 6,833,695
- Issue date Dec 21, 2004
- Agilent Technologies, Inc.
- Hsui-Huan Shen
- G01 - MEASURING TESTING
Information Patent Grant
Recapture of a portion of a displayed waveform without loss of exis...
- Patent number 6,781,584
- Issue date Aug 24, 2004
- Agilent Technologies, Inc.
- Hsiu-Huan Shen
- G01 - MEASURING TESTING
Information Patent Grant
Algorithmically programmable memory tester with test sites operatin...
- Patent number 6,779,140
- Issue date Aug 17, 2004
- Agilent Technologies, Inc.
- Alan S Krech
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for coordinating program execution in a site c...
- Patent number 6,763,490
- Issue date Jul 13, 2004
- Agilent Technologies, Inc.
- Alan S Krech
- G11 - INFORMATION STORAGE
Information Patent Grant
Memory tester omits programming of addresses in detected bad columns
- Patent number 6,748,562
- Issue date Jun 8, 2004
- Agilent Technologies, Inc.
- Alan S Krech
- G11 - INFORMATION STORAGE
Information Patent Grant
Apparatus and method for storing information during a test program
- Patent number 6,687,855
- Issue date Feb 3, 2004
- Agilent Technologies, Inc.
- Alan S Krech
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Memory tester tests multiple DUT's per test site
- Patent number 6,671,844
- Issue date Dec 30, 2003
- Agilent Technologies, Inc.
- Alan S Krech
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for executing a program using primary, seconda...
- Patent number 6,598,112
- Issue date Jul 22, 2003
- Agilent Technologies, Inc.
- Stephen D Jordan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for inserting programmable latency between add...
- Patent number 6,591,385
- Issue date Jul 8, 2003
- Agilent Technologies, Inc.
- Alan S Krech
- G11 - INFORMATION STORAGE
Information Patent Grant
Algorithmically programmable memory tester with history FIFO&#x0002...
- Patent number 6,574,764
- Issue date Jun 3, 2003
- Agilent Technologies, Inc.
- Alan S. Krech
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and apparatus for administration of extended memory
- Patent number 6,574,626
- Issue date Jun 3, 2003
- Agilent Technologies, Inc.
- Yury Regelman
- G11 - INFORMATION STORAGE
Information Patent Grant
ROM-based control unit in a geometry accelerator for a computer gra...
- Patent number 6,219,071
- Issue date Apr 17, 2001
- Hewlett-Packard Company
- Alan S. Krech
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Centralized branch intelligence system and method for a geometry ac...
- Patent number 6,184,902
- Issue date Feb 6, 2001
- Hewlett-Packard Company
- Alan S. Krech
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Graphics accelerator with constant color identifier
- Patent number 6,057,852
- Issue date May 2, 2000
- Hewlett-Packard Company
- Alan S. Krech
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Graphic accelerator architecture using two graphics processing unit...
- Patent number 6,003,098
- Issue date Dec 14, 1999
- Hewlett-Packard Company
- Alan S. Krech
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Caching and coherency control of multiple geometry accelerators in...
- Patent number 5,969,726
- Issue date Oct 19, 1999
- Hewlett-Packard Co.
- Eric M. Rentschler
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Graphics accelerator with improved lighting processor
- Patent number 5,956,042
- Issue date Sep 21, 1999
- Hewlett-Packard Co.
- S Paul Tucker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
ROM-based control units in a geometry accelerator for a computer gr...
- Patent number 5,956,047
- Issue date Sep 21, 1999
- Hewlett-Packard Co.
- Alan S. Krech
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for processing graphics primitives in multiple...
- Patent number 5,949,440
- Issue date Sep 7, 1999
- Hewlett Packard Compnay
- Alan S. Krech
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
AUTOMATED TEST EQUIPMENT FOR TESTING ONE OR MORE DEVICES UNDER TEST...
- Publication number 20210073094
- Publication date Mar 11, 2021
- Advantest Corporation
- Olaf PÖPPE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
AUTOMATED TEST EQUIPMENT FOR TESTING ONE OR MORE DEVICES UNDER TEST...
- Publication number 20210055347
- Publication date Feb 25, 2021
- Advantest Corporation
- Olaf PÖPPE
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADAPTING SERDES RECEIVERS TO A UFS RECEIVER PROTOCOL
- Publication number 20200036453
- Publication date Jan 30, 2020
- Sivanarayana Pandian RAJADURAI
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
INTEGRATED PROTOCOL ANALYZER CONFIGURED WITHIN AUTOMATED TEST EQUIP...
- Publication number 20200033409
- Publication date Jan 30, 2020
- Advantest Corporation
- Jesse HOBBS
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD AND SYSTEM FOR ADVANCED FAIL DATA TRANSFER MECHANISMS
- Publication number 20160321153
- Publication date Nov 3, 2016
- Advantest Corporation
- Xinguo ZHANG
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method And Apparatus To Provide Both High Speed And Low Speed Signa...
- Publication number 20160036684
- Publication date Feb 4, 2016
- Advantest Corporation
- Michael Jones
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
STAGED BUFFER CACHING IN A SYSTEM FOR TESTING A DEVICE UNDER TEST
- Publication number 20150262705
- Publication date Sep 17, 2015
- Advantest Corporation
- Michael JONES
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY TESTING AND FAILURE DATA FILTERING
- Publication number 20150255175
- Publication date Sep 10, 2015
- Advantest Corporation
- Matt HYDER
- G11 - INFORMATION STORAGE
Information Patent Application
MEMORY TEST ECC AUTO-CORRECTION OF FAILING DATA
- Publication number 20150255176
- Publication date Sep 10, 2015
- Advantest Corporation
- Matt HYDER
- G11 - INFORMATION STORAGE
Information Patent Application
TESTING MEMORY DEVICES WITH PARALLEL PROCESSING OPERATIONS
- Publication number 20150243369
- Publication date Aug 27, 2015
- Advantest Corporation
- Xinguo ZHANG
- G01 - MEASURING TESTING
Information Patent Application
FLEXIBLE TEST SITE SYNCHRONIZATION
- Publication number 20150137839
- Publication date May 21, 2015
- Advantest Corporation
- Michael JONES
- G01 - MEASURING TESTING
Information Patent Application
Mapping logic for loading control of crossbar multiplexer select RAM
- Publication number 20070300117
- Publication date Dec 27, 2007
- Alan Starr Krech
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Memory device fail summary data reduction for improved redundancy a...
- Publication number 20070195618
- Publication date Aug 23, 2007
- Alan S. Krech
- G01 - MEASURING TESTING
Information Patent Application
Memory tester uses arbitrary dynamic mappings to serialize vectors...
- Publication number 20040078740
- Publication date Apr 22, 2004
- John H. Cook
- G11 - INFORMATION STORAGE
Information Patent Application
Recapture of a portion of a displayed waveform without loss of exis...
- Publication number 20040017371
- Publication date Jan 29, 2004
- Hsiu-Huan Shen
- G01 - MEASURING TESTING
Information Patent Application
Simultaneous display of data gathered using multiple data gathering...
- Publication number 20040017184
- Publication date Jan 29, 2004
- Hsiu-Huan Shen
- G01 - MEASURING TESTING
Information Patent Application
Reconstruction of non-deterministic algorithmic tester stimulus use...
- Publication number 20040019839
- Publication date Jan 29, 2004
- Alan S. Krech
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Algorithmically programmable memory tester with test sites operatin...
- Publication number 20030005375
- Publication date Jan 2, 2003
- Alan S. Krech
- G01 - MEASURING TESTING
Information Patent Application
Algorithmically programmable memory tester with history FIFO's that...
- Publication number 20020162046
- Publication date Oct 31, 2002
- Alan S. Krech
- G11 - INFORMATION STORAGE
Information Patent Application
Algorithmically programmable memory tester with breakpoint trigger,...
- Publication number 20020157042
- Publication date Oct 24, 2002
- Alan S. Krech
- G11 - INFORMATION STORAGE

Alan S. Krech

Person

Patents Grantslast 30 patents

Automated test equipment for testing one or more devices under test...

Automated test equipment for testing one or more devices under test...

Integrated protocol analyzer configured within automated test equip...

Adapting serdes receivers to a UFS receiver protocol

Method and apparatus to provide both high speed and low speed signa...

Method and system for advanced fail data transfer mechanisms

Testing memory devices with parallel processing operations

Staged buffer caching in a system for testing a device under test

Flexible test site synchronization

Mapping logic for loading control of crossbar multiplexer select RAM

Algorithmically programmable memory tester with breakpoint trigger,...

Simultaneous display of data gathered using multiple data gathering...

Recapture of a portion of a displayed waveform without loss of exis...

Algorithmically programmable memory tester with test sites operatin...

Method and apparatus for coordinating program execution in a site c...

Memory tester omits programming of addresses in detected bad columns

Apparatus and method for storing information during a test program

Memory tester tests multiple DUT&#x00027;s per test site

Method and apparatus for executing a program using primary, seconda...

Method and apparatus for inserting programmable latency between add...

Algorithmically programmable memory tester with history FIFO&#x0002...

Method and apparatus for administration of extended memory

ROM-based control unit in a geometry accelerator for a computer gra...

Centralized branch intelligence system and method for a geometry ac...

Graphics accelerator with constant color identifier

Graphic accelerator architecture using two graphics processing unit...

Caching and coherency control of multiple geometry accelerators in...

Graphics accelerator with improved lighting processor

ROM-based control units in a geometry accelerator for a computer gr...

Method and apparatus for processing graphics primitives in multiple...

Patents Applicationslast 30 patents

AUTOMATED TEST EQUIPMENT FOR TESTING ONE OR MORE DEVICES UNDER TEST...

AUTOMATED TEST EQUIPMENT FOR TESTING ONE OR MORE DEVICES UNDER TEST...

ADAPTING SERDES RECEIVERS TO A UFS RECEIVER PROTOCOL

INTEGRATED PROTOCOL ANALYZER CONFIGURED WITHIN AUTOMATED TEST EQUIP...

METHOD AND SYSTEM FOR ADVANCED FAIL DATA TRANSFER MECHANISMS

Method And Apparatus To Provide Both High Speed And Low Speed Signa...

STAGED BUFFER CACHING IN A SYSTEM FOR TESTING A DEVICE UNDER TEST

MEMORY TESTING AND FAILURE DATA FILTERING

MEMORY TEST ECC AUTO-CORRECTION OF FAILING DATA

TESTING MEMORY DEVICES WITH PARALLEL PROCESSING OPERATIONS

FLEXIBLE TEST SITE SYNCHRONIZATION

Mapping logic for loading control of crossbar multiplexer select RAM

Memory device fail summary data reduction for improved redundancy a...

Memory tester uses arbitrary dynamic mappings to serialize vectors...

Recapture of a portion of a displayed waveform without loss of exis...

Simultaneous display of data gathered using multiple data gathering...

Reconstruction of non-deterministic algorithmic tester stimulus use...

Algorithmically programmable memory tester with test sites operatin...

Algorithmically programmable memory tester with history FIFO's that...

Algorithmically programmable memory tester with breakpoint trigger,...

Memory tester tests multiple DUT's per test site