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Albert HARJONO
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Milpitas, CA, US
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last 30 patents
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Patent Grant
Phase lock loop (PLL/FLL) clock signal generation with frequency sc...
Patent number
9,312,866
Issue date
Apr 12, 2016
NVIDIA Corporation
Tao Liu
H03 - BASIC ELECTRONIC CIRCUITRY
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last 30 patents
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Patent Application
PHASE LOCK LOOP (PLL/FLL) CLOCK SIGNAL GENERATION WITH FREQUENCY SC...
Publication number
20150214963
Publication date
Jul 30, 2015
NVIDIA Corporation
Tao LIU
H03 - BASIC ELECTRONIC CIRCUITRY