Albert Y. Chang

Person

Poughkeepsie, NY, US

People

Patents Grantslast 30 patents

Information Patent Grant
System and method for invalidating an entry in a translation unit
- Patent number 6,338,128
- Issue date Jan 8, 2002
- International Business Machines Corp.
- Albert Chang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Methods for caching cache tags
- Patent number 6,311,253
- Issue date Oct 30, 2001
- International Business Machines Corporation
- Albert Chang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Virtual memory address translation mechanism with controlled data p...
- Patent number RE37305
- Issue date Jul 31, 2001
- International Business Machines Corporation
- Albert Chang
- 711 - Electrical computers and digital processing systems: memory
Information Patent Grant
Method to control paging subsystem processing in virtual memory dat...
- Patent number RE36462
- Issue date Dec 21, 1999
- International Business Machines Corporation
- Albert Chang
- 711 - Electrical computers and digital processing systems: memory
Information Patent Grant
Circuitry and method for relating first and second memory locations...
- Patent number 5,835,928
- Issue date Nov 10, 1998
- International Business Machines Corporation
- Marc Alan Auslander
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
I/O cache controller containing a buffer memory partitioned into li...
- Patent number 5,418,927
- Issue date May 23, 1995
- International Business Machines Corporation
- Albert Chang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data processing method to create virtual disks from non-contiguous...
- Patent number 5,129,088
- Issue date Jul 7, 1992
- International Business Machines Corporation
- Marc A. Auslander
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Driver circuit for testing bi-directional transceiver semiconductor...
- Patent number 5,097,144
- Issue date Mar 17, 1992
- International Business Machines Corporation
- Albert Y. Chang
- G01 - MEASURING TESTING
Information Patent Grant
Memory controller for protected memory with automatic access granti...
- Patent number 4,937,736
- Issue date Jun 26, 1990
- International Business Machines Corporation
- Albert Chang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for using cached data at a local node after re-op...
- Patent number 4,897,781
- Issue date Jan 30, 1990
- International Business Machines Corporation
- Albert Chang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method to control paging subsystem processing in a virtual memory d...
- Patent number 4,718,008
- Issue date Jan 5, 1988
- International Business Machines Corporation
- Albert Chang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Bi-directional transceiver circuit
- Patent number 4,698,800
- Issue date Oct 6, 1987
- International Business Machines Corporation
- Joseph R. Cavaliere
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Virtual memory address translation mechanism with controlled data p...
- Patent number 4,638,426
- Issue date Jan 20, 1987
- International Business Machines Corporation
- Albert Chang
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Current switch emitter follower latch having output signals with re...
- Patent number 4,311,925
- Issue date Jan 19, 1982
- International Business Machines Corporation
- Albert Y. Chang
- G11 - INFORMATION STORAGE

Albert Y. Chang

Person

Patents Grantslast 30 patents

System and method for invalidating an entry in a translation unit

Methods for caching cache tags

Virtual memory address translation mechanism with controlled data p...

Method to control paging subsystem processing in virtual memory dat...

Circuitry and method for relating first and second memory locations...

I/O cache controller containing a buffer memory partitioned into li...

Data processing method to create virtual disks from non-contiguous...

Driver circuit for testing bi-directional transceiver semiconductor...

Memory controller for protected memory with automatic access granti...

System and method for using cached data at a local node after re-op...

Method to control paging subsystem processing in a virtual memory d...

Bi-directional transceiver circuit

Virtual memory address translation mechanism with controlled data p...

Current switch emitter follower latch having output signals with re...