Alejandro Flavio Gonzalez

Person

Alpharetta, GA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Support for multiple widths of DRAM in double data rate controllers...
- Patent number 10,956,349
- Issue date Mar 23, 2021
- Integrated Device Technology, Inc.
- Alejandro F. Gonzalez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
DDR5 RCD interface protocol and operation
- Patent number 10,776,293
- Issue date Sep 15, 2020
- Integrated Device Technology, Inc.
- Shwetal Arvind Patel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
DDR5 PMIC interface protocol and operation
- Patent number 10,769,082
- Issue date Sep 8, 2020
- Integrated Device Technology, Inc.
- Shwetal Arvind Patel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Command sequence response in a memory data buffer
- Patent number 10,671,300
- Issue date Jun 2, 2020
- Intergrated Device Technology, Inc.
- Craig DeSimone
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Double data rate controllers and data buffers with support for mult...
- Patent number 10,565,144
- Issue date Feb 18, 2020
- Integrated Device Technology, Inc.
- Alejandro F. Gonzalez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Flexible point-to-point memory topology
- Patent number 10,325,637
- Issue date Jun 18, 2019
- Integrated Device Technology, Inc.
- Alejandro F. Gonzalez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Command sequence response in a memory data buffer
- Patent number 10,198,200
- Issue date Feb 5, 2019
- Integrated Device Technology, Inc.
- Craig DeSimone
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Flexible point-to-point memory topology
- Patent number 10,032,497
- Issue date Jul 24, 2018
- Integrated Device Technology, Inc.
- Alejandro F. Gonzalez
- G11 - INFORMATION STORAGE
Information Patent Grant
Inferring sampled data in decision feedback equalizer at restart of...
- Patent number 9,860,088
- Issue date Jan 2, 2018
- Intergrated Device Technology, Inc.
- Craig DeSimone
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
AC coupled clock receiver with common-mode noise rejection
- Patent number 8,693,557
- Issue date Apr 8, 2014
- Integrated Device Technology Inc.
- Liang Leon Zhang
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Method and apparatus for implementation of PLL minimum frequency vi...
- Patent number 8,513,992
- Issue date Aug 20, 2013
- Integrated Device Technology, Inc.
- Amit Majumder
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
DRAM interface circuits that support fast deskew calibration and me...
- Patent number 7,555,668
- Issue date Jun 30, 2009
- Integrated Device Technology, Inc.
- Paul Joseph Murtagh
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
SUPPORT FOR MULTIPLE WIDTHS OF DRAM IN DOUBLE DATA RATE CONTROLLERS...
- Publication number 20200117629
- Publication date Apr 16, 2020
- Integrated Device Technology, Inc.
- Alejandro F. Gonzalez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DDR5 PMIC INTERFACE PROTOCOL AND OPERATION
- Publication number 20190340142
- Publication date Nov 7, 2019
- Integrated Device Technology, Inc.
- Shwetal Arvind Patel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DDR5 RCD INTERFACE PROTOCOL AND OPERATION
- Publication number 20190340141
- Publication date Nov 7, 2019
- Integrated Device Technology, Inc.
- Shwetal Arvind Patel
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SUPPORT FOR MULTIPLE WIDTHS OF DRAM IN DOUBLE DATA RATE CONTROLLERS...
- Publication number 20190129879
- Publication date May 2, 2019
- Integrated Device Technology, Inc.
- Alejandro F. Gonzalez
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
FLEXIBLE POINT-TO-POINT MEMORY TOPOLOGY
- Publication number 20190013054
- Publication date Jan 10, 2019
- Integrated Device Technology, Inc.
- Alejandro F. Gonzalez
- G11 - INFORMATION STORAGE
Information Patent Application
FLEXIBLE POINT-TO-POINT MEMORY TOPOLOGY
- Publication number 20170287538
- Publication date Oct 5, 2017
- Integrated Device Technology, Inc.
- Alejandro F. Gonzalez
- G11 - INFORMATION STORAGE
Information Patent Application
DRAM interface circuits that support fast deskew calibration and me...
- Publication number 20080022145
- Publication date Jan 24, 2008
- Paul Joseph Murtagh
- G06 - COMPUTING CALCULATING COUNTING

Alejandro Flavio Gonzalez

Person

Patents Grantslast 30 patents

Support for multiple widths of DRAM in double data rate controllers...

DDR5 RCD interface protocol and operation

DDR5 PMIC interface protocol and operation

Command sequence response in a memory data buffer

Double data rate controllers and data buffers with support for mult...

Flexible point-to-point memory topology

Command sequence response in a memory data buffer

Flexible point-to-point memory topology

Inferring sampled data in decision feedback equalizer at restart of...

AC coupled clock receiver with common-mode noise rejection

Method and apparatus for implementation of PLL minimum frequency vi...

DRAM interface circuits that support fast deskew calibration and me...

Patents Applicationslast 30 patents

SUPPORT FOR MULTIPLE WIDTHS OF DRAM IN DOUBLE DATA RATE CONTROLLERS...

DDR5 PMIC INTERFACE PROTOCOL AND OPERATION

DDR5 RCD INTERFACE PROTOCOL AND OPERATION

SUPPORT FOR MULTIPLE WIDTHS OF DRAM IN DOUBLE DATA RATE CONTROLLERS...

FLEXIBLE POINT-TO-POINT MEMORY TOPOLOGY

FLEXIBLE POINT-TO-POINT MEMORY TOPOLOGY

DRAM interface circuits that support fast deskew calibration and me...