Alessandro D'Aquila

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Palermo, IT

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Patents Grantslast 30 patents

Information Patent Grant
Method and circuit for minimizing glitches in phase-locked loops
- Patent number 6,774,731
- Issue date Aug 10, 2004
- STMicroelectronics S.r.l.
- Antonio Magazzu
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and circuit for minimizing glitches in phase-locked loops
- Patent number 6,593,817
- Issue date Jul 15, 2003
- STMicroelectronics S.r.l.
- Antonio Magazz'
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
High-precision biasing circuit for a cascoded CMOS stage, particula...
- Patent number 6,392,490
- Issue date May 21, 2002
- STMicroeletronics S.r.l.
- Giuseppe Gramegna
- G05 - CONTROLLING REGULATING

Patents Applicationslast 30 patents

Information Patent Application
Method and circuit for minimizing glitches in phase-locked loops
- Publication number 20030071689
- Publication date Apr 17, 2003
- STMicroelectronics S.r. I.
- Antonio Magazzu
- H03 - BASIC ELECTRONIC CIRCUITRY