Alex Gerber

Person

Haifa, IL

People

Patents Grantslast 30 patents

Information Patent Grant
Enabling removal and reconstruction of flag operations in a processor
- Patent number 11,709,678
- Issue date Jul 25, 2023
- Intel Corporation
- Zeev Sperber
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Enabling removal and reconstruction of flag operations in a processor
- Patent number 11,036,509
- Issue date Jun 15, 2021
- Intel Corporation
- Zeev Sperber
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Suspendable load address tracking inside transactions
- Patent number 10,146,538
- Issue date Dec 4, 2018
- Intel Corporation
- Raanan Sade
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Detecting errors in register renaming by comparing value representi...
- Patent number 10,133,620
- Issue date Nov 20, 2018
- Intel Corporation
- Alex Gerber
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Instruction and logic for register based hardware memory renaming
- Patent number 10,095,522
- Issue date Oct 9, 2018
- Intel Corporation
- Kamil Garifullin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Local power gate (LPG) interfaces for power-aware operations
- Patent number 9,519,324
- Issue date Dec 13, 2016
- Intel Corporation
- Michael Mishaeli
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
ENABLING REMOVAL AND RECONSTRUCTION OF FLAG OPERATIONS IN A PROCESSOR
- Publication number 20210357216
- Publication date Nov 18, 2021
- Intel Corporation
- Zeev Sperber
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DETECTING ERRORS IN REGISTER RENAMING BY COMPARING VALUE REPRESENTI...
- Publication number 20180196706
- Publication date Jul 12, 2018
- Intel Corporation
- Alex Gerber
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SUSPENDABLE LOAD ADDRESS TRACKING INSIDE TRANSACTIONS
- Publication number 20180095759
- Publication date Apr 5, 2018
- Raanan Sade
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PERFORMING FOLDING OF IMMEDIATE DATA IN A PROCESSOR
- Publication number 20170123799
- Publication date May 4, 2017
- Intel Corporation
- Zeev Sperber
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ENABLING REMOVAL AND RECONSTRUCTION OF FLAG OPERATIONS IN A PROCESSOR
- Publication number 20170123793
- Publication date May 4, 2017
- Intel Corporation
- Zeev Sperber
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOCAL POWER GATE (LPG) INTERFACES FOR POWER-AWARE OPERATIONS
- Publication number 20170068298
- Publication date Mar 9, 2017
- Intel Corporation
- Michael Mishaeli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION AND LOGIC FOR REGISTER BASED HARDWARE MEMORY RENAMING
- Publication number 20160179545
- Publication date Jun 23, 2016
- Kamil Garifullin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INSTRUCTION AND LOGIC FOR EXECUTING INSTRUCTIONS OF MULTIPLE-WIDTHS
- Publication number 20160026467
- Publication date Jan 28, 2016
- Intel Corporation
- Zeev Sperber
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOCAL POWER GATE (LPG) INTERFACES FOR POWER-AWARE OPERATIONS
- Publication number 20150277532
- Publication date Oct 1, 2015
- MICHAEL MISHAELI
- G06 - COMPUTING CALCULATING COUNTING

Alex Gerber

Person

Patents Grantslast 30 patents

Enabling removal and reconstruction of flag operations in a processor

Enabling removal and reconstruction of flag operations in a processor

Suspendable load address tracking inside transactions

Detecting errors in register renaming by comparing value representi...

Instruction and logic for register based hardware memory renaming

Local power gate (LPG) interfaces for power-aware operations

Patents Applicationslast 30 patents

ENABLING REMOVAL AND RECONSTRUCTION OF FLAG OPERATIONS IN A PROCESSOR

DETECTING ERRORS IN REGISTER RENAMING BY COMPARING VALUE REPRESENTI...

SUSPENDABLE LOAD ADDRESS TRACKING INSIDE TRANSACTIONS

PERFORMING FOLDING OF IMMEDIATE DATA IN A PROCESSOR

ENABLING REMOVAL AND RECONSTRUCTION OF FLAG OPERATIONS IN A PROCESSOR

LOCAL POWER GATE (LPG) INTERFACES FOR POWER-AWARE OPERATIONS

INSTRUCTION AND LOGIC FOR REGISTER BASED HARDWARE MEMORY RENAMING

INSTRUCTION AND LOGIC FOR EXECUTING INSTRUCTIONS OF MULTIPLE-WIDTHS

LOCAL POWER GATE (LPG) INTERFACES FOR POWER-AWARE OPERATIONS