Alexander Albert Woerner

Person

Waiblingen, DE

People

Patents Grantslast 30 patents

Information Patent Grant
Method and system to fix early mode slacks in a circuit design
- Patent number 9,058,456
- Issue date Jun 16, 2015
- International Business Machines Corporation
- Wilhelm Haller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Defective memory column replacement with load isolation
- Patent number 8,964,493
- Issue date Feb 24, 2015
- International Business Machines Corporation
- Silke Penth
- G11 - INFORMATION STORAGE
Information Patent Grant
Method and system for generating a placement layout of a VLSI circu...
- Patent number 8,631,376
- Issue date Jan 14, 2014
- International Business Machines Corporation
- Tobias Werner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Generation of an end point report for a timing simulation of an int...
- Patent number 8,522,182
- Issue date Aug 27, 2013
- International Business Machines Corporation
- Ulrich Krauch
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multistage, hybrid synthesis processing facilitating integrated cir...
- Patent number 8,316,335
- Issue date Nov 20, 2012
- International Business Machines Corporation
- Harry Barowski
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Topology for a n-way XOR/XNOR circuit
- Patent number 7,557,614
- Issue date Jul 7, 2009
- International Business Machines Corporation
- Stefan Bonsels
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method for comparing two designs of electronic circuits
- Patent number 7,546,565
- Issue date Jun 9, 2009
- International Business Machines Corporation
- Joachim Fenkes
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for creating a layout for an electronic circuit
- Patent number 7,490,310
- Issue date Feb 10, 2009
- International Business Machines Corporation
- Juergen Koehl
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Automatic method for routing and designing an LSI
- Patent number 7,401,312
- Issue date Jul 15, 2008
- International Business Machines Corporation
- Ulrich Krauch
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for verifying cross-sections
- Patent number 6,912,473
- Issue date Jun 28, 2005
- International Business Machines Corporation
- Dieter Wendel
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
DEFECTIVE MEMORY COLUMN REPLACEMENT WITH LOAD ISOLATION
- Publication number 20140192602
- Publication date Jul 10, 2014
- International Business Machines Corporation
- Silke Penth
- G11 - INFORMATION STORAGE
Information Patent Application
METHOD AND SYSTEM TO FIX EARLY MODE SLACKS IN A CIRCUIT DESIGN
- Publication number 20140089880
- Publication date Mar 27, 2014
- International Business Machines Corporation
- Wilhelm Haller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SIMD ACCELERATOR FOR DATA COMPARISON
- Publication number 20130227250
- Publication date Aug 29, 2013
- International Business Machines Corporation
- Wilhelm Haller
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
GENERATION OF AN END POINT REPORT FOR A TIMING SIMULATION OF AN INT...
- Publication number 20120246606
- Publication date Sep 27, 2012
- International Business Machines Corporation
- Ulrich KRAUCH
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and System for Generating a Placement Layout of a VLSI Circu...
- Publication number 20120174051
- Publication date Jul 5, 2012
- International Business Machines Corporation
- Tobias T. Werner
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTISTAGE, HYBRID SYNTHESIS PROCESSING FACILITATING INTEGRATED CIR...
- Publication number 20120151429
- Publication date Jun 14, 2012
- International Business Machines Corporation
- Harry BAROWSKI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and Method for Placing Integrated Circuit Functional Blocks...
- Publication number 20120005643
- Publication date Jan 5, 2012
- International Business Machines Corporation
- Friedrich Schroeder
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Layout Generator for Routing and Designing an LSI
- Publication number 20080301616
- Publication date Dec 4, 2008
- International Business Machines Corporation
- Ulrich Krauch
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for comparing two designs of electronic circuits
- Publication number 20080172640
- Publication date Jul 17, 2008
- International Business Machines Corporation
- Joachim Fenkes
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and Tool for Creating a Layout for an Electronic Circuit
- Publication number 20070089079
- Publication date Apr 19, 2007
- Juergen Koehl
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Automatic method for routing and designing an LSI
- Publication number 20050132319
- Publication date Jun 16, 2005
- International Business Machines Corporation
- Ulrich Krauch
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for verifying cross-sections
- Publication number 20040002831
- Publication date Jan 1, 2004
- International Business Machines Corporation
- Dieter Wendel
- G06 - COMPUTING CALCULATING COUNTING

Alexander Albert Woerner

Person

Patents Grantslast 30 patents

Method and system to fix early mode slacks in a circuit design

Defective memory column replacement with load isolation

Method and system for generating a placement layout of a VLSI circu...

Generation of an end point report for a timing simulation of an int...

Multistage, hybrid synthesis processing facilitating integrated cir...

Topology for a n-way XOR/XNOR circuit

Method for comparing two designs of electronic circuits

Method for creating a layout for an electronic circuit

Automatic method for routing and designing an LSI

Method for verifying cross-sections

Patents Applicationslast 30 patents

DEFECTIVE MEMORY COLUMN REPLACEMENT WITH LOAD ISOLATION

METHOD AND SYSTEM TO FIX EARLY MODE SLACKS IN A CIRCUIT DESIGN

SIMD ACCELERATOR FOR DATA COMPARISON

GENERATION OF AN END POINT REPORT FOR A TIMING SIMULATION OF AN INT...

Method and System for Generating a Placement Layout of a VLSI Circu...

MULTISTAGE, HYBRID SYNTHESIS PROCESSING FACILITATING INTEGRATED CIR...

System and Method for Placing Integrated Circuit Functional Blocks...

Layout Generator for Routing and Designing an LSI

Method for comparing two designs of electronic circuits

Method and Tool for Creating a Layout for an Electronic Circuit

Automatic method for routing and designing an LSI

Method for verifying cross-sections