Alexander Goldovsky

Person

Philadelphia, PA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Adder with improved overflow flag generation
- Patent number 6,912,560
- Issue date Jun 28, 2005
- Agere Systems, INC
- Alexander Goldovsky
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Fast computation of overflow flag in a bit manipulation unit
- Patent number 6,819,971
- Issue date Nov 16, 2004
- Agere Systems Inc.
- Mazhar M. Alidina
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Boundary scan chain routing
- Patent number 6,640,324
- Issue date Oct 28, 2003
- Agere Systems Inc.
- Alexander Goldovsky
- G01 - MEASURING TESTING
Information Patent Grant
Incorporation of split-adder logic within a carry-skip adder withou...
- Patent number 6,584,484
- Issue date Jun 24, 2003
- Agere Systems Inc.
- Alexander Goldovsky
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Prefix tree adder with efficient sum generation
- Patent number 6,539,413
- Issue date Mar 25, 2003
- Agere Systems Inc.
- Alexander Goldovsky
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Prefix tree adder with efficient carry generation
- Patent number 6,529,931
- Issue date Mar 4, 2003
- Agere Systems Inc.
- Matthew Besz
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Joint optimization of modified-booth encoder and partial product ge...
- Patent number 6,173,304
- Issue date Jan 9, 2001
- Lucent Technologies, Inc.
- Alexander Goldovsky
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Efficient use of inverting cells in multiplier converter
- Patent number 6,122,655
- Issue date Sep 19, 2000
- Lucent Technologies Inc.
- Alexander Goldovsky
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Adder with improved overflow flag generation
- Publication number 20020103842
- Publication date Aug 1, 2002
- Alexander Goldovsky
- G06 - COMPUTING CALCULATING COUNTING

Alexander Goldovsky

Person

Patents Grantslast 30 patents

Adder with improved overflow flag generation

Fast computation of overflow flag in a bit manipulation unit

Boundary scan chain routing

Incorporation of split-adder logic within a carry-skip adder withou...

Prefix tree adder with efficient sum generation

Prefix tree adder with efficient carry generation

Joint optimization of modified-booth encoder and partial product ge...

Efficient use of inverting cells in multiplier converter

Patents Applicationslast 30 patents

Adder with improved overflow flag generation