Alexander Rabinovitch

Person

Kfar Yona, IL

People

Patents Grantslast 30 patents

Information Patent Grant
Adjusting direct memory access transfers used in video decoding
- Patent number 9,530,387
- Issue date Dec 27, 2016
- Intel Corporation
- Amichay Amitay
- G09 - EDUCATION CRYPTOGRAPHY DISPLAY ADVERTISING SEALS
Information Patent Grant
Intra-prediction mode selection while encoding a picture
- Patent number 9,066,068
- Issue date Jun 23, 2015
- Avago Technologies General IP (Singapore) Pte. Ltd.
- Alexander Rabinovitch
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Efficient extraction of execution sets from fetch sets
- Patent number 8,898,433
- Issue date Nov 25, 2014
- Avago Technologies General IP (Singapore) Pte. Ltd.
- Alexander Rabinovitch
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus to perform floating point operations
- Patent number 8,898,214
- Issue date Nov 25, 2014
- LSI Corporation
- Leonid Dubrovin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache prefetch during motion estimation
- Patent number 8,897,355
- Issue date Nov 25, 2014
- Avago Technologies General IP (Singapore) Pte. Ltd.
- Amichay Amitay
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Implementation of negation in a multiplication operation without po...
- Patent number 8,892,621
- Issue date Nov 18, 2014
- LSI Corporation
- Leonid Dubrovin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Orthogonal variable spreading factor code sequence generation
- Patent number 8,891,351
- Issue date Nov 18, 2014
- Avago Technologies General IP (Singapore) Pte. Ltd.
- Leonid Dubrovin
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Grant
Low access time indirect memory accesses
- Patent number 8,880,815
- Issue date Nov 4, 2014
- Avago Technologies General IP (Singapore) Pte. Ltd.
- Nimrod Alexandron
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache prefetch learning
- Patent number 8,850,123
- Issue date Sep 30, 2014
- Avago Technologies General IP (Singapore) Pte. Ltd.
- Leonid Dubrovin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache replacement using active cache line counters
- Patent number 8,806,137
- Issue date Aug 12, 2014
- LSI Corporation
- Alexander Rabinovitch
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Biquad infinite impulse response system transformation
- Patent number 8,798,129
- Issue date Aug 5, 2014
- LSI Corporation
- Alexander Rabinovitch
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Copying data to a cache using direct memory access
- Patent number 8,661,169
- Issue date Feb 25, 2014
- LSI Corporation
- Alexander Rabinovitch
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cache memory architecture having reduced tag memory size and method...
- Patent number 8,661,179
- Issue date Feb 25, 2014
- Agere Systems LLC
- Allen B. Goodrich
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Grant
On-demand allocation of cache memory for use as a preset buffer
- Patent number 8,656,107
- Issue date Feb 18, 2014
- LSI Corporation
- Alexander Rabinovitch
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Sequentially packing mask selected bits from plural words in circul...
- Patent number 8,607,033
- Issue date Dec 10, 2013
- LSI Corporation
- Nimrod Alexandron
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Representation of data relative to varying thresholds
- Patent number 8,595,407
- Issue date Nov 26, 2013
- LSI Corporation
- Nimrod Alexandron
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Turbo parallel concatenated convolutional code implementation on mu...
- Patent number 8,583,993
- Issue date Nov 12, 2013
- LSI Corporation
- Shai Kalfon
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Method and apparatus for caching prefetched data
- Patent number 8,583,874
- Issue date Nov 12, 2013
- LSI Corporation
- Leonid Dubrovin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-destination direct memory access transfer
- Patent number 8,527,689
- Issue date Sep 3, 2013
- LSI Corporation
- Amichay Amitay
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Avoiding stall in processor pipeline upon read after write resource...
- Patent number 8,499,139
- Issue date Jul 30, 2013
- LSI Corporation
- Leonid Dubrovin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Reducing a degree of a polynomial in a polynomial division calculation
- Patent number 8,381,080
- Issue date Feb 19, 2013
- LSI Corporation
- Alexander Rabinovitch
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Grant
Fully asynchronous direct memory access controller and processor work
- Patent number 8,332,546
- Issue date Dec 11, 2012
- LSI Corporation
- Leonid Dubrovin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Branch target buffer with entry source field for use in determining...
- Patent number 8,171,269
- Issue date May 1, 2012
- Agere Systems Inc.
- Alexander Rabinovitch
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Controller and method for statistical allocation of multichannel di...
- Patent number 8,095,700
- Issue date Jan 10, 2012
- LSI Corporation
- Nimrod Alexandron
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
MEMORY MAPPED FETCH-AHEAD CONTROL FOR DATA CACHE ACCESSES
- Publication number 20130318307
- Publication date Nov 28, 2013
- Alexander Rabinovitch
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
COMPILED CONTROL CODE PARALLELIZATION BY HARDWARE TREATMENT OF DATA...
- Publication number 20130305017
- Publication date Nov 14, 2013
- Alexander Rabinovitch
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CONTROLLING A SEQUENCE OF PARALLEL EXECUTIONS
- Publication number 20130298129
- Publication date Nov 7, 2013
- Alexander Rabinovitch
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
EFFICIENT EXTRACTION OF EXECUTION SETS FROM FETCH SETS
- Publication number 20130290677
- Publication date Oct 31, 2013
- Alexander Rabinovitch
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADJUSTING DIRECT MEMORY ACCESS TRANSFERS USED IN VIDEO DECODING
- Publication number 20130286029
- Publication date Oct 31, 2013
- Amichay Amitay
- G09 - EDUCATION CRYPTOGRAPHY DISPLAY ADVERTISING SEALS
Information Patent Application
Method and Apparatus to Perform Floating Point Operations
- Publication number 20130282780
- Publication date Oct 24, 2013
- LSI Corporation
- Leonid Dubrovin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ON-DEMAND ALLOCATION OF CACHE MEMORY FOR USE AS A PRESET BUFFER
- Publication number 20130262772
- Publication date Oct 3, 2013
- LSI Corporation
- Alexander Rabinovitch
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOW ACCESS TIME INDIRECT MEMORY ACCESSES
- Publication number 20130219131
- Publication date Aug 22, 2013
- Nimrod Alexandron
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE PREFETCH DURING A HIERARCHICAL MOTION ESTIMATION
- Publication number 20130208796
- Publication date Aug 15, 2013
- Amichay Amitay
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Biquad Infinite Impulse Response System Transformation
- Publication number 20130170585
- Publication date Jul 4, 2013
- LSI Corporation
- Alexander Rabinovitch
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Implementation of Negation in a Multiplication Operation Without Po...
- Publication number 20130159367
- Publication date Jun 20, 2013
- LSI Corporation
- Leonid Dubrovin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE PREFETCH DURING MOTION ESTIMATION
- Publication number 20130136181
- Publication date May 30, 2013
- Amichay Amitay
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
MULTIPLICATION DYNAMIC RANGE INCREASE BY ON THE FLY DATA SCALING
- Publication number 20130113543
- Publication date May 9, 2013
- Leonid Dubrovin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTERLEAVING ADDRESS MODIFICATION
- Publication number 20130117532
- Publication date May 9, 2013
- Alexander Rabinovitch
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
INTRA-PREDICTION MODE SELECTION WHILE ENCODING A PICTURE
- Publication number 20130107957
- Publication date May 2, 2013
- Alexander Rabinovitch
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
APPARATUS AND METHODS FOR PERFORMING BLOCK MATCHING ON A VIDEO STREAM
- Publication number 20130094567
- Publication date Apr 18, 2013
- LSI Corporation
- Amichay Amitay
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
Direct Memory Access With On-The-Fly Generation of Frame Informatio...
- Publication number 20130094586
- Publication date Apr 18, 2013
- LSI Corporation
- Amichay Amitay
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
HARDWARE CONTROL OF INSTRUCTION OPERANDS IN A PROCESSOR
- Publication number 20130080741
- Publication date Mar 28, 2013
- Alexander Rabinovitch
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ORTHOGONAL VARIABLE SPREADING FACTOR CODE SEQUENCE GENERATION
- Publication number 20130077464
- Publication date Mar 28, 2013
- Leonid Dubrovin
- H04 - ELECTRIC COMMUNICATION TECHNIQUE
Information Patent Application
SPECULATIVE MEMORY WRITE IN A PIPELINED PROCESSOR
- Publication number 20130046961
- Publication date Feb 21, 2013
- Alexander Rabinovitch
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
REPRESENTATION OF DATA RELATIVE TO VARYING THRESHOLDS
- Publication number 20120324136
- Publication date Dec 20, 2012
- Nimrod Alexandron
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Cache Replacement Using Active Cache Line Counters
- Publication number 20120324172
- Publication date Dec 20, 2012
- LSI Corporation
- Alexander Rabinovitch
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ALLOCATION OF PRESET CACHE LINES
- Publication number 20120324195
- Publication date Dec 20, 2012
- Alexander Rabinovitch
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Turbo Parallel Concatenated Convolutional Code Implementation on Mu...
- Publication number 20120324316
- Publication date Dec 20, 2012
- LSI Corporation
- Shai Kalfon
- H03 - BASIC ELECTRONIC CIRCUITRY
Information Patent Application
Method and Apparatus for Caching Prefetched Data
- Publication number 20120151149
- Publication date Jun 14, 2012
- LSI Corporation
- Leonid Dubrovin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Cache Line Fetching and Fetch Ahead Control Using Post Modification...
- Publication number 20120151150
- Publication date Jun 14, 2012
- LSI Corporation
- Alexander Rabinovitch
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-DESTINATION DIRECT MEMORY ACCESS TRANSFER
- Publication number 20120110232
- Publication date May 3, 2012
- Amichay Amitay
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
CACHE PREFETCH LEARNING
- Publication number 20120096227
- Publication date Apr 19, 2012
- Leonid Dubrovin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
DIRECT MEMORY ACCESS CACHE PREFETCHING
- Publication number 20120066456
- Publication date Mar 15, 2012
- Alexander Rabinovitch
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
BIT MASK EXTRACT AND PACK FOR BOUNDARY CROSSING DATA
- Publication number 20120059998
- Publication date Mar 8, 2012
- Nimrod Alexandron
- G06 - COMPUTING CALCULATING COUNTING

Alexander Rabinovitch

Person

Patents Grantslast 30 patents

Adjusting direct memory access transfers used in video decoding

Intra-prediction mode selection while encoding a picture

Efficient extraction of execution sets from fetch sets

Method and apparatus to perform floating point operations

Cache prefetch during motion estimation

Implementation of negation in a multiplication operation without po...

Orthogonal variable spreading factor code sequence generation

Low access time indirect memory accesses

Cache prefetch learning

Cache replacement using active cache line counters

Biquad infinite impulse response system transformation

Copying data to a cache using direct memory access

Cache memory architecture having reduced tag memory size and method...

On-demand allocation of cache memory for use as a preset buffer

Sequentially packing mask selected bits from plural words in circul...

Representation of data relative to varying thresholds

Turbo parallel concatenated convolutional code implementation on mu...

Method and apparatus for caching prefetched data

Multi-destination direct memory access transfer

Avoiding stall in processor pipeline upon read after write resource...

Reducing a degree of a polynomial in a polynomial division calculation

Fully asynchronous direct memory access controller and processor work

Branch target buffer with entry source field for use in determining...

Controller and method for statistical allocation of multichannel di...

Patents Applicationslast 30 patents

MEMORY MAPPED FETCH-AHEAD CONTROL FOR DATA CACHE ACCESSES

COMPILED CONTROL CODE PARALLELIZATION BY HARDWARE TREATMENT OF DATA...

CONTROLLING A SEQUENCE OF PARALLEL EXECUTIONS

EFFICIENT EXTRACTION OF EXECUTION SETS FROM FETCH SETS

ADJUSTING DIRECT MEMORY ACCESS TRANSFERS USED IN VIDEO DECODING

Method and Apparatus to Perform Floating Point Operations

ON-DEMAND ALLOCATION OF CACHE MEMORY FOR USE AS A PRESET BUFFER

LOW ACCESS TIME INDIRECT MEMORY ACCESSES

CACHE PREFETCH DURING A HIERARCHICAL MOTION ESTIMATION

Biquad Infinite Impulse Response System Transformation

Implementation of Negation in a Multiplication Operation Without Po...

CACHE PREFETCH DURING MOTION ESTIMATION

MULTIPLICATION DYNAMIC RANGE INCREASE BY ON THE FLY DATA SCALING

INTERLEAVING ADDRESS MODIFICATION

INTRA-PREDICTION MODE SELECTION WHILE ENCODING A PICTURE

APPARATUS AND METHODS FOR PERFORMING BLOCK MATCHING ON A VIDEO STREAM

Direct Memory Access With On-The-Fly Generation of Frame Informatio...

HARDWARE CONTROL OF INSTRUCTION OPERANDS IN A PROCESSOR

ORTHOGONAL VARIABLE SPREADING FACTOR CODE SEQUENCE GENERATION

SPECULATIVE MEMORY WRITE IN A PIPELINED PROCESSOR

REPRESENTATION OF DATA RELATIVE TO VARYING THRESHOLDS

Cache Replacement Using Active Cache Line Counters

ALLOCATION OF PRESET CACHE LINES

Turbo Parallel Concatenated Convolutional Code Implementation on Mu...

Method and Apparatus for Caching Prefetched Data

Cache Line Fetching and Fetch Ahead Control Using Post Modification...

MULTI-DESTINATION DIRECT MEMORY ACCESS TRANSFER

CACHE PREFETCH LEARNING

DIRECT MEMORY ACCESS CACHE PREFETCHING

BIT MASK EXTRACT AND PACK FOR BOUNDARY CROSSING DATA