Alexandre J. Farcy

Person

Hillsboro, OR, US

People

Patents Grantslast 30 patents

Information Patent Grant
Rotate instructions that complete execution either without writing...
- Patent number 11,900,108
- Issue date Feb 13, 2024
- Intel Corporation
- Vinodh Gopal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Rotate instructions that complete execution either without writing...
- Patent number 11,106,461
- Issue date Aug 31, 2021
- Intel Corporation
- Vinodh Gopal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiplication instruction for which execution completes without wr...
- Patent number 10,649,774
- Issue date May 12, 2020
- Intel Corporation
- Vinodh Gopal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for transactional memory and lock elision incl...
- Patent number 10,409,612
- Issue date Sep 10, 2019
- Intel Corporation
- Martin G. Dixon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus and method for transactional memory and lock elision incl...
- Patent number 10,409,611
- Issue date Sep 10, 2019
- Intel Corporation
- Martin G. Dixon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multiplication instruction for which execution completes without wr...
- Patent number 9,990,201
- Issue date Jun 5, 2018
- Intel Corporation
- Vinodh Gopal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Rotate instructions that complete execution either without writing...
- Patent number 9,940,131
- Issue date Apr 10, 2018
- Intel Corporation
- Vinodh Gopal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Rotate instructions that complete execution either without writing...
- Patent number 9,940,130
- Issue date Apr 10, 2018
- Intel Corporation
- Vinodh Gopal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Rotate instructions that complete execution either without writing...
- Patent number 9,916,160
- Issue date Mar 13, 2018
- Intel Corporation
- Vinodh Gopal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Apparatus including a stall counter to bias processing element sele...
- Patent number 9,524,191
- Issue date Dec 20, 2016
- Intel Corporation
- Morris Marden
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Enhanced loop streaming detector to drive logic optimization
- Patent number 9,354,875
- Issue date May 31, 2016
- Intel Corporation
- Matthew C. Merten
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multi-level tracking of in-use state of cache lines
- Patent number 9,348,591
- Issue date May 24, 2016
- Intel Corporation
- Ilhyun Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for a load instruction with code conversion havin...
- Patent number 9,280,492
- Issue date Mar 8, 2016
- Intel Corporation
- Paul Caprioli
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Rotate instructions that complete execution without reading carry flag
- Patent number 9,164,762
- Issue date Oct 20, 2015
- Intel Corporation
- Vinodh Gopal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hiding instruction cache miss latency by running tag lookups ahead...
- Patent number 9,158,696
- Issue date Oct 13, 2015
- Intel Corporation
- Ilhyun Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technique to perform three-source operations
- Patent number 8,825,989
- Issue date Sep 2, 2014
- Intel Corporation
- Avinash Sodani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Add instructions to add three source operands
- Patent number 8,738,893
- Issue date May 27, 2014
- Intel Corporation
- Vindoh Gopal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Technique to perform three-source operations
- Patent number 8,589,663
- Issue date Nov 19, 2013
- Intel Corporation
- Avinash Sodani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Add instructions to add three source operands
- Patent number 8,549,264
- Issue date Oct 1, 2013
- Intel Corporation
- Vinodh Gopal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Providing thread fairness by biasing selection away from a stalling...
- Patent number 8,521,993
- Issue date Aug 27, 2013
- Intel Corporation
- Morris Marden
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Managing multiple threads in a single pipeline
- Patent number 8,504,804
- Issue date Aug 6, 2013
- Intel Corporation
- Matthew Merten
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Rotate instructions that complete execution without reading carry flag
- Patent number 8,504,807
- Issue date Aug 6, 2013
- Intel Corporation
- Vinodh Gopal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Providing thread fairness by biasing selection away from a stalling...
- Patent number 8,438,369
- Issue date May 7, 2013
- Intel Corporation
- Morris Marden
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Managing multiple threads in a single pipeline
- Patent number 8,402,253
- Issue date Mar 19, 2013
- Intel Corporation
- Matthew Merten
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Forward-pass dead instruction identification and removal at run-time
- Patent number 8,291,196
- Issue date Oct 16, 2012
- Intel Corporation
- Stephan J. Jourdan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Operation frame filtering, building, and execution
- Patent number 7,913,064
- Issue date Mar 22, 2011
- Intel Corporation
- Stephan Jourdan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Decoupling the number of logical threads from the number of simulta...
- Patent number 7,797,683
- Issue date Sep 14, 2010
- Intel Corporation
- Per H. Hammarlund
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Multilevel scheme for dynamically and statically predicting instruc...
- Patent number 7,562,206
- Issue date Jul 14, 2009
- Intel Corporation
- Avinash Sodani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Operation frame filtering, building, and execution
- Patent number 7,533,247
- Issue date May 12, 2009
- Intel Corporation
- Stephan Jourdan
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for microarchitecture partitioning of executio...
- Patent number 7,475,225
- Issue date Jan 6, 2009
- Intel Corporation
- Stephan J. Jourdan
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
ROTATE INSTRUCTIONS THAT COMPLETE EXECUTION EITHER WITHOUT WRITING...
- Publication number 20220107806
- Publication date Apr 7, 2022
- Intel Corporation
- Vinodh Gopal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ROTATE INSTRUCTIONS THAT COMPLETE EXECUTION EITHER WITHOUT WRITING...
- Publication number 20180321940
- Publication date Nov 8, 2018
- lntel Corporation
- Vinodh Gopal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTIPLICATION INSTRUCTION FOR WHICH EXECUTION COMPLETES WITHOUT WR...
- Publication number 20180136936
- Publication date May 17, 2018
- Intel Corporation
- Vinodh Gopal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROVIDING THREAD FAIRNESS IN A HYPER-THREADED MICROPROCESSOR
- Publication number 20170161106
- Publication date Jun 8, 2017
- Intel Corporation
- Morris Marden
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method, apparatus, and system for speculative abort control mechanisms
- Publication number 20160246606
- Publication date Aug 25, 2016
- Martin G. Dixon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD, APPARATUS, AND SYSTEM FOR SPECULATIVE ABORT CONTROL MECHANISMS
- Publication number 20160239304
- Publication date Aug 18, 2016
- Martin G. Dixon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method, apparatus, and system for speculative abort control mechanisms
- Publication number 20160210177
- Publication date Jul 21, 2016
- Martin G. Dixon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method, apparatus, and system for speculative abort control mechanisms
- Publication number 20160154648
- Publication date Jun 2, 2016
- Martin G. Dixon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method, apparatus, and system for speculative abort control mechanisms
- Publication number 20160132335
- Publication date May 12, 2016
- Martin G. Dixon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method, apparaturs, and system for speculative abort control mechan...
- Publication number 20160132334
- Publication date May 12, 2016
- Martin G. Dixon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method, apparatus, and system for speculative abort control mechanisms
- Publication number 20160132337
- Publication date May 12, 2016
- Martin G. Dixon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method, Apparatus, And System For Speculative Abort Control Mechanisms
- Publication number 20160132333
- Publication date May 12, 2016
- Martin G. Dixon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method, apparatus, and system for speculative abort control mechanisms
- Publication number 20160132336
- Publication date May 12, 2016
- Martin G. Dixon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
LOAD INSTRUCTION FOR CODE CONVERSION
- Publication number 20150186299
- Publication date Jul 2, 2015
- PAUL CAPRIOLI
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ROTATE INSTRUCTIONS THAT COMPLETE EXECUTION EITHER WITHOUT WRITING...
- Publication number 20150089200
- Publication date Mar 26, 2015
- Intel Corporation
- Vinodh Gopal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ROTATE INSTRUCTIONS THAT COMPLETE EXECUTION EITHER WITHOUT WRITING...
- Publication number 20150089199
- Publication date Mar 26, 2015
- Intel Corporation
- Vinodh Gopal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ROTATE INSTRUCTIONS THAT COMPLETE EXECUTION EITHER WITHOUT WRITING...
- Publication number 20150089201
- Publication date Mar 26, 2015
- Intel Corporation
- Vinodh Gopal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD, APPARATUS, AND SYSTEM FOR TRANSACTIONAL SPECULATION CONTROL...
- Publication number 20150032998
- Publication date Jan 29, 2015
- Ravi Rajwar
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
HIDING INSTRUCTION CACHE MISS LATENCY BY RUNNING TAG LOOKUPS AHEAD...
- Publication number 20140229677
- Publication date Aug 14, 2014
- Ilhyun Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROCESSOR WITH SECOND JUMP EXECUTION UNIT FOR BRANCH MISPREDICTION
- Publication number 20140195790
- Publication date Jul 10, 2014
- Matthew C. Merten
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ENHANCED LOOP STREAMING DETECTOR TO DRIVE LOGIC OPTIMIZATION
- Publication number 20140189306
- Publication date Jul 3, 2014
- Matthew C. Merten
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
METHOD, APPARATUS, AND SYSTEM FOR SPECULATIVE ABORT CONTROL MECHANISMS
- Publication number 20140059333
- Publication date Feb 27, 2014
- Martin G. Dixon
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
TECHNIQUE TO PERFORM THREE-SOURCE OPERATIONS
- Publication number 20140052963
- Publication date Feb 20, 2014
- Avinash Sodani
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ROTATE INSTRUCTIONS THAT COMPLETE EXECUTION WITHOUT READING CARRY FLAG
- Publication number 20130311756
- Publication date Nov 21, 2013
- VINODH GOPAL
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
MULTI-LEVEL TRACKING OF IN-USE STATE OF CACHE LINES
- Publication number 20130275733
- Publication date Oct 17, 2013
- Ilhyun Kim
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Add Instructions to Add Three Source Operands
- Publication number 20130227252
- Publication date Aug 29, 2013
- Vinodh Gopal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Rotate instructions that complete execution without reading carry flag
- Publication number 20110161635
- Publication date Jun 30, 2011
- Vinodh Gopal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Multiplication Instruction for Which Execution Completes Without Wr...
- Publication number 20110153994
- Publication date Jun 23, 2011
- Vinodh Gopal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Add Instructions to Add Three Source Operands
- Publication number 20110153993
- Publication date Jun 23, 2011
- Vinodh Gopal
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
PROVIDING THREAD FAIRNESS IN A HYPER-THREADED MICROPROCESSOR
- Publication number 20110055524
- Publication date Mar 3, 2011
- Morris Marden
- G06 - COMPUTING CALCULATING COUNTING

Alexandre J. Farcy

Person

Patents Grantslast 30 patents

Rotate instructions that complete execution either without writing...

Rotate instructions that complete execution either without writing...

Multiplication instruction for which execution completes without wr...

Apparatus and method for transactional memory and lock elision incl...

Apparatus and method for transactional memory and lock elision incl...

Multiplication instruction for which execution completes without wr...

Rotate instructions that complete execution either without writing...

Rotate instructions that complete execution either without writing...

Rotate instructions that complete execution either without writing...

Apparatus including a stall counter to bias processing element sele...

Enhanced loop streaming detector to drive logic optimization

Multi-level tracking of in-use state of cache lines

System and method for a load instruction with code conversion havin...

Rotate instructions that complete execution without reading carry flag

Hiding instruction cache miss latency by running tag lookups ahead...

Technique to perform three-source operations

Add instructions to add three source operands

Technique to perform three-source operations

Add instructions to add three source operands

Providing thread fairness by biasing selection away from a stalling...

Managing multiple threads in a single pipeline

Rotate instructions that complete execution without reading carry flag

Providing thread fairness by biasing selection away from a stalling...

Managing multiple threads in a single pipeline

Forward-pass dead instruction identification and removal at run-time

Operation frame filtering, building, and execution

Decoupling the number of logical threads from the number of simulta...

Multilevel scheme for dynamically and statically predicting instruc...

Operation frame filtering, building, and execution

Method and apparatus for microarchitecture partitioning of executio...

Patents Applicationslast 30 patents

ROTATE INSTRUCTIONS THAT COMPLETE EXECUTION EITHER WITHOUT WRITING...

ROTATE INSTRUCTIONS THAT COMPLETE EXECUTION EITHER WITHOUT WRITING...

MULTIPLICATION INSTRUCTION FOR WHICH EXECUTION COMPLETES WITHOUT WR...

PROVIDING THREAD FAIRNESS IN A HYPER-THREADED MICROPROCESSOR

Method, apparatus, and system for speculative abort control mechanisms

METHOD, APPARATUS, AND SYSTEM FOR SPECULATIVE ABORT CONTROL MECHANISMS

Method, apparatus, and system for speculative abort control mechanisms

Method, apparatus, and system for speculative abort control mechanisms

Method, apparatus, and system for speculative abort control mechanisms

Method, apparaturs, and system for speculative abort control mechan...

Method, apparatus, and system for speculative abort control mechanisms

Method, Apparatus, And System For Speculative Abort Control Mechanisms

Method, apparatus, and system for speculative abort control mechanisms

LOAD INSTRUCTION FOR CODE CONVERSION

ROTATE INSTRUCTIONS THAT COMPLETE EXECUTION EITHER WITHOUT WRITING...

ROTATE INSTRUCTIONS THAT COMPLETE EXECUTION EITHER WITHOUT WRITING...

ROTATE INSTRUCTIONS THAT COMPLETE EXECUTION EITHER WITHOUT WRITING...

METHOD, APPARATUS, AND SYSTEM FOR TRANSACTIONAL SPECULATION CONTROL...

HIDING INSTRUCTION CACHE MISS LATENCY BY RUNNING TAG LOOKUPS AHEAD...

PROCESSOR WITH SECOND JUMP EXECUTION UNIT FOR BRANCH MISPREDICTION

ENHANCED LOOP STREAMING DETECTOR TO DRIVE LOGIC OPTIMIZATION

METHOD, APPARATUS, AND SYSTEM FOR SPECULATIVE ABORT CONTROL MECHANISMS

TECHNIQUE TO PERFORM THREE-SOURCE OPERATIONS

ROTATE INSTRUCTIONS THAT COMPLETE EXECUTION WITHOUT READING CARRY FLAG

MULTI-LEVEL TRACKING OF IN-USE STATE OF CACHE LINES

Add Instructions to Add Three Source Operands

Rotate instructions that complete execution without reading carry flag

Multiplication Instruction for Which Execution Completes Without Wr...

Add Instructions to Add Three Source Operands

PROVIDING THREAD FAIRNESS IN A HYPER-THREADED MICROPROCESSOR