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Alexandre Vaufredaz
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La Murette, FR
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Patents Grants
last 30 patents
Information
Patent Grant
Process for fabricating a multilayer structure with trimming using...
Patent number
8,372,728
Issue date
Feb 12, 2013
Soitec
Alexandre Vaufredaz
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Process for fabricating a heterostructure with minimized stress
Patent number
8,314,007
Issue date
Nov 20, 2012
Soitec
Alexandre Vaufredaz
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Process for fabricating a multilayer structure with post-grinding t...
Patent number
8,298,916
Issue date
Oct 30, 2012
Soitec
Alexandre Vaufredaz
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Grant
Process for bonding by molecular adhesion
Patent number
8,158,013
Issue date
Apr 17, 2012
Soitec
Sebastien Kerdiles
C03 - GLASS MINERAL OR SLAG WOOL
Information
Patent Grant
Equipment for bonding by molecular adhesion
Patent number
8,091,601
Issue date
Jan 10, 2012
S.O.I. Tec Silicon on Insulator Technologies
Sebastien Kerdiles
C03 - GLASS MINERAL OR SLAG WOOL
Information
Patent Grant
Process and equipment for bonding by molecular adhesion
Patent number
7,601,271
Issue date
Oct 13, 2009
S.O.I. Tec Silicon on Insulator Technologies
Sebastien Kerdiles
C03 - GLASS MINERAL OR SLAG WOOL
Patents Applications
last 30 patents
Information
Patent Application
Preparing a Surface of a Sapphire Substrate for Fabricating Heteros...
Publication number
20120015497
Publication date
Jan 19, 2012
Gweltaz Gaudin
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
PROCESS FOR FABRICATING A MULTILAYER STRUCTURE WITH POST-GRINDING T...
Publication number
20110230003
Publication date
Sep 22, 2011
S.O.I TEC SILICON ON INSULATOR TECHNOLOGIES
Alexandre Vaufredaz
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
PROCESS FOR FABRICATING A MULTILAYER STRUCTURE WITH TRIMMING USING...
Publication number
20110230005
Publication date
Sep 22, 2011
Alexandre Vaufredaz
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
METHOD OF PRODUCING A SILICON-ON-SAPPHIRE TYPE HETEROSTRUCTURE
Publication number
20110195560
Publication date
Aug 11, 2011
S.O.I TEC SILICON ON INSULATOR TECHNOLOGIES
Gweltaz Gaudin
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
PROCESS FOR FABRICATING A HETEROSTRUCTURE WITH MINIMIZED STRESS
Publication number
20110151644
Publication date
Jun 23, 2011
Alexandre Vaufredaz
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
EQUIPMENT FOR BONDING BY MOLECULAR ADHESION
Publication number
20090294072
Publication date
Dec 3, 2009
S.O.I.Tec Silicon on Insulator Technologies
Sebastien Kerdiles
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
PROCESS FOR BONDING BY MOLECULAR ADHESION
Publication number
20090261064
Publication date
Oct 22, 2009
S.O.I.Tec Silicon on Insulator Technologies
Sebastien Kerdiles
H01 - BASIC ELECTRIC ELEMENTS
Information
Patent Application
Process and equipment for bonding by molecular adhesion
Publication number
20070119812
Publication date
May 31, 2007
Sebastien Kerdiles
H01 - BASIC ELECTRIC ELEMENTS